1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Paravirtualization interfaces
3 Copyright (C) 2006 Rusty Russell IBM Corporation
4
5
6 2007 - x86_64 support added by Glauber de Oliveira Costa, Red Hat Inc
7 */
8
9 #include <linux/errno.h>
10 #include <linux/init.h>
11 #include <linux/export.h>
12 #include <linux/efi.h>
13 #include <linux/bcd.h>
14 #include <linux/highmem.h>
15 #include <linux/kprobes.h>
16 #include <linux/pgtable.h>
17 #include <linux/static_call.h>
18
19 #include <asm/bug.h>
20 #include <asm/paravirt.h>
21 #include <asm/debugreg.h>
22 #include <asm/desc.h>
23 #include <asm/setup.h>
24 #include <asm/time.h>
25 #include <asm/pgalloc.h>
26 #include <asm/irq.h>
27 #include <asm/delay.h>
28 #include <asm/fixmap.h>
29 #include <asm/apic.h>
30 #include <asm/tlbflush.h>
31 #include <asm/timer.h>
32 #include <asm/special_insns.h>
33 #include <asm/tlb.h>
34 #include <asm/io_bitmap.h>
35 #include <asm/gsseg.h>
36 #include <asm/msr.h>
37
38 /* stub always returning 0. */
39 DEFINE_ASM_FUNC(paravirt_ret0, "xor %eax,%eax", .entry.text);
40
default_banner(void)41 void __init default_banner(void)
42 {
43 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
44 pv_info.name);
45 }
46
47 #ifdef CONFIG_PARAVIRT_XXL
48 unsigned long pv_native_save_fl(void);
49 void pv_native_irq_disable(void);
50 void pv_native_irq_enable(void);
51 unsigned long pv_native_read_cr2(void);
52
53 DEFINE_ASM_FUNC(_paravirt_ident_64, "mov %rdi, %rax", .text);
54 DEFINE_ASM_FUNC(pv_native_save_fl, "pushf; pop %rax", .noinstr.text);
55 DEFINE_ASM_FUNC(pv_native_irq_disable, "cli", .noinstr.text);
56 DEFINE_ASM_FUNC(pv_native_irq_enable, "sti", .noinstr.text);
57 DEFINE_ASM_FUNC(pv_native_read_cr2, "mov %cr2, %rax", .noinstr.text);
58 #endif
59
pv_native_safe_halt(void)60 static noinstr void pv_native_safe_halt(void)
61 {
62 native_safe_halt();
63 }
64
65 #ifdef CONFIG_PARAVIRT_XXL
pv_native_write_cr2(unsigned long val)66 static noinstr void pv_native_write_cr2(unsigned long val)
67 {
68 native_write_cr2(val);
69 }
70
pv_native_read_cr3(void)71 static noinstr unsigned long pv_native_read_cr3(void)
72 {
73 return __native_read_cr3();
74 }
75
pv_native_write_cr3(unsigned long cr3)76 static noinstr void pv_native_write_cr3(unsigned long cr3)
77 {
78 native_write_cr3(cr3);
79 }
80
pv_native_get_debugreg(int regno)81 static noinstr unsigned long pv_native_get_debugreg(int regno)
82 {
83 return native_get_debugreg(regno);
84 }
85
pv_native_set_debugreg(int regno,unsigned long val)86 static noinstr void pv_native_set_debugreg(int regno, unsigned long val)
87 {
88 native_set_debugreg(regno, val);
89 }
90 #endif
91
92 struct pv_info pv_info = {
93 .name = "bare hardware",
94 #ifdef CONFIG_PARAVIRT_XXL
95 .extra_user_64bit_cs = __USER_CS,
96 #endif
97 };
98
99 /* 64-bit pagetable entries */
100 #define PTE_IDENT __PV_IS_CALLEE_SAVE(_paravirt_ident_64)
101
102 struct paravirt_patch_template pv_ops = {
103 /* Cpu ops. */
104 .cpu.io_delay = native_io_delay,
105
106 #ifdef CONFIG_PARAVIRT_XXL
107 .cpu.cpuid = native_cpuid,
108 .cpu.get_debugreg = pv_native_get_debugreg,
109 .cpu.set_debugreg = pv_native_set_debugreg,
110 .cpu.read_cr0 = native_read_cr0,
111 .cpu.write_cr0 = native_write_cr0,
112 .cpu.write_cr4 = native_write_cr4,
113 .cpu.read_msr = native_read_msr,
114 .cpu.write_msr = native_write_msr,
115 .cpu.read_msr_safe = native_read_msr_safe,
116 .cpu.write_msr_safe = native_write_msr_safe,
117 .cpu.read_pmc = native_read_pmc,
118 .cpu.load_tr_desc = native_load_tr_desc,
119 .cpu.set_ldt = native_set_ldt,
120 .cpu.load_gdt = native_load_gdt,
121 .cpu.load_idt = native_load_idt,
122 .cpu.store_tr = native_store_tr,
123 .cpu.load_tls = native_load_tls,
124 .cpu.load_gs_index = native_load_gs_index,
125 .cpu.write_ldt_entry = native_write_ldt_entry,
126 .cpu.write_gdt_entry = native_write_gdt_entry,
127 .cpu.write_idt_entry = native_write_idt_entry,
128
129 .cpu.alloc_ldt = paravirt_nop,
130 .cpu.free_ldt = paravirt_nop,
131
132 .cpu.load_sp0 = native_load_sp0,
133
134 #ifdef CONFIG_X86_IOPL_IOPERM
135 .cpu.invalidate_io_bitmap = native_tss_invalidate_io_bitmap,
136 .cpu.update_io_bitmap = native_tss_update_io_bitmap,
137 #endif
138
139 .cpu.start_context_switch = paravirt_nop,
140 .cpu.end_context_switch = paravirt_nop,
141
142 /* Irq ops. */
143 .irq.save_fl = __PV_IS_CALLEE_SAVE(pv_native_save_fl),
144 .irq.irq_disable = __PV_IS_CALLEE_SAVE(pv_native_irq_disable),
145 .irq.irq_enable = __PV_IS_CALLEE_SAVE(pv_native_irq_enable),
146 #endif /* CONFIG_PARAVIRT_XXL */
147
148 /* Irq HLT ops. */
149 .irq.safe_halt = pv_native_safe_halt,
150 .irq.halt = native_halt,
151
152 /* Mmu ops. */
153 .mmu.flush_tlb_user = native_flush_tlb_local,
154 .mmu.flush_tlb_kernel = native_flush_tlb_global,
155 .mmu.flush_tlb_one_user = native_flush_tlb_one_user,
156 .mmu.flush_tlb_multi = native_flush_tlb_multi,
157
158 .mmu.exit_mmap = paravirt_nop,
159 .mmu.notify_page_enc_status_changed = paravirt_nop,
160
161 #ifdef CONFIG_PARAVIRT_XXL
162 .mmu.read_cr2 = __PV_IS_CALLEE_SAVE(pv_native_read_cr2),
163 .mmu.write_cr2 = pv_native_write_cr2,
164 .mmu.read_cr3 = pv_native_read_cr3,
165 .mmu.write_cr3 = pv_native_write_cr3,
166
167 .mmu.pgd_alloc = __paravirt_pgd_alloc,
168 .mmu.pgd_free = paravirt_nop,
169
170 .mmu.alloc_pte = paravirt_nop,
171 .mmu.alloc_pmd = paravirt_nop,
172 .mmu.alloc_pud = paravirt_nop,
173 .mmu.alloc_p4d = paravirt_nop,
174 .mmu.release_pte = paravirt_nop,
175 .mmu.release_pmd = paravirt_nop,
176 .mmu.release_pud = paravirt_nop,
177 .mmu.release_p4d = paravirt_nop,
178
179 .mmu.set_pte = native_set_pte,
180 .mmu.set_pmd = native_set_pmd,
181
182 .mmu.ptep_modify_prot_start = __ptep_modify_prot_start,
183 .mmu.ptep_modify_prot_commit = __ptep_modify_prot_commit,
184
185 .mmu.set_pud = native_set_pud,
186
187 .mmu.pmd_val = PTE_IDENT,
188 .mmu.make_pmd = PTE_IDENT,
189
190 .mmu.pud_val = PTE_IDENT,
191 .mmu.make_pud = PTE_IDENT,
192
193 .mmu.set_p4d = native_set_p4d,
194
195 .mmu.p4d_val = PTE_IDENT,
196 .mmu.make_p4d = PTE_IDENT,
197
198 .mmu.set_pgd = native_set_pgd,
199
200 .mmu.pte_val = PTE_IDENT,
201 .mmu.pgd_val = PTE_IDENT,
202
203 .mmu.make_pte = PTE_IDENT,
204 .mmu.make_pgd = PTE_IDENT,
205
206 .mmu.enter_mmap = paravirt_nop,
207
208 .mmu.lazy_mode = {
209 .enter = paravirt_nop,
210 .leave = paravirt_nop,
211 .flush = paravirt_nop,
212 },
213
214 .mmu.set_fixmap = native_set_fixmap,
215 #endif /* CONFIG_PARAVIRT_XXL */
216 };
217
218 #ifdef CONFIG_PARAVIRT_XXL
219 NOKPROBE_SYMBOL(native_load_idt);
220 #endif
221
222 EXPORT_SYMBOL(pv_ops);
223 EXPORT_SYMBOL_GPL(pv_info);
224