1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /* Copyright (C) 2020 MediaTek Inc. */
3
4 #ifndef __MT7915_H
5 #define __MT7915_H
6
7 #include <linux/interrupt.h>
8 #include <linux/ktime.h>
9 #if defined(__FreeBSD__)
10 #include <linux/uuid.h>
11 #endif
12 #include "../mt76_connac.h"
13 #include "regs.h"
14
15 #define MT7915_MAX_INTERFACES 19
16 #define MT7915_WTBL_SIZE 288
17 #define MT7916_WTBL_SIZE 544
18 #define MT7915_WTBL_RESERVED (mt7915_wtbl_size(dev) - 1)
19 #define MT7915_WTBL_STA (MT7915_WTBL_RESERVED - \
20 MT7915_MAX_INTERFACES)
21
22 #define MT7915_WATCHDOG_TIME (HZ / 10)
23 #define MT7915_RESET_TIMEOUT (30 * HZ)
24
25 #define MT7915_TX_RING_SIZE 2048
26 #define MT7915_TX_MCU_RING_SIZE 256
27 #define MT7915_TX_FWDL_RING_SIZE 128
28
29 #define MT7915_RX_RING_SIZE 1536
30 #define MT7915_RX_MCU_RING_SIZE 512
31
32 #define MT7915_FIRMWARE_WA "mediatek/mt7915_wa.bin"
33 #define MT7915_FIRMWARE_WM "mediatek/mt7915_wm.bin"
34 #define MT7915_ROM_PATCH "mediatek/mt7915_rom_patch.bin"
35
36 #define MT7916_FIRMWARE_WA "mediatek/mt7916_wa.bin"
37 #define MT7916_FIRMWARE_WM "mediatek/mt7916_wm.bin"
38 #define MT7916_ROM_PATCH "mediatek/mt7916_rom_patch.bin"
39
40 #define MT7981_FIRMWARE_WA "mediatek/mt7981_wa.bin"
41 #define MT7981_FIRMWARE_WM "mediatek/mt7981_wm.bin"
42 #define MT7981_ROM_PATCH "mediatek/mt7981_rom_patch.bin"
43
44 #define MT7986_FIRMWARE_WA "mediatek/mt7986_wa.bin"
45 #define MT7986_FIRMWARE_WM "mediatek/mt7986_wm.bin"
46 #define MT7986_FIRMWARE_WM_MT7975 "mediatek/mt7986_wm_mt7975.bin"
47 #define MT7986_ROM_PATCH "mediatek/mt7986_rom_patch.bin"
48 #define MT7986_ROM_PATCH_MT7975 "mediatek/mt7986_rom_patch_mt7975.bin"
49
50 #define MT7915_EEPROM_DEFAULT "mediatek/mt7915_eeprom.bin"
51 #define MT7915_EEPROM_DEFAULT_DBDC "mediatek/mt7915_eeprom_dbdc.bin"
52 #define MT7916_EEPROM_DEFAULT "mediatek/mt7916_eeprom.bin"
53
54 #define MT7981_EEPROM_MT7976_DEFAULT_DBDC "mediatek/mt7981_eeprom_mt7976_dbdc.bin"
55
56 #define MT7986_EEPROM_MT7975_DEFAULT "mediatek/mt7986_eeprom_mt7975.bin"
57 #define MT7986_EEPROM_MT7975_DUAL_DEFAULT "mediatek/mt7986_eeprom_mt7975_dual.bin"
58 #define MT7986_EEPROM_MT7976_DEFAULT "mediatek/mt7986_eeprom_mt7976.bin"
59 #define MT7986_EEPROM_MT7976_DEFAULT_DBDC "mediatek/mt7986_eeprom_mt7976_dbdc.bin"
60 #define MT7986_EEPROM_MT7976_DUAL_DEFAULT "mediatek/mt7986_eeprom_mt7976_dual.bin"
61
62 #define MT7915_EEPROM_SIZE 3584
63 #define MT7916_EEPROM_SIZE 4096
64
65 #define MT7915_EEPROM_BLOCK_SIZE 16
66 #define MT7915_HW_TOKEN_SIZE 4096
67 #define MT7915_TOKEN_SIZE 8192
68
69 #define MT7915_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */
70 #define MT7915_CFEND_RATE_11B 0x03 /* 11B LP, 11M */
71
72 #define MT7915_THERMAL_THROTTLE_MAX 100
73 #define MT7915_CDEV_THROTTLE_MAX 99
74
75 #define MT7915_SKU_RATE_NUM 161
76 #define MT7915_SKU_PATH_NUM 185
77
78 #define MT7915_MAX_TWT_AGRT 16
79 #define MT7915_MAX_STA_TWT_AGRT 8
80 #define MT7915_MIN_TWT_DUR 64
81 #define MT7915_MAX_QUEUE (MT_RXQ_BAND2 + __MT_MCUQ_MAX + 2)
82
83 #define MT7915_WED_RX_TOKEN_SIZE 12288
84
85 #define MT7915_CRIT_TEMP_IDX 0
86 #define MT7915_MAX_TEMP_IDX 1
87 #define MT7915_CRIT_TEMP 110
88 #define MT7915_MAX_TEMP 120
89
90 struct mt7915_vif;
91 struct mt7915_sta;
92 struct mt7915_dfs_pulse;
93 struct mt7915_dfs_pattern;
94
95 enum mt7915_txq_id {
96 MT7915_TXQ_FWDL = 16,
97 MT7915_TXQ_MCU_WM,
98 MT7915_TXQ_BAND0,
99 MT7915_TXQ_BAND1,
100 MT7915_TXQ_MCU_WA,
101 };
102
103 enum mt7915_rxq_id {
104 MT7915_RXQ_BAND0 = 0,
105 MT7915_RXQ_BAND1,
106 MT7915_RXQ_MCU_WM = 0,
107 MT7915_RXQ_MCU_WA,
108 MT7915_RXQ_MCU_WA_EXT,
109 };
110
111 enum mt7916_rxq_id {
112 MT7916_RXQ_MCU_WM = 0,
113 MT7916_RXQ_MCU_WA,
114 MT7916_RXQ_MCU_WA_MAIN,
115 MT7916_RXQ_MCU_WA_EXT,
116 MT7916_RXQ_BAND0,
117 MT7916_RXQ_BAND1,
118 };
119
120 struct mt7915_twt_flow {
121 struct list_head list;
122 u64 start_tsf;
123 u64 tsf;
124 u32 duration;
125 u16 wcid;
126 __le16 mantissa;
127 u8 exp;
128 u8 table_id;
129 u8 id;
130 u8 protection:1;
131 u8 flowtype:1;
132 u8 trigger:1;
133 u8 sched:1;
134 };
135
136 DECLARE_EWMA(avg_signal, 10, 8)
137
138 struct mt7915_sta {
139 struct mt76_wcid wcid; /* must be first */
140
141 struct mt7915_vif *vif;
142
143 struct list_head rc_list;
144 u32 airtime_ac[8];
145
146 int ack_signal;
147 struct ewma_avg_signal avg_ack_signal;
148
149 unsigned long changed;
150 unsigned long jiffies;
151 struct mt76_connac_sta_key_conf bip;
152
153 struct {
154 u8 flowid_mask;
155 struct mt7915_twt_flow flow[MT7915_MAX_STA_TWT_AGRT];
156 } twt;
157 };
158
159 struct mt7915_vif_cap {
160 bool ht_ldpc:1;
161 bool vht_ldpc:1;
162 bool he_ldpc:1;
163 bool vht_su_ebfer:1;
164 bool vht_su_ebfee:1;
165 bool vht_mu_ebfer:1;
166 bool vht_mu_ebfee:1;
167 bool he_su_ebfer:1;
168 bool he_su_ebfee:1;
169 bool he_mu_ebfer:1;
170 };
171
172 struct mt7915_vif {
173 struct mt76_vif_link mt76; /* must be first */
174
175 struct mt7915_vif_cap cap;
176 struct mt7915_sta sta;
177 struct mt7915_phy *phy;
178
179 struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS];
180 struct cfg80211_bitrate_mask bitrate_mask;
181 };
182
183 /* crash-dump */
184 struct mt7915_crash_data {
185 guid_t guid;
186 struct timespec64 timestamp;
187
188 u8 *memdump_buf;
189 size_t memdump_buf_len;
190 };
191
192 struct mt7915_hif {
193 struct list_head list;
194
195 struct device *dev;
196 void __iomem *regs;
197 int irq;
198 u32 index;
199 };
200
201 struct mt7915_phy {
202 struct mt76_phy *mt76;
203 struct mt7915_dev *dev;
204
205 struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
206
207 struct ieee80211_vif *monitor_vif;
208
209 struct thermal_cooling_device *cdev;
210 u8 cdev_state;
211 u8 throttle_state;
212 u32 throttle_temp[2]; /* 0: critical high, 1: maximum */
213
214 u32 rxfilter;
215 u64 omac_mask;
216
217 u16 noise;
218
219 s16 coverage_class;
220 u8 slottime;
221
222 u32 trb_ts;
223
224 u32 rx_ampdu_ts;
225 u32 ampdu_ref;
226
227 struct mt76_mib_stats mib;
228 struct mt76_channel_state state_ts;
229
230 bool sku_limit_en:1;
231 bool sku_path_en:1;
232
233 #ifdef CONFIG_NL80211_TESTMODE
234 struct {
235 u32 *reg_backup;
236
237 s32 last_freq_offset;
238 u8 last_rcpi[4];
239 s8 last_ib_rssi[4];
240 s8 last_wb_rssi[4];
241 u8 last_snr;
242
243 u8 spe_idx;
244 } test;
245 #endif
246 };
247
248 struct mt7915_dev {
249 union { /* must be first */
250 struct mt76_dev mt76;
251 struct mt76_phy mphy;
252 };
253
254 struct mt7915_hif *hif2;
255 struct mt7915_reg_desc reg;
256 u8 q_id[MT7915_MAX_QUEUE];
257 u32 q_int_mask[MT7915_MAX_QUEUE];
258 u32 wfdma_mask;
259
260 const struct mt76_bus_ops *bus_ops;
261 struct mt7915_phy phy;
262
263 /* monitor rx chain configured channel */
264 struct cfg80211_chan_def rdd2_chandef;
265 struct mt7915_phy *rdd2_phy;
266
267 u16 chainmask;
268 u16 chainshift;
269 u32 hif_idx;
270
271 struct work_struct init_work;
272 struct work_struct rc_work;
273 struct work_struct dump_work;
274 struct work_struct reset_work;
275 wait_queue_head_t reset_wait;
276
277 struct {
278 u32 state;
279 u32 wa_reset_count;
280 u32 wm_reset_count;
281 bool hw_full_reset:1;
282 bool hw_init_done:1;
283 bool restart:1;
284 } recovery;
285
286 /* protects coredump data */
287 struct mutex dump_mutex;
288 #ifdef CONFIG_DEV_COREDUMP
289 struct {
290 struct mt7915_crash_data *crash_data;
291 } coredump;
292 #endif
293
294 struct list_head sta_rc_list;
295 struct list_head twt_list;
296 spinlock_t reg_lock;
297
298 u32 hw_pattern;
299
300 bool dbdc_support;
301 bool flash_mode;
302 bool muru_debug;
303 bool ibf;
304
305 u8 monitor_mask;
306
307 struct dentry *debugfs_dir;
308 struct rchan *relay_fwlog;
309
310 void *cal;
311 u32 cur_prek_offset;
312 u8 dpd_chan_num_2g;
313 u8 dpd_chan_num_5g;
314 u8 dpd_chan_num_6g;
315
316 struct {
317 u8 debug_wm;
318 u8 debug_wa;
319 u8 debug_bin;
320 } fw;
321
322 struct {
323 u16 table_mask;
324 u8 n_agrt;
325 } twt;
326
327 struct reset_control *rstc;
328 void __iomem *dcm;
329 void __iomem *sku;
330 };
331
332 enum {
333 WFDMA0 = 0x0,
334 WFDMA1,
335 WFDMA_EXT,
336 __MT_WFDMA_MAX,
337 };
338
339 enum rdd_idx {
340 MT_RDD_IDX_BAND0, /* RDD idx for band idx 0 (single-band) */
341 MT_RDD_IDX_BAND1, /* RDD idx for band idx 1 */
342 MT_RDD_IDX_BACKGROUND, /* RDD idx for background chain */
343 };
344
345 enum mt7915_rdd_cmd {
346 RDD_STOP,
347 RDD_START,
348 RDD_DET_MODE,
349 RDD_RADAR_EMULATE,
350 RDD_START_TXQ = 20,
351 RDD_SET_WF_ANT = 30,
352 RDD_CAC_START = 50,
353 RDD_CAC_END,
354 RDD_NORMAL_START,
355 RDD_DISABLE_DFS_CAL,
356 RDD_PULSE_DBG,
357 RDD_READ_PULSE,
358 RDD_RESUME_BF,
359 RDD_IRQ_OFF,
360 };
361
362 static inline int
mt7915_get_rdd_idx(struct mt7915_phy * phy,bool is_background)363 mt7915_get_rdd_idx(struct mt7915_phy *phy, bool is_background)
364 {
365 if (!phy->mt76->cap.has_5ghz)
366 return -1;
367
368 if (is_background)
369 return MT_RDD_IDX_BACKGROUND;
370
371 return phy->mt76->band_idx;
372 }
373
374 static inline struct mt7915_phy *
mt7915_hw_phy(struct ieee80211_hw * hw)375 mt7915_hw_phy(struct ieee80211_hw *hw)
376 {
377 struct mt76_phy *phy = hw->priv;
378
379 return phy->priv;
380 }
381
382 static inline struct mt7915_dev *
mt7915_hw_dev(struct ieee80211_hw * hw)383 mt7915_hw_dev(struct ieee80211_hw *hw)
384 {
385 struct mt76_phy *phy = hw->priv;
386
387 return container_of(phy->dev, struct mt7915_dev, mt76);
388 }
389
390 static inline struct mt7915_phy *
mt7915_ext_phy(struct mt7915_dev * dev)391 mt7915_ext_phy(struct mt7915_dev *dev)
392 {
393 struct mt76_phy *phy = dev->mt76.phys[MT_BAND1];
394
395 if (!phy)
396 return NULL;
397
398 return phy->priv;
399 }
400
mt7915_check_adie(struct mt7915_dev * dev,bool sku)401 static inline u32 mt7915_check_adie(struct mt7915_dev *dev, bool sku)
402 {
403 u32 mask = sku ? MT_CONNINFRA_SKU_MASK : MT_ADIE_TYPE_MASK;
404 if (!is_mt798x(&dev->mt76))
405 return 0;
406
407 return mt76_rr(dev, MT_CONNINFRA_SKU_DEC_ADDR) & mask;
408 }
409
410 extern const struct ieee80211_ops mt7915_ops;
411 extern const struct mt76_testmode_ops mt7915_testmode_ops;
412 extern struct pci_driver mt7915_pci_driver;
413 extern struct pci_driver mt7915_hif_driver;
414 extern struct platform_driver mt798x_wmac_driver;
415
416 #ifdef CONFIG_MT798X_WMAC
417 int mt7986_wmac_enable(struct mt7915_dev *dev);
418 void mt7986_wmac_disable(struct mt7915_dev *dev);
419 #else
mt7986_wmac_enable(struct mt7915_dev * dev)420 static inline int mt7986_wmac_enable(struct mt7915_dev *dev)
421 {
422 return 0;
423 }
424
mt7986_wmac_disable(struct mt7915_dev * dev)425 static inline void mt7986_wmac_disable(struct mt7915_dev *dev)
426 {
427 }
428 #endif
429 struct mt7915_dev *mt7915_mmio_probe(struct device *pdev,
430 void __iomem *mem_base, u32 device_id);
431 void mt7915_wfsys_reset(struct mt7915_dev *dev);
432 irqreturn_t mt7915_irq_handler(int irq, void *dev_instance);
433 u64 __mt7915_get_tsf(struct ieee80211_hw *hw, struct mt7915_vif *mvif);
434 u32 mt7915_wed_init_buf(void *ptr, dma_addr_t phys, int token_id);
435
436 int mt7915_register_device(struct mt7915_dev *dev);
437 void mt7915_unregister_device(struct mt7915_dev *dev);
438 int mt7915_eeprom_init(struct mt7915_dev *dev);
439 void mt7915_eeprom_parse_hw_cap(struct mt7915_dev *dev,
440 struct mt7915_phy *phy);
441 int mt7915_eeprom_get_target_power(struct mt7915_dev *dev,
442 struct ieee80211_channel *chan,
443 u8 chain_idx);
444 s8 mt7915_eeprom_get_power_delta(struct mt7915_dev *dev, int band);
445 bool mt7915_eeprom_has_background_radar(struct mt7915_dev *dev);
446 int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2);
447 void mt7915_dma_prefetch(struct mt7915_dev *dev);
448 void mt7915_dma_cleanup(struct mt7915_dev *dev);
449 int mt7915_dma_reset(struct mt7915_dev *dev, bool force);
450 int mt7915_dma_start(struct mt7915_dev *dev, bool reset, bool wed_reset);
451 int mt7915_txbf_init(struct mt7915_dev *dev);
452 void mt7915_init_txpower(struct mt7915_phy *phy);
453 void mt7915_reset(struct mt7915_dev *dev);
454 int mt7915_run(struct ieee80211_hw *hw);
455 int mt7915_mcu_init(struct mt7915_dev *dev);
456 int mt7915_mcu_init_firmware(struct mt7915_dev *dev);
457 int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev,
458 struct mt7915_vif *mvif,
459 struct mt7915_twt_flow *flow,
460 int cmd);
461 int mt7915_mcu_add_dev_info(struct mt7915_phy *phy,
462 struct ieee80211_vif *vif, bool enable);
463 int mt7915_mcu_add_bss_info(struct mt7915_phy *phy,
464 struct ieee80211_vif *vif, int enable);
465 int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif,
466 struct ieee80211_sta *sta, int conn_state, bool newly);
467 int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev,
468 struct ieee80211_ampdu_params *params,
469 bool add);
470 int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev,
471 struct ieee80211_ampdu_params *params,
472 bool add);
473 int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif,
474 struct cfg80211_he_bss_color *he_bss_color);
475 int mt7915_mcu_add_inband_discov(struct mt7915_dev *dev, struct ieee80211_vif *vif,
476 u32 changed);
477 int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
478 int enable, u32 changed);
479 int mt7915_mcu_add_obss_spr(struct mt7915_phy *phy, struct ieee80211_vif *vif,
480 struct ieee80211_he_obss_pd *he_obss_pd);
481 int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif,
482 struct ieee80211_sta *sta, bool changed);
483 int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif,
484 struct ieee80211_sta *sta);
485 int mt7915_set_channel(struct mt76_phy *mphy);
486 int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd);
487 int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif);
488 int mt7915_mcu_update_edca(struct mt7915_dev *dev, void *req);
489 int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev,
490 struct ieee80211_vif *vif,
491 struct ieee80211_sta *sta,
492 void *data, u32 field);
493 int mt7915_mcu_set_eeprom(struct mt7915_dev *dev);
494 int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset, u8 *read_buf);
495 int mt7915_mcu_get_eeprom_free_block(struct mt7915_dev *dev, u8 *block_num);
496 int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band, bool enable,
497 bool hdr_trans);
498 int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode,
499 u8 en);
500 int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band);
501 int mt7915_mcu_set_sku_en(struct mt7915_phy *phy);
502 int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy);
503 int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len,
504 u8 category);
505 int mt7915_mcu_set_txpower_frame_min(struct mt7915_phy *phy, s8 txpower);
506 int mt7915_mcu_set_txpower_frame(struct mt7915_phy *phy,
507 struct ieee80211_vif *vif,
508 struct ieee80211_sta *sta, s8 txpower);
509 int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action);
510 int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val);
511 int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev,
512 const struct mt7915_dfs_pulse *pulse);
513 int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index,
514 const struct mt7915_dfs_pattern *pattern);
515 int mt7915_mcu_set_muru_ctrl(struct mt7915_dev *dev, u32 cmd, u32 val);
516 int mt7915_mcu_apply_group_cal(struct mt7915_dev *dev);
517 int mt7915_mcu_apply_tx_dpd(struct mt7915_phy *phy);
518 int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch);
519 int mt7915_mcu_get_temperature(struct mt7915_phy *phy);
520 int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state);
521 int mt7915_mcu_set_thermal_protect(struct mt7915_phy *phy);
522 int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif,
523 struct ieee80211_sta *sta, struct rate_info *rate);
524 int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy,
525 struct cfg80211_chan_def *chandef);
526 int mt7915_mcu_wed_wa_tx_stats(struct mt7915_dev *dev, u16 wcid);
527 int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set);
528 int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3);
529 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl);
530 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level);
531 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb);
532 void mt7915_mcu_exit(struct mt7915_dev *dev);
533
mt7915_wtbl_size(struct mt7915_dev * dev)534 static inline u16 mt7915_wtbl_size(struct mt7915_dev *dev)
535 {
536 return is_mt7915(&dev->mt76) ? MT7915_WTBL_SIZE : MT7916_WTBL_SIZE;
537 }
538
mt7915_eeprom_size(struct mt7915_dev * dev)539 static inline u16 mt7915_eeprom_size(struct mt7915_dev *dev)
540 {
541 return is_mt7915(&dev->mt76) ? MT7915_EEPROM_SIZE : MT7916_EEPROM_SIZE;
542 }
543
544 void mt7915_dual_hif_set_irq_mask(struct mt7915_dev *dev, bool write_reg,
545 u32 clear, u32 set);
546
mt7915_irq_enable(struct mt7915_dev * dev,u32 mask)547 static inline void mt7915_irq_enable(struct mt7915_dev *dev, u32 mask)
548 {
549 if (dev->hif2)
550 mt7915_dual_hif_set_irq_mask(dev, false, 0, mask);
551 else
552 mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
553
554 tasklet_schedule(&dev->mt76.irq_tasklet);
555 }
556
mt7915_irq_disable(struct mt7915_dev * dev,u32 mask)557 static inline void mt7915_irq_disable(struct mt7915_dev *dev, u32 mask)
558 {
559 if (dev->hif2)
560 mt7915_dual_hif_set_irq_mask(dev, true, mask, 0);
561 else
562 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0);
563 }
564
565 void mt7915_memcpy_fromio(struct mt7915_dev *dev, void *buf, u32 offset,
566 size_t len);
567
568 void mt7915_mac_init(struct mt7915_dev *dev);
569 u32 mt7915_mac_wtbl_lmac_addr(struct mt7915_dev *dev, u16 wcid, u8 dw);
570 bool mt7915_mac_wtbl_update(struct mt7915_dev *dev, int idx, u32 mask);
571 void mt7915_mac_reset_counters(struct mt7915_phy *phy);
572 void mt7915_mac_cca_stats_reset(struct mt7915_phy *phy);
573 void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool ext_phy);
574 void mt7915_mac_enable_rtscts(struct mt7915_dev *dev,
575 struct ieee80211_vif *vif, bool enable);
576 void mt7915_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi,
577 struct sk_buff *skb, struct mt76_wcid *wcid, int pid,
578 struct ieee80211_key_conf *key,
579 enum mt76_txq_id qid, u32 changed);
580 void mt7915_mac_set_timing(struct mt7915_phy *phy);
581 int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
582 struct ieee80211_sta *sta);
583 int mt7915_mac_sta_event(struct mt76_dev *mdev, struct ieee80211_vif *vif,
584 struct ieee80211_sta *sta, enum mt76_sta_event ev);
585 void mt7915_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
586 struct ieee80211_sta *sta);
587 void mt7915_mac_work(struct work_struct *work);
588 void mt7915_mac_reset_work(struct work_struct *work);
589 void mt7915_mac_dump_work(struct work_struct *work);
590 void mt7915_mac_sta_rc_work(struct work_struct *work);
591 void mt7915_mac_update_stats(struct mt7915_phy *phy);
592 void mt7915_mac_twt_teardown_flow(struct mt7915_dev *dev,
593 struct mt7915_sta *msta,
594 u8 flowid);
595 void mt7915_mac_add_twt_setup(struct ieee80211_hw *hw,
596 struct ieee80211_sta *sta,
597 struct ieee80211_twt_setup *twt);
598 int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
599 enum mt76_txq_id qid, struct mt76_wcid *wcid,
600 struct ieee80211_sta *sta,
601 struct mt76_tx_info *tx_info);
602 void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
603 struct sk_buff *skb, u32 *info);
604 bool mt7915_rx_check(struct mt76_dev *mdev, void *data, int len);
605 void mt7915_stats_work(struct work_struct *work);
606 int mt76_dfs_start_rdd(struct mt7915_dev *dev, bool force);
607 int mt7915_dfs_init_radar_detector(struct mt7915_phy *phy);
608 void mt7915_set_stream_he_caps(struct mt7915_phy *phy);
609 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy);
610 void mt7915_update_channel(struct mt76_phy *mphy);
611 int mt7915_mcu_muru_debug_set(struct mt7915_dev *dev, bool enable);
612 int mt7915_mcu_muru_debug_get(struct mt7915_phy *phy);
613 int mt7915_mcu_wed_enable_rx_stats(struct mt7915_dev *dev);
614 int mt7915_init_debugfs(struct mt7915_phy *phy);
615 void mt7915_debugfs_rx_fw_monitor(struct mt7915_dev *dev, const void *data, int len);
616 bool mt7915_debugfs_rx_log(struct mt7915_dev *dev, const void *data, int len);
617 #ifdef CONFIG_MAC80211_DEBUGFS
618 void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
619 struct ieee80211_sta *sta, struct dentry *dir);
620 #endif
621 int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr,
622 bool pci, int *irq);
623
624 #endif
625