1 /*
2 * Copyright 2020 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26 #include "reg_helper.h"
27 #include "core_types.h"
28 #include "dcn30_dccg.h"
29
30 #define TO_DCN_DCCG(dccg)\
31 container_of(dccg, struct dcn_dccg, base)
32
33 #define REG(reg) \
34 (dccg_dcn->regs->reg)
35
36 #undef FN
37 #define FN(reg_name, field_name) \
38 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
39
40 #define CTX \
41 dccg_dcn->base.ctx
42 #define DC_LOGGER \
43 dccg->ctx->logger
44
45
46 static const struct dccg_funcs dccg3_funcs = {
47 .update_dpp_dto = dccg2_update_dpp_dto,
48 .get_dccg_ref_freq = dccg2_get_dccg_ref_freq,
49 .set_fifo_errdet_ovr_en = dccg2_set_fifo_errdet_ovr_en,
50 .otg_add_pixel = dccg2_otg_add_pixel,
51 .otg_drop_pixel = dccg2_otg_drop_pixel,
52 .dccg_init = dccg2_init,
53 .refclk_setup = dccg2_refclk_setup, /* Deprecated - for backward compatibility only */
54 .allow_clock_gating = dccg2_allow_clock_gating,
55 .enable_memory_low_power = dccg2_enable_memory_low_power,
56 .is_s0i3_golden_init_wa_done = dccg2_is_s0i3_golden_init_wa_done /* Deprecated - for backward compatibility only */
57 };
58
dccg3_create(struct dc_context * ctx,const struct dccg_registers * regs,const struct dccg_shift * dccg_shift,const struct dccg_mask * dccg_mask)59 struct dccg *dccg3_create(
60 struct dc_context *ctx,
61 const struct dccg_registers *regs,
62 const struct dccg_shift *dccg_shift,
63 const struct dccg_mask *dccg_mask)
64 {
65 struct dcn_dccg *dccg_dcn = kzalloc_obj(*dccg_dcn);
66 struct dccg *base;
67
68 if (dccg_dcn == NULL) {
69 BREAK_TO_DEBUGGER();
70 return NULL;
71 }
72
73 base = &dccg_dcn->base;
74 base->ctx = ctx;
75 base->funcs = &dccg3_funcs;
76
77 dccg_dcn->regs = regs;
78 dccg_dcn->dccg_shift = dccg_shift;
79 dccg_dcn->dccg_mask = dccg_mask;
80
81 return &dccg_dcn->base;
82 }
83
dccg30_create(struct dc_context * ctx,const struct dccg_registers * regs,const struct dccg_shift * dccg_shift,const struct dccg_mask * dccg_mask)84 struct dccg *dccg30_create(
85 struct dc_context *ctx,
86 const struct dccg_registers *regs,
87 const struct dccg_shift *dccg_shift,
88 const struct dccg_mask *dccg_mask)
89 {
90 struct dcn_dccg *dccg_dcn = kzalloc_obj(*dccg_dcn);
91 struct dccg *base;
92
93 if (dccg_dcn == NULL) {
94 BREAK_TO_DEBUGGER();
95 return NULL;
96 }
97
98 base = &dccg_dcn->base;
99 base->ctx = ctx;
100 base->funcs = &dccg3_funcs;
101
102 dccg_dcn->regs = regs;
103 dccg_dcn->dccg_shift = dccg_shift;
104 dccg_dcn->dccg_mask = dccg_mask;
105
106 return &dccg_dcn->base;
107 }
108