1 /*
2  * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
3  * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
4  * Copyright (c) 2008 Red Hat Inc.
5  * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
6  * Copyright (c) 2007-2008 Intel Corporation
7  *
8  * Permission is hereby granted, free of charge, to any person obtaining a
9  * copy of this software and associated documentation files (the "Software"),
10  * to deal in the Software without restriction, including without limitation
11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12  * and/or sell copies of the Software, and to permit persons to whom the
13  * Software is furnished to do so, subject to the following conditions:
14  *
15  * The above copyright notice and this permission notice shall be included in
16  * all copies or substantial portions of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24  * IN THE SOFTWARE.
25  */
26 
27 #ifndef _DRM_MODE_H
28 #define _DRM_MODE_H
29 
30 #define DRM_DISPLAY_INFO_LEN	32
31 #define DRM_CONNECTOR_NAME_LEN	32
32 #define DRM_DISPLAY_MODE_LEN	32
33 #define DRM_PROP_NAME_LEN	32
34 
35 #define DRM_MODE_TYPE_BUILTIN	(1<<0)
36 #define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN)
37 #define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN)
38 #define DRM_MODE_TYPE_PREFERRED	(1<<3)
39 #define DRM_MODE_TYPE_DEFAULT	(1<<4)
40 #define DRM_MODE_TYPE_USERDEF	(1<<5)
41 #define DRM_MODE_TYPE_DRIVER	(1<<6)
42 
43 /* Video mode flags */
44 /* bit compatible with the xorg definitions. */
45 #define DRM_MODE_FLAG_PHSYNC	(1<<0)
46 #define DRM_MODE_FLAG_NHSYNC	(1<<1)
47 #define DRM_MODE_FLAG_PVSYNC	(1<<2)
48 #define DRM_MODE_FLAG_NVSYNC	(1<<3)
49 #define DRM_MODE_FLAG_INTERLACE	(1<<4)
50 #define DRM_MODE_FLAG_DBLSCAN	(1<<5)
51 #define DRM_MODE_FLAG_CSYNC	(1<<6)
52 #define DRM_MODE_FLAG_PCSYNC	(1<<7)
53 #define DRM_MODE_FLAG_NCSYNC	(1<<8)
54 #define DRM_MODE_FLAG_HSKEW	(1<<9) /* hskew provided */
55 #define DRM_MODE_FLAG_BCAST	(1<<10)
56 #define DRM_MODE_FLAG_PIXMUX	(1<<11)
57 #define DRM_MODE_FLAG_DBLCLK	(1<<12)
58 #define DRM_MODE_FLAG_CLKDIV2	(1<<13)
59 
60 /* DPMS flags */
61 /* bit compatible with the xorg definitions. */
62 #define DRM_MODE_DPMS_ON	0
63 #define DRM_MODE_DPMS_STANDBY	1
64 #define DRM_MODE_DPMS_SUSPEND	2
65 #define DRM_MODE_DPMS_OFF	3
66 
67 /* Scaling mode options */
68 #define DRM_MODE_SCALE_NONE		0 /* Unmodified timing (display or
69 					     software can still scale) */
70 #define DRM_MODE_SCALE_FULLSCREEN	1 /* Full screen, ignore aspect */
71 #define DRM_MODE_SCALE_CENTER		2 /* Centered, no scaling */
72 #define DRM_MODE_SCALE_ASPECT		3 /* Full screen, preserve aspect */
73 
74 /* Dithering mode options */
75 #define DRM_MODE_DITHERING_OFF	0
76 #define DRM_MODE_DITHERING_ON	1
77 #define DRM_MODE_DITHERING_AUTO 2
78 
79 /* Dirty info options */
80 #define DRM_MODE_DIRTY_OFF      0
81 #define DRM_MODE_DIRTY_ON       1
82 #define DRM_MODE_DIRTY_ANNOTATE 2
83 
84 struct drm_mode_modeinfo {
85 	__u32 clock;
86 	__u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
87 	__u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
88 
89 	__u32 vrefresh;
90 
91 	__u32 flags;
92 	__u32 type;
93 	char name[DRM_DISPLAY_MODE_LEN];
94 };
95 
96 struct drm_mode_card_res {
97 	__u64 fb_id_ptr;
98 	__u64 crtc_id_ptr;
99 	__u64 connector_id_ptr;
100 	__u64 encoder_id_ptr;
101 	__u32 count_fbs;
102 	__u32 count_crtcs;
103 	__u32 count_connectors;
104 	__u32 count_encoders;
105 	__u32 min_width, max_width;
106 	__u32 min_height, max_height;
107 };
108 
109 struct drm_mode_crtc {
110 	__u64 set_connectors_ptr;
111 	__u32 count_connectors;
112 
113 	__u32 crtc_id; /**< Id */
114 	__u32 fb_id; /**< Id of framebuffer */
115 
116 	__u32 x, y; /**< Position on the frameuffer */
117 
118 	__u32 gamma_size;
119 	__u32 mode_valid;
120 	struct drm_mode_modeinfo mode;
121 };
122 
123 #define DRM_MODE_PRESENT_TOP_FIELD	(1<<0)
124 #define DRM_MODE_PRESENT_BOTTOM_FIELD	(1<<1)
125 
126 /* Planes blend with or override other bits on the CRTC */
127 struct drm_mode_set_plane {
128 	__u32 plane_id;
129 	__u32 crtc_id;
130 	__u32 fb_id; /* fb object contains surface format type */
131 	__u32 flags; /* see above flags */
132 
133 	/* Signed dest location allows it to be partially off screen */
134 	__s32 crtc_x, crtc_y;
135 	__u32 crtc_w, crtc_h;
136 
137 	/* Source values are 16.16 fixed point */
138 	__u32 src_x, src_y;
139 	__u32 src_h, src_w;
140 };
141 
142 struct drm_mode_get_plane {
143 	__u32 plane_id;
144 
145 	__u32 crtc_id;
146 	__u32 fb_id;
147 
148 	__u32 possible_crtcs;
149 	__u32 gamma_size;
150 
151 	__u32 count_format_types;
152 	__u64 format_type_ptr;
153 };
154 
155 struct drm_mode_get_plane_res {
156 	__u64 plane_id_ptr;
157 	__u32 count_planes;
158 };
159 
160 #define DRM_MODE_ENCODER_NONE	0
161 #define DRM_MODE_ENCODER_DAC	1
162 #define DRM_MODE_ENCODER_TMDS	2
163 #define DRM_MODE_ENCODER_LVDS	3
164 #define DRM_MODE_ENCODER_TVDAC	4
165 #define DRM_MODE_ENCODER_VIRTUAL 5
166 
167 struct drm_mode_get_encoder {
168 	__u32 encoder_id;
169 	__u32 encoder_type;
170 
171 	__u32 crtc_id; /**< Id of crtc */
172 
173 	__u32 possible_crtcs;
174 	__u32 possible_clones;
175 };
176 
177 /* This is for connectors with multiple signal types. */
178 /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
179 #define DRM_MODE_SUBCONNECTOR_Automatic	0
180 #define DRM_MODE_SUBCONNECTOR_Unknown	0
181 #define DRM_MODE_SUBCONNECTOR_DVID	3
182 #define DRM_MODE_SUBCONNECTOR_DVIA	4
183 #define DRM_MODE_SUBCONNECTOR_Composite	5
184 #define DRM_MODE_SUBCONNECTOR_SVIDEO	6
185 #define DRM_MODE_SUBCONNECTOR_Component	8
186 #define DRM_MODE_SUBCONNECTOR_SCART	9
187 
188 #define DRM_MODE_CONNECTOR_Unknown	0
189 #define DRM_MODE_CONNECTOR_VGA		1
190 #define DRM_MODE_CONNECTOR_DVII		2
191 #define DRM_MODE_CONNECTOR_DVID		3
192 #define DRM_MODE_CONNECTOR_DVIA		4
193 #define DRM_MODE_CONNECTOR_Composite	5
194 #define DRM_MODE_CONNECTOR_SVIDEO	6
195 #define DRM_MODE_CONNECTOR_LVDS		7
196 #define DRM_MODE_CONNECTOR_Component	8
197 #define DRM_MODE_CONNECTOR_9PinDIN	9
198 #define DRM_MODE_CONNECTOR_DisplayPort	10
199 #define DRM_MODE_CONNECTOR_HDMIA	11
200 #define DRM_MODE_CONNECTOR_HDMIB	12
201 #define DRM_MODE_CONNECTOR_TV		13
202 #define DRM_MODE_CONNECTOR_eDP		14
203 #define DRM_MODE_CONNECTOR_VIRTUAL      15
204 
205 struct drm_mode_get_connector {
206 
207 	__u64 encoders_ptr;
208 	__u64 modes_ptr;
209 	__u64 props_ptr;
210 	__u64 prop_values_ptr;
211 
212 	__u32 count_modes;
213 	__u32 count_props;
214 	__u32 count_encoders;
215 
216 	__u32 encoder_id; /**< Current Encoder */
217 	__u32 connector_id; /**< Id */
218 	__u32 connector_type;
219 	__u32 connector_type_id;
220 
221 	__u32 connection;
222 	__u32 mm_width, mm_height; /**< HxW in millimeters */
223 	__u32 subpixel;
224 };
225 
226 #define DRM_MODE_PROP_PENDING	(1<<0)
227 #define DRM_MODE_PROP_RANGE	(1<<1)
228 #define DRM_MODE_PROP_IMMUTABLE	(1<<2)
229 #define DRM_MODE_PROP_ENUM	(1<<3) /* enumerated type with text strings */
230 #define DRM_MODE_PROP_BLOB	(1<<4)
231 
232 struct drm_mode_property_enum {
233 	__u64 value;
234 	char name[DRM_PROP_NAME_LEN];
235 };
236 
237 struct drm_mode_get_property {
238 	__u64 values_ptr; /* values and blob lengths */
239 	__u64 enum_blob_ptr; /* enum and blob id ptrs */
240 
241 	__u32 prop_id;
242 	__u32 flags;
243 	char name[DRM_PROP_NAME_LEN];
244 
245 	__u32 count_values;
246 	__u32 count_enum_blobs;
247 };
248 
249 struct drm_mode_connector_set_property {
250 	__u64 value;
251 	__u32 prop_id;
252 	__u32 connector_id;
253 };
254 
255 struct drm_mode_get_blob {
256 	__u32 blob_id;
257 	__u32 length;
258 	__u64 data;
259 };
260 
261 struct drm_mode_fb_cmd {
262 	__u32 fb_id;
263 	__u32 width, height;
264 	__u32 pitch;
265 	__u32 bpp;
266 	__u32 depth;
267 	/* driver specific handle */
268 	__u32 handle;
269 };
270 
271 #define DRM_MODE_FB_INTERLACED	(1<<0) /* for interlaced framebuffers */
272 
273 struct drm_mode_fb_cmd2 {
274 	__u32 fb_id;
275 	__u32 width, height;
276 	__u32 pixel_format; /* fourcc code from drm_fourcc.h */
277 	__u32 flags; /* see above flags */
278 
279 	/*
280 	 * In case of planar formats, this ioctl allows up to 4
281 	 * buffer objects with offets and pitches per plane.
282 	 * The pitch and offset order is dictated by the fourcc,
283 	 * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
284 	 *
285 	 *   YUV 4:2:0 image with a plane of 8 bit Y samples
286 	 *   followed by an interleaved U/V plane containing
287 	 *   8 bit 2x2 subsampled colour difference samples.
288 	 *
289 	 * So it would consist of Y as offset[0] and UV as
290 	 * offeset[1].  Note that offset[0] will generally
291 	 * be 0.
292 	 */
293 	__u32 handles[4];
294 	__u32 pitches[4]; /* pitch for each plane */
295 	__u32 offsets[4]; /* offset of each plane */
296 };
297 
298 #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
299 #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
300 #define DRM_MODE_FB_DIRTY_FLAGS         0x03
301 
302 #define DRM_MODE_FB_DIRTY_MAX_CLIPS     256
303 
304 /*
305  * Mark a region of a framebuffer as dirty.
306  *
307  * Some hardware does not automatically update display contents
308  * as a hardware or software draw to a framebuffer. This ioctl
309  * allows userspace to tell the kernel and the hardware what
310  * regions of the framebuffer have changed.
311  *
312  * The kernel or hardware is free to update more then just the
313  * region specified by the clip rects. The kernel or hardware
314  * may also delay and/or coalesce several calls to dirty into a
315  * single update.
316  *
317  * Userspace may annotate the updates, the annotates are a
318  * promise made by the caller that the change is either a copy
319  * of pixels or a fill of a single color in the region specified.
320  *
321  * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
322  * the number of updated regions are half of num_clips given,
323  * where the clip rects are paired in src and dst. The width and
324  * height of each one of the pairs must match.
325  *
326  * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
327  * promises that the region specified of the clip rects is filled
328  * completely with a single color as given in the color argument.
329  */
330 
331 struct drm_mode_fb_dirty_cmd {
332 	__u32 fb_id;
333 	__u32 flags;
334 	__u32 color;
335 	__u32 num_clips;
336 	__u64 clips_ptr;
337 };
338 
339 struct drm_mode_mode_cmd {
340 	__u32 connector_id;
341 	struct drm_mode_modeinfo mode;
342 };
343 
344 #define DRM_MODE_CURSOR_BO	(1<<0)
345 #define DRM_MODE_CURSOR_MOVE	(1<<1)
346 
347 /*
348  * depending on the value in flags different members are used.
349  *
350  * CURSOR_BO uses
351  *    crtc
352  *    width
353  *    height
354  *    handle - if 0 turns the cursor of
355  *
356  * CURSOR_MOVE uses
357  *    crtc
358  *    x
359  *    y
360  */
361 struct drm_mode_cursor {
362 	__u32 flags;
363 	__u32 crtc_id;
364 	__s32 x;
365 	__s32 y;
366 	__u32 width;
367 	__u32 height;
368 	/* driver specific handle */
369 	__u32 handle;
370 };
371 
372 struct drm_mode_crtc_lut {
373 	__u32 crtc_id;
374 	__u32 gamma_size;
375 
376 	/* pointers to arrays */
377 	__u64 red;
378 	__u64 green;
379 	__u64 blue;
380 };
381 
382 #define DRM_MODE_PAGE_FLIP_EVENT 0x01
383 #define DRM_MODE_PAGE_FLIP_FLAGS DRM_MODE_PAGE_FLIP_EVENT
384 
385 /*
386  * Request a page flip on the specified crtc.
387  *
388  * This ioctl will ask KMS to schedule a page flip for the specified
389  * crtc.  Once any pending rendering targeting the specified fb (as of
390  * ioctl time) has completed, the crtc will be reprogrammed to display
391  * that fb after the next vertical refresh.  The ioctl returns
392  * immediately, but subsequent rendering to the current fb will block
393  * in the execbuffer ioctl until the page flip happens.  If a page
394  * flip is already pending as the ioctl is called, EBUSY will be
395  * returned.
396  *
397  * The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will
398  * request that drm sends back a vblank event (see drm.h: struct
399  * drm_event_vblank) when the page flip is done.  The user_data field
400  * passed in with this ioctl will be returned as the user_data field
401  * in the vblank event struct.
402  *
403  * The reserved field must be zero until we figure out something
404  * clever to use it for.
405  */
406 
407 struct drm_mode_crtc_page_flip {
408 	__u32 crtc_id;
409 	__u32 fb_id;
410 	__u32 flags;
411 	__u32 reserved;
412 	__u64 user_data;
413 };
414 
415 /* create a dumb scanout buffer */
416 struct drm_mode_create_dumb {
417 	uint32_t height;
418 	uint32_t width;
419 	uint32_t bpp;
420 	uint32_t flags;
421 	/* handle, pitch, size will be returned */
422 	uint32_t handle;
423 	uint32_t pitch;
424 	uint64_t size;
425 };
426 
427 /* set up for mmap of a dumb scanout buffer */
428 struct drm_mode_map_dumb {
429 	/** Handle for the object being mapped. */
430 	__u32 handle;
431 	__u32 pad;
432 	/**
433 	 * Fake offset to use for subsequent mmap call
434 	 *
435 	 * This is a fixed-size type for 32/64 compatibility.
436 	 */
437 	__u64 offset;
438 };
439 
440 struct drm_mode_destroy_dumb {
441 	uint32_t handle;
442 };
443 
444 #endif
445