1 /*
2 * Copyright 2012-20 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26 #include "dm_services.h"
27 #include "dce_calcs.h"
28 #include "reg_helper.h"
29 #include "basics/conversion.h"
30 #include "dcn31_hubp.h"
31
32 #define REG(reg)\
33 hubp2->hubp_regs->reg
34
35 #define CTX \
36 hubp2->base.ctx
37
38 #undef FN
39 #define FN(reg_name, field_name) \
40 hubp2->hubp_shift->field_name, hubp2->hubp_mask->field_name
41
hubp31_set_unbounded_requesting(struct hubp * hubp,bool enable)42 void hubp31_set_unbounded_requesting(struct hubp *hubp, bool enable)
43 {
44 struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);
45
46 REG_UPDATE(DCHUBP_CNTL, HUBP_UNBOUNDED_REQ_MODE, enable);
47 REG_UPDATE(CURSOR_CONTROL, CURSOR_REQ_MODE, 1);
48 }
49
hubp31_soft_reset(struct hubp * hubp,bool reset)50 void hubp31_soft_reset(struct hubp *hubp, bool reset)
51 {
52 struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);
53
54 REG_UPDATE(DCHUBP_CNTL, HUBP_SOFT_RESET, reset);
55 }
56
hubp31_program_extended_blank(struct hubp * hubp,unsigned int min_dst_y_next_start_optimized)57 static void hubp31_program_extended_blank(struct hubp *hubp,
58 unsigned int min_dst_y_next_start_optimized)
59 {
60 struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);
61
62 REG_UPDATE(BLANK_OFFSET_1, MIN_DST_Y_NEXT_START, min_dst_y_next_start_optimized);
63 }
64
hubp31_program_extended_blank_value(struct hubp * hubp,unsigned int min_dst_y_next_start_optimized)65 void hubp31_program_extended_blank_value(
66 struct hubp *hubp, unsigned int min_dst_y_next_start_optimized)
67 {
68 hubp31_program_extended_blank(hubp, min_dst_y_next_start_optimized);
69 }
70
hubp31_get_det_config_error(struct hubp * hubp)71 uint32_t hubp31_get_det_config_error(struct hubp *hubp)
72 {
73 uint32_t config_error = 0;
74 struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);
75
76 REG_GET(DCHUBP_CNTL,
77 HUBP_SEG_ALLOC_ERR_STATUS,
78 &config_error);
79
80 return config_error;
81 }
82
83 static struct hubp_funcs dcn31_hubp_funcs = {
84 .hubp_enable_tripleBuffer = hubp2_enable_triplebuffer,
85 .hubp_is_triplebuffer_enabled = hubp2_is_triplebuffer_enabled,
86 .hubp_program_surface_flip_and_addr = hubp3_program_surface_flip_and_addr,
87 .hubp_program_surface_config = hubp3_program_surface_config,
88 .hubp_is_flip_pending = hubp2_is_flip_pending,
89 .hubp_setup = hubp3_setup,
90 .hubp_setup_interdependent = hubp2_setup_interdependent,
91 .hubp_set_vm_system_aperture_settings = hubp3_set_vm_system_aperture_settings,
92 .set_blank = hubp2_set_blank,
93 .dcc_control = hubp3_dcc_control,
94 .hubp_reset = hubp_reset,
95 .mem_program_viewport = min_set_viewport,
96 .set_cursor_attributes = hubp2_cursor_set_attributes,
97 .set_cursor_position = hubp2_cursor_set_position,
98 .hubp_clk_cntl = hubp2_clk_cntl,
99 .hubp_vtg_sel = hubp2_vtg_sel,
100 .dmdata_set_attributes = hubp3_dmdata_set_attributes,
101 .dmdata_load = hubp2_dmdata_load,
102 .dmdata_status_done = hubp2_dmdata_status_done,
103 .hubp_read_state = hubp3_read_state,
104 .hubp_clear_underflow = hubp2_clear_underflow,
105 .hubp_set_flip_control_surface_gsl = hubp2_set_flip_control_surface_gsl,
106 .hubp_init = hubp3_init,
107 .set_unbounded_requesting = hubp31_set_unbounded_requesting,
108 .hubp_soft_reset = hubp31_soft_reset,
109 .hubp_set_flip_int = hubp1_set_flip_int,
110 .hubp_in_blank = hubp1_in_blank,
111 .program_extended_blank = hubp31_program_extended_blank,
112 .hubp_clear_tiling = hubp3_clear_tiling,
113 .hubp_read_reg_state = hubp3_read_reg_state,
114 };
115
hubp31_construct(struct dcn20_hubp * hubp2,struct dc_context * ctx,uint32_t inst,const struct dcn_hubp2_registers * hubp_regs,const struct dcn_hubp2_shift * hubp_shift,const struct dcn_hubp2_mask * hubp_mask)116 bool hubp31_construct(
117 struct dcn20_hubp *hubp2,
118 struct dc_context *ctx,
119 uint32_t inst,
120 const struct dcn_hubp2_registers *hubp_regs,
121 const struct dcn_hubp2_shift *hubp_shift,
122 const struct dcn_hubp2_mask *hubp_mask)
123 {
124 hubp2->base.funcs = &dcn31_hubp_funcs;
125 hubp2->base.ctx = ctx;
126 hubp2->hubp_regs = hubp_regs;
127 hubp2->hubp_shift = hubp_shift;
128 hubp2->hubp_mask = hubp_mask;
129 hubp2->base.inst = inst;
130 hubp2->base.opp_id = OPP_ID_INVALID;
131 hubp2->base.mpcc_id = 0xf;
132
133 return true;
134 }
135