| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | umc_v8_7.c | 45 uint32_t ch_inst) in get_umc_v8_7_reg_offset()
51 uint32_t umc_inst, uint32_t ch_inst, in umc_v8_7_ecc_info_query_correctable_error_count()
70 uint32_t umc_inst, uint32_t ch_inst, in umc_v8_7_ecc_info_querry_uncorrectable_error_count()
96 uint32_t ch_inst = 0; in umc_v8_7_ecc_info_query_ras_error_count() local
113 uint32_t ch_inst, uint32_t umc_inst) in umc_v8_7_convert_error_address()
132 uint32_t ch_inst, in umc_v8_7_ecc_info_query_error_address()
166 uint32_t ch_inst = 0; in umc_v8_7_ecc_info_query_ras_error_address() local
221 uint32_t ch_inst = 0; in umc_v8_7_clear_error_count() local
307 uint32_t ch_inst = 0; in umc_v8_7_query_ras_error_count() local
329 uint32_t ch_inst, in umc_v8_7_query_error_address()
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| H A D | umc_v6_7.c | 48 uint32_t ch_inst) in get_umc_v6_7_reg_offset()
95 uint32_t umc_inst, uint32_t ch_inst, in umc_v6_7_ecc_info_query_correctable_error_count()
137 uint32_t umc_inst, uint32_t ch_inst, in umc_v6_7_ecc_info_querry_uncorrectable_error_count()
165 uint32_t ch_inst, void *data) in umc_v6_7_ecc_info_querry_ecc_error_count()
189 uint32_t ch_inst, uint32_t umc_inst) in umc_v6_7_convert_error_address()
224 uint32_t ch_inst, void *data) in umc_v6_7_ecc_info_query_error_address()
264 uint32_t ch_inst, in umc_v6_7_query_correctable_error_count()
363 uint32_t ch_inst, void *data) in umc_v6_7_reset_error_count_per_channel()
414 uint32_t ch_inst, void *data) in umc_v6_7_query_ecc_error_count()
443 uint32_t ch_inst, void *data) in umc_v6_7_query_error_address()
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| H A D | umc_v8_10.c | 73 uint32_t ch_inst) in get_umc_v8_10_reg_offset()
81 uint32_t ch_inst, void *data) in umc_v8_10_clear_error_count_per_channel()
145 uint32_t ch_inst, void *data) in umc_v8_10_query_ecc_error_count()
207 uint32_t ch_inst, uint32_t umc_inst, in umc_v8_10_convert_error_address()
246 uint32_t ch_inst, void *data) in umc_v8_10_query_error_address()
296 uint32_t ch_inst, void *data) in umc_v8_10_err_cnt_init_per_channel()
336 uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, in umc_v8_10_ecc_info_query_correctable_error_count()
355 uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, in umc_v8_10_ecc_info_query_uncorrectable_error_count()
381 uint32_t ch_inst, void *data) in umc_v8_10_ecc_info_query_ecc_error_count()
403 uint32_t ch_inst, void *data) in umc_v8_10_ecc_info_query_error_address()
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| H A D | umc_v8_14.c | 32 uint32_t ch_inst) in get_umc_v8_14_reg_offset()
39 uint32_t ch_inst, void *data) in umc_v8_14_clear_error_count_per_channel()
94 uint32_t ch_inst, void *data) in umc_v8_14_query_error_count_per_channel()
121 uint32_t ch_inst, void *data) in umc_v8_14_err_cnt_init_per_channel()
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| H A D | umc_v12_0.c | 37 uint32_t ch_inst) in get_umc_v12_0_reg_offset()
51 uint32_t ch_inst, void *data) in umc_v12_0_reset_error_count_per_channel()
139 uint32_t ch_inst, void *data) in umc_v12_0_query_error_count()
328 uint32_t ch_inst, void *data) in umc_v12_0_query_error_address()
393 uint32_t ch_inst, void *data) in umc_v12_0_err_cnt_init_per_channel()
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| H A D | amdgpu_umc.c | 34 uint32_t ch_inst, uint32_t umc_inst) in amdgpu_umc_convert_error_address()
51 uint64_t err_addr, uint32_t ch_inst, uint32_t umc_inst) in amdgpu_umc_page_retirement_mca()
436 uint32_t ch_inst; in amdgpu_umc_loop_all_aid() local
474 uint32_t ch_inst = 0; in amdgpu_umc_loop_channels() local
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| H A D | amdgpu_umc.h | 46 #define LOOP_UMC_CH_INST(ch_inst) for ((ch_inst) = 0; (ch_inst) < adev->umc.channel_inst_num; (ch_i… argument
47 #define LOOP_UMC_INST_AND_CH(umc_inst, ch_inst) LOOP_UMC_INST((umc_inst)) LOOP_UMC_CH_INST((ch_inst… argument
52 #define LOOP_UMC_EACH_NODE_INST_AND_CH(node_inst, umc_inst, ch_inst) \ argument
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| H A D | amdgpu_ras.c | 4935 uint32_t umc_inst = 0, ch_inst = 0; in amdgpu_bad_page_notifier() local
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| /linux/drivers/gpu/drm/amd/ras/rascore/ |
| H A D | ras_umc_v12_0.c | 204 uint32_t ch_inst = addr_in->ch_inst; in umc_v12_convert_ma_to_pa() local
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