1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2022 Intel Corporation 4 */ 5 6 #ifndef _XE_BO_TYPES_H_ 7 #define _XE_BO_TYPES_H_ 8 9 #include <linux/iosys-map.h> 10 11 #include <drm/drm_gpusvm.h> 12 #include <drm/ttm/ttm_bo.h> 13 #include <drm/ttm/ttm_device.h> 14 #include <drm/ttm/ttm_placement.h> 15 16 #include "xe_device_types.h" 17 #include "xe_ggtt_types.h" 18 19 struct xe_device; 20 struct xe_vm; 21 22 #define XE_BO_MAX_PLACEMENTS 3 23 24 /* TODO: To be selected with VM_MADVISE */ 25 #define XE_BO_PRIORITY_NORMAL 1 26 27 /** @xe_bo: XE buffer object */ 28 struct xe_bo { 29 /** @ttm: TTM base buffer object */ 30 struct ttm_buffer_object ttm; 31 /** @backup_obj: The backup object when pinned and suspended (vram only) */ 32 struct xe_bo *backup_obj; 33 /** @parent_obj: Ref to parent bo if this a backup_obj */ 34 struct xe_bo *parent_obj; 35 /** @flags: flags for this buffer object */ 36 u32 flags; 37 /** @vm: VM this BO is attached to, for extobj this will be NULL */ 38 struct xe_vm *vm; 39 /** @tile: Tile this BO is attached to (kernel BO only) */ 40 struct xe_tile *tile; 41 /** @placements: valid placements for this BO */ 42 struct ttm_place placements[XE_BO_MAX_PLACEMENTS]; 43 /** @placement: current placement for this BO */ 44 struct ttm_placement placement; 45 /** @ggtt_node: Array of GGTT nodes if this BO is mapped in the GGTTs */ 46 struct xe_ggtt_node *ggtt_node[XE_MAX_TILES_PER_DEVICE]; 47 /** @vmap: iosys map of this buffer */ 48 struct iosys_map vmap; 49 /** @ttm_kmap: TTM bo kmap object for internal use only. Keep off. */ 50 struct ttm_bo_kmap_obj kmap; 51 /** @pinned_link: link to present / evicted list of pinned BO */ 52 struct list_head pinned_link; 53 #ifdef CONFIG_PROC_FS 54 /** 55 * @client: @xe_drm_client which created the bo 56 */ 57 struct xe_drm_client *client; 58 /** 59 * @client_link: Link into @xe_drm_client.objects_list 60 */ 61 struct list_head client_link; 62 #endif 63 /** 64 * @pxp_key_instance: PXP key instance this BO was created against. A 65 * 0 in this variable indicates that the BO does not use PXP encryption. 66 */ 67 u32 pxp_key_instance; 68 69 /** @freed: List node for delayed put. */ 70 struct llist_node freed; 71 /** @update_index: Update index if PT BO */ 72 int update_index; 73 /** @created: Whether the bo has passed initial creation */ 74 bool created; 75 76 /** @ccs_cleared */ 77 bool ccs_cleared; 78 79 /** 80 * @cpu_caching: CPU caching mode. Currently only used for userspace 81 * objects. Exceptions are system memory on DGFX, which is always 82 * WB. 83 */ 84 u16 cpu_caching; 85 86 /** @devmem_allocation: SVM device memory allocation */ 87 struct drm_pagemap_devmem devmem_allocation; 88 89 /** @vram_userfault_link: Link into @mem_access.vram_userfault.list */ 90 struct list_head vram_userfault_link; 91 92 /** @min_align: minimum alignment needed for this BO if different 93 * from default 94 */ 95 u64 min_align; 96 }; 97 98 #endif 99