1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * 3-axis accelerometer driver supporting following Bosch-Sensortec chips:
4 * - BMI088
5 * - BMI085
6 * - BMI090L
7 *
8 * Copyright (c) 2018-2021, Topic Embedded Products
9 */
10
11 #include <linux/bitfield.h>
12 #include <linux/delay.h>
13 #include <linux/iio/iio.h>
14 #include <linux/iio/sysfs.h>
15 #include <linux/interrupt.h>
16 #include <linux/module.h>
17 #include <linux/pm.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/regmap.h>
20 #include <linux/slab.h>
21 #include <linux/unaligned.h>
22
23 #include "bmi088-accel.h"
24
25 #define BMI088_ACCEL_REG_CHIP_ID 0x00
26 #define BMI088_ACCEL_REG_ERROR 0x02
27
28 #define BMI088_ACCEL_REG_INT_STATUS 0x1D
29 #define BMI088_ACCEL_INT_STATUS_BIT_DRDY BIT(7)
30
31 #define BMI088_ACCEL_REG_RESET 0x7E
32 #define BMI088_ACCEL_RESET_VAL 0xB6
33
34 #define BMI088_ACCEL_REG_PWR_CTRL 0x7D
35 #define BMI088_ACCEL_REG_PWR_CONF 0x7C
36
37 #define BMI088_ACCEL_REG_INT_MAP_DATA 0x58
38 #define BMI088_ACCEL_INT_MAP_DATA_BIT_INT1_DRDY BIT(2)
39 #define BMI088_ACCEL_INT_MAP_DATA_BIT_INT2_FWM BIT(5)
40
41 #define BMI088_ACCEL_REG_INT1_IO_CONF 0x53
42 #define BMI088_ACCEL_INT1_IO_CONF_BIT_ENABLE_OUT BIT(3)
43 #define BMI088_ACCEL_INT1_IO_CONF_BIT_LVL BIT(1)
44
45 #define BMI088_ACCEL_REG_INT2_IO_CONF 0x54
46 #define BMI088_ACCEL_INT2_IO_CONF_BIT_ENABLE_OUT BIT(3)
47 #define BMI088_ACCEL_INT2_IO_CONF_BIT_LVL BIT(1)
48
49 #define BMI088_ACCEL_REG_ACC_CONF 0x40
50 #define BMI088_ACCEL_MODE_ODR_MASK 0x0f
51
52 #define BMI088_ACCEL_REG_ACC_RANGE 0x41
53 #define BMI088_ACCEL_RANGE_3G 0x00
54 #define BMI088_ACCEL_RANGE_6G 0x01
55 #define BMI088_ACCEL_RANGE_12G 0x02
56 #define BMI088_ACCEL_RANGE_24G 0x03
57
58 #define BMI088_ACCEL_REG_TEMP 0x22
59 #define BMI088_ACCEL_REG_TEMP_SHIFT 5
60 #define BMI088_ACCEL_TEMP_UNIT 125
61 #define BMI088_ACCEL_TEMP_OFFSET 23000
62
63 #define BMI088_ACCEL_REG_XOUT_L 0x12
64 #define BMI088_ACCEL_AXIS_TO_REG(axis) \
65 (BMI088_ACCEL_REG_XOUT_L + (axis * 2))
66
67 #define BMI088_ACCEL_MAX_STARTUP_TIME_US 1000
68 #define BMI088_AUTO_SUSPEND_DELAY_MS 2000
69
70 #define BMI088_ACCEL_REG_FIFO_STATUS 0x0E
71 #define BMI088_ACCEL_REG_FIFO_CONFIG0 0x48
72 #define BMI088_ACCEL_REG_FIFO_CONFIG1 0x49
73 #define BMI088_ACCEL_REG_FIFO_DATA 0x3F
74 #define BMI088_ACCEL_FIFO_LENGTH 100
75
76 #define BMI088_ACCEL_FIFO_MODE_FIFO 0x40
77 #define BMI088_ACCEL_FIFO_MODE_STREAM 0x80
78
79 #define BMIO088_ACCEL_ACC_RANGE_MSK GENMASK(1, 0)
80
81 enum bmi088_accel_axis {
82 AXIS_X,
83 AXIS_Y,
84 AXIS_Z,
85 };
86
87 static const int bmi088_sample_freqs[] = {
88 12, 500000,
89 25, 0,
90 50, 0,
91 100, 0,
92 200, 0,
93 400, 0,
94 800, 0,
95 1600, 0,
96 };
97
98 /* Available OSR (over sampling rate) sets the 3dB cut-off frequency */
99 enum bmi088_osr_modes {
100 BMI088_ACCEL_MODE_OSR_NORMAL = 0xA,
101 BMI088_ACCEL_MODE_OSR_2 = 0x9,
102 BMI088_ACCEL_MODE_OSR_4 = 0x8,
103 };
104
105 /* Available ODR (output data rates) in Hz */
106 enum bmi088_odr_modes {
107 BMI088_ACCEL_MODE_ODR_12_5 = 0x5,
108 BMI088_ACCEL_MODE_ODR_25 = 0x6,
109 BMI088_ACCEL_MODE_ODR_50 = 0x7,
110 BMI088_ACCEL_MODE_ODR_100 = 0x8,
111 BMI088_ACCEL_MODE_ODR_200 = 0x9,
112 BMI088_ACCEL_MODE_ODR_400 = 0xa,
113 BMI088_ACCEL_MODE_ODR_800 = 0xb,
114 BMI088_ACCEL_MODE_ODR_1600 = 0xc,
115 };
116
117 struct bmi088_accel_chip_info {
118 const char *name;
119 u8 chip_id;
120 const struct iio_chan_spec *channels;
121 int num_channels;
122 const int scale_table[4][2];
123 };
124
125 struct bmi088_accel_data {
126 struct regmap *regmap;
127 const struct bmi088_accel_chip_info *chip_info;
128 u8 buffer[2] __aligned(IIO_DMA_MINALIGN); /* shared DMA safe buffer */
129 };
130
131 static const struct regmap_range bmi088_volatile_ranges[] = {
132 /* All registers below 0x40 are volatile, except the CHIP ID. */
133 regmap_reg_range(BMI088_ACCEL_REG_ERROR, 0x3f),
134 /* Mark the RESET as volatile too, it is self-clearing */
135 regmap_reg_range(BMI088_ACCEL_REG_RESET, BMI088_ACCEL_REG_RESET),
136 };
137
138 static const struct regmap_access_table bmi088_volatile_table = {
139 .yes_ranges = bmi088_volatile_ranges,
140 .n_yes_ranges = ARRAY_SIZE(bmi088_volatile_ranges),
141 };
142
143 const struct regmap_config bmi088_regmap_conf = {
144 .reg_bits = 8,
145 .val_bits = 8,
146 .max_register = 0x7E,
147 .volatile_table = &bmi088_volatile_table,
148 .cache_type = REGCACHE_MAPLE,
149 };
150 EXPORT_SYMBOL_NS_GPL(bmi088_regmap_conf, "IIO_BMI088");
151
bmi088_accel_power_up(struct bmi088_accel_data * data)152 static int bmi088_accel_power_up(struct bmi088_accel_data *data)
153 {
154 int ret;
155
156 /* Enable accelerometer and temperature sensor */
157 ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CTRL, 0x4);
158 if (ret)
159 return ret;
160
161 /* Datasheet recommends to wait at least 5ms before communication */
162 usleep_range(5000, 6000);
163
164 /* Disable suspend mode */
165 ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CONF, 0x0);
166 if (ret)
167 return ret;
168
169 /* Recommended at least 1ms before further communication */
170 usleep_range(1000, 1200);
171
172 return 0;
173 }
174
bmi088_accel_power_down(struct bmi088_accel_data * data)175 static int bmi088_accel_power_down(struct bmi088_accel_data *data)
176 {
177 int ret;
178
179 /* Enable suspend mode */
180 ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CONF, 0x3);
181 if (ret)
182 return ret;
183
184 /* Recommended at least 1ms before further communication */
185 usleep_range(1000, 1200);
186
187 /* Disable accelerometer and temperature sensor */
188 ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CTRL, 0x0);
189 if (ret)
190 return ret;
191
192 /* Datasheet recommends to wait at least 5ms before communication */
193 usleep_range(5000, 6000);
194
195 return 0;
196 }
197
bmi088_accel_get_sample_freq(struct bmi088_accel_data * data,int * val,int * val2)198 static int bmi088_accel_get_sample_freq(struct bmi088_accel_data *data,
199 int *val, int *val2)
200 {
201 unsigned int value;
202 int ret;
203
204 ret = regmap_read(data->regmap, BMI088_ACCEL_REG_ACC_CONF,
205 &value);
206 if (ret)
207 return ret;
208
209 value &= BMI088_ACCEL_MODE_ODR_MASK;
210 value -= BMI088_ACCEL_MODE_ODR_12_5;
211 value <<= 1;
212
213 if (value >= ARRAY_SIZE(bmi088_sample_freqs) - 1)
214 return -EINVAL;
215
216 *val = bmi088_sample_freqs[value];
217 *val2 = bmi088_sample_freqs[value + 1];
218
219 return IIO_VAL_INT_PLUS_MICRO;
220 }
221
bmi088_accel_set_sample_freq(struct bmi088_accel_data * data,int val)222 static int bmi088_accel_set_sample_freq(struct bmi088_accel_data *data, int val)
223 {
224 unsigned int regval;
225 int index = 0;
226
227 while (index < ARRAY_SIZE(bmi088_sample_freqs) &&
228 bmi088_sample_freqs[index] != val)
229 index += 2;
230
231 if (index >= ARRAY_SIZE(bmi088_sample_freqs))
232 return -EINVAL;
233
234 regval = (index >> 1) + BMI088_ACCEL_MODE_ODR_12_5;
235
236 return regmap_update_bits(data->regmap, BMI088_ACCEL_REG_ACC_CONF,
237 BMI088_ACCEL_MODE_ODR_MASK, regval);
238 }
239
bmi088_accel_set_scale(struct bmi088_accel_data * data,int val,int val2)240 static int bmi088_accel_set_scale(struct bmi088_accel_data *data, int val, int val2)
241 {
242 unsigned int i;
243
244 for (i = 0; i < 4; i++)
245 if (val == data->chip_info->scale_table[i][0] &&
246 val2 == data->chip_info->scale_table[i][1])
247 break;
248
249 if (i == 4)
250 return -EINVAL;
251
252 return regmap_write(data->regmap, BMI088_ACCEL_REG_ACC_RANGE, i);
253 }
254
bmi088_accel_get_temp(struct bmi088_accel_data * data,int * val)255 static int bmi088_accel_get_temp(struct bmi088_accel_data *data, int *val)
256 {
257 int ret;
258 s16 temp;
259
260 ret = regmap_bulk_read(data->regmap, BMI088_ACCEL_REG_TEMP,
261 &data->buffer, sizeof(__be16));
262 if (ret)
263 return ret;
264
265 /* data->buffer is cacheline aligned */
266 temp = be16_to_cpu(*(__be16 *)data->buffer);
267
268 *val = temp >> BMI088_ACCEL_REG_TEMP_SHIFT;
269
270 return IIO_VAL_INT;
271 }
272
bmi088_accel_get_axis(struct bmi088_accel_data * data,struct iio_chan_spec const * chan,int * val)273 static int bmi088_accel_get_axis(struct bmi088_accel_data *data,
274 struct iio_chan_spec const *chan,
275 int *val)
276 {
277 int ret;
278 s16 raw_val;
279
280 ret = regmap_bulk_read(data->regmap,
281 BMI088_ACCEL_AXIS_TO_REG(chan->scan_index),
282 data->buffer, sizeof(__le16));
283 if (ret)
284 return ret;
285
286 raw_val = le16_to_cpu(*(__le16 *)data->buffer);
287 *val = raw_val;
288
289 return IIO_VAL_INT;
290 }
291
bmi088_accel_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)292 static int bmi088_accel_read_raw(struct iio_dev *indio_dev,
293 struct iio_chan_spec const *chan,
294 int *val, int *val2, long mask)
295 {
296 struct bmi088_accel_data *data = iio_priv(indio_dev);
297 struct device *dev = regmap_get_device(data->regmap);
298 int ret;
299 int reg;
300
301 switch (mask) {
302 case IIO_CHAN_INFO_RAW:
303 switch (chan->type) {
304 case IIO_TEMP:
305 ret = pm_runtime_resume_and_get(dev);
306 if (ret)
307 return ret;
308
309 ret = bmi088_accel_get_temp(data, val);
310 goto out_read_raw_pm_put;
311 case IIO_ACCEL:
312 ret = pm_runtime_resume_and_get(dev);
313 if (ret)
314 return ret;
315
316 if (!iio_device_claim_direct(indio_dev)) {
317 ret = -EBUSY;
318 goto out_read_raw_pm_put;
319 }
320
321 ret = bmi088_accel_get_axis(data, chan, val);
322 iio_device_release_direct(indio_dev);
323 if (!ret)
324 ret = IIO_VAL_INT;
325
326 goto out_read_raw_pm_put;
327 default:
328 return -EINVAL;
329 }
330 case IIO_CHAN_INFO_OFFSET:
331 switch (chan->type) {
332 case IIO_TEMP:
333 /* Offset applies before scale */
334 *val = BMI088_ACCEL_TEMP_OFFSET/BMI088_ACCEL_TEMP_UNIT;
335 return IIO_VAL_INT;
336 default:
337 return -EINVAL;
338 }
339 case IIO_CHAN_INFO_SCALE:
340 switch (chan->type) {
341 case IIO_TEMP:
342 /* 0.125 degrees per LSB */
343 *val = BMI088_ACCEL_TEMP_UNIT;
344 return IIO_VAL_INT;
345 case IIO_ACCEL:
346 ret = pm_runtime_resume_and_get(dev);
347 if (ret)
348 return ret;
349
350 ret = regmap_read(data->regmap,
351 BMI088_ACCEL_REG_ACC_RANGE, ®);
352 if (ret)
353 goto out_read_raw_pm_put;
354
355 reg = FIELD_GET(BMIO088_ACCEL_ACC_RANGE_MSK, reg);
356 *val = data->chip_info->scale_table[reg][0];
357 *val2 = data->chip_info->scale_table[reg][1];
358 ret = IIO_VAL_INT_PLUS_MICRO;
359
360 goto out_read_raw_pm_put;
361 default:
362 return -EINVAL;
363 }
364 case IIO_CHAN_INFO_SAMP_FREQ:
365 ret = pm_runtime_resume_and_get(dev);
366 if (ret)
367 return ret;
368
369 ret = bmi088_accel_get_sample_freq(data, val, val2);
370 goto out_read_raw_pm_put;
371 default:
372 break;
373 }
374
375 return -EINVAL;
376
377 out_read_raw_pm_put:
378 pm_runtime_mark_last_busy(dev);
379 pm_runtime_put_autosuspend(dev);
380
381 return ret;
382 }
383
bmi088_accel_read_avail(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,const int ** vals,int * type,int * length,long mask)384 static int bmi088_accel_read_avail(struct iio_dev *indio_dev,
385 struct iio_chan_spec const *chan,
386 const int **vals, int *type, int *length,
387 long mask)
388 {
389 struct bmi088_accel_data *data = iio_priv(indio_dev);
390
391 switch (mask) {
392 case IIO_CHAN_INFO_SCALE:
393 *vals = (const int *)data->chip_info->scale_table;
394 *length = 8;
395 *type = IIO_VAL_INT_PLUS_MICRO;
396 return IIO_AVAIL_LIST;
397 case IIO_CHAN_INFO_SAMP_FREQ:
398 *type = IIO_VAL_INT_PLUS_MICRO;
399 *vals = bmi088_sample_freqs;
400 *length = ARRAY_SIZE(bmi088_sample_freqs);
401 return IIO_AVAIL_LIST;
402 default:
403 return -EINVAL;
404 }
405 }
406
bmi088_accel_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)407 static int bmi088_accel_write_raw(struct iio_dev *indio_dev,
408 struct iio_chan_spec const *chan,
409 int val, int val2, long mask)
410 {
411 struct bmi088_accel_data *data = iio_priv(indio_dev);
412 struct device *dev = regmap_get_device(data->regmap);
413 int ret;
414
415 switch (mask) {
416 case IIO_CHAN_INFO_SCALE:
417 ret = pm_runtime_resume_and_get(dev);
418 if (ret)
419 return ret;
420
421 ret = bmi088_accel_set_scale(data, val, val2);
422 pm_runtime_mark_last_busy(dev);
423 pm_runtime_put_autosuspend(dev);
424 return ret;
425 case IIO_CHAN_INFO_SAMP_FREQ:
426 ret = pm_runtime_resume_and_get(dev);
427 if (ret)
428 return ret;
429
430 ret = bmi088_accel_set_sample_freq(data, val);
431 pm_runtime_mark_last_busy(dev);
432 pm_runtime_put_autosuspend(dev);
433 return ret;
434 default:
435 return -EINVAL;
436 }
437 }
438
439 #define BMI088_ACCEL_CHANNEL(_axis) { \
440 .type = IIO_ACCEL, \
441 .modified = 1, \
442 .channel2 = IIO_MOD_##_axis, \
443 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
444 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
445 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
446 .info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
447 BIT(IIO_CHAN_INFO_SCALE), \
448 .scan_index = AXIS_##_axis, \
449 }
450
451 static const struct iio_chan_spec bmi088_accel_channels[] = {
452 {
453 .type = IIO_TEMP,
454 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
455 BIT(IIO_CHAN_INFO_SCALE) |
456 BIT(IIO_CHAN_INFO_OFFSET),
457 .scan_index = -1,
458 },
459 BMI088_ACCEL_CHANNEL(X),
460 BMI088_ACCEL_CHANNEL(Y),
461 BMI088_ACCEL_CHANNEL(Z),
462 IIO_CHAN_SOFT_TIMESTAMP(3),
463 };
464
465 static const struct bmi088_accel_chip_info bmi088_accel_chip_info_tbl[] = {
466 [BOSCH_BMI085] = {
467 .name = "bmi085-accel",
468 .chip_id = 0x1F,
469 .channels = bmi088_accel_channels,
470 .num_channels = ARRAY_SIZE(bmi088_accel_channels),
471 .scale_table = {{0, 598}, {0, 1196}, {0, 2393}, {0, 4785}},
472 },
473 [BOSCH_BMI088] = {
474 .name = "bmi088-accel",
475 .chip_id = 0x1E,
476 .channels = bmi088_accel_channels,
477 .num_channels = ARRAY_SIZE(bmi088_accel_channels),
478 .scale_table = {{0, 897}, {0, 1794}, {0, 3589}, {0, 7178}},
479 },
480 [BOSCH_BMI090L] = {
481 .name = "bmi090l-accel",
482 .chip_id = 0x1A,
483 .channels = bmi088_accel_channels,
484 .num_channels = ARRAY_SIZE(bmi088_accel_channels),
485 .scale_table = {{0, 897}, {0, 1794}, {0, 3589}, {0, 7178}},
486 },
487 };
488
489 static const struct iio_info bmi088_accel_info = {
490 .read_raw = bmi088_accel_read_raw,
491 .write_raw = bmi088_accel_write_raw,
492 .read_avail = bmi088_accel_read_avail,
493 };
494
495 static const unsigned long bmi088_accel_scan_masks[] = {
496 BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
497 0
498 };
499
bmi088_accel_chip_init(struct bmi088_accel_data * data,enum bmi_device_type type)500 static int bmi088_accel_chip_init(struct bmi088_accel_data *data, enum bmi_device_type type)
501 {
502 struct device *dev = regmap_get_device(data->regmap);
503 int ret, i;
504 unsigned int val;
505
506 if (type >= BOSCH_UNKNOWN)
507 return -ENODEV;
508
509 /* Do a dummy read to enable SPI interface, won't harm I2C */
510 regmap_read(data->regmap, BMI088_ACCEL_REG_INT_STATUS, &val);
511
512 /*
513 * Reset chip to get it in a known good state. A delay of 1ms after
514 * reset is required according to the data sheet
515 */
516 ret = regmap_write(data->regmap, BMI088_ACCEL_REG_RESET,
517 BMI088_ACCEL_RESET_VAL);
518 if (ret)
519 return ret;
520
521 usleep_range(1000, 2000);
522
523 /* Do a dummy read again after a reset to enable the SPI interface */
524 regmap_read(data->regmap, BMI088_ACCEL_REG_INT_STATUS, &val);
525
526 /* Read chip ID */
527 ret = regmap_read(data->regmap, BMI088_ACCEL_REG_CHIP_ID, &val);
528 if (ret) {
529 dev_err(dev, "Error: Reading chip id\n");
530 return ret;
531 }
532
533 /* Validate chip ID */
534 for (i = 0; i < ARRAY_SIZE(bmi088_accel_chip_info_tbl); i++)
535 if (bmi088_accel_chip_info_tbl[i].chip_id == val)
536 break;
537
538 if (i == ARRAY_SIZE(bmi088_accel_chip_info_tbl))
539 data->chip_info = &bmi088_accel_chip_info_tbl[type];
540 else
541 data->chip_info = &bmi088_accel_chip_info_tbl[i];
542
543 if (i != type)
544 dev_warn(dev, "unexpected chip id 0x%X\n", val);
545
546 return 0;
547 }
548
bmi088_accel_core_probe(struct device * dev,struct regmap * regmap,int irq,enum bmi_device_type type)549 int bmi088_accel_core_probe(struct device *dev, struct regmap *regmap,
550 int irq, enum bmi_device_type type)
551 {
552 struct bmi088_accel_data *data;
553 struct iio_dev *indio_dev;
554 int ret;
555
556 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
557 if (!indio_dev)
558 return -ENOMEM;
559
560 data = iio_priv(indio_dev);
561 dev_set_drvdata(dev, indio_dev);
562
563 data->regmap = regmap;
564
565 ret = bmi088_accel_chip_init(data, type);
566 if (ret)
567 return ret;
568
569 indio_dev->channels = data->chip_info->channels;
570 indio_dev->num_channels = data->chip_info->num_channels;
571 indio_dev->name = data->chip_info->name;
572 indio_dev->available_scan_masks = bmi088_accel_scan_masks;
573 indio_dev->modes = INDIO_DIRECT_MODE;
574 indio_dev->info = &bmi088_accel_info;
575
576 /* Enable runtime PM */
577 pm_runtime_get_noresume(dev);
578 pm_runtime_set_suspended(dev);
579 pm_runtime_enable(dev);
580 /* We need ~6ms to startup, so set the delay to 6 seconds */
581 pm_runtime_set_autosuspend_delay(dev, 6000);
582 pm_runtime_use_autosuspend(dev);
583 pm_runtime_put(dev);
584
585 ret = iio_device_register(indio_dev);
586 if (ret)
587 dev_err(dev, "Unable to register iio device\n");
588
589 return ret;
590 }
591 EXPORT_SYMBOL_NS_GPL(bmi088_accel_core_probe, "IIO_BMI088");
592
593
bmi088_accel_core_remove(struct device * dev)594 void bmi088_accel_core_remove(struct device *dev)
595 {
596 struct iio_dev *indio_dev = dev_get_drvdata(dev);
597 struct bmi088_accel_data *data = iio_priv(indio_dev);
598
599 iio_device_unregister(indio_dev);
600
601 pm_runtime_disable(dev);
602 pm_runtime_set_suspended(dev);
603 bmi088_accel_power_down(data);
604 }
605 EXPORT_SYMBOL_NS_GPL(bmi088_accel_core_remove, "IIO_BMI088");
606
bmi088_accel_runtime_suspend(struct device * dev)607 static int bmi088_accel_runtime_suspend(struct device *dev)
608 {
609 struct iio_dev *indio_dev = dev_get_drvdata(dev);
610 struct bmi088_accel_data *data = iio_priv(indio_dev);
611
612 return bmi088_accel_power_down(data);
613 }
614
bmi088_accel_runtime_resume(struct device * dev)615 static int bmi088_accel_runtime_resume(struct device *dev)
616 {
617 struct iio_dev *indio_dev = dev_get_drvdata(dev);
618 struct bmi088_accel_data *data = iio_priv(indio_dev);
619
620 return bmi088_accel_power_up(data);
621 }
622
623 EXPORT_NS_GPL_RUNTIME_DEV_PM_OPS(bmi088_accel_pm_ops,
624 bmi088_accel_runtime_suspend,
625 bmi088_accel_runtime_resume, NULL,
626 IIO_BMI088);
627
628 MODULE_AUTHOR("Niek van Agt <niek.van.agt@topicproducts.com>");
629 MODULE_LICENSE("GPL v2");
630 MODULE_DESCRIPTION("BMI088 accelerometer driver (core)");
631