| /qemu/hw/m68k/ |
| H A D | bootinfo.h | 15 #define BOOTINFO0(base, id) \ argument
23 #define BOOTINFO1(base, id, value) \ argument
33 #define BOOTINFO2(base, id, value1, value2) \ argument
45 #define BOOTINFOSTR(base, id, string) \ argument
60 #define BOOTINFODATA(base, id, data, len) \ argument
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| /qemu/tests/qtest/ |
| H A D | aspeed-hace-utils.c | 156 static void write_regs(QTestState *s, uint32_t base, uint64_t src, in write_regs()
167 void aspeed_test_md5(const char *machine, const uint32_t base, in aspeed_test_md5()
202 void aspeed_test_sha256(const char *machine, const uint32_t base, in aspeed_test_sha256()
236 void aspeed_test_sha384(const char *machine, const uint32_t base, in aspeed_test_sha384()
270 void aspeed_test_sha512(const char *machine, const uint32_t base, in aspeed_test_sha512()
304 void aspeed_test_sha256_sg(const char *machine, const uint32_t base, in aspeed_test_sha256_sg()
355 void aspeed_test_sha384_sg(const char *machine, const uint32_t base, in aspeed_test_sha384_sg()
406 void aspeed_test_sha512_sg(const char *machine, const uint32_t base, in aspeed_test_sha512_sg()
457 void aspeed_test_sha256_accum(const char *machine, const uint32_t base, in aspeed_test_sha256_accum()
498 void aspeed_test_sha384_accum(const char *machine, const uint32_t base, in aspeed_test_sha384_accum()
[all …]
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| H A D | ast2700-gpio-test.c | 17 static void test_output_pins(const char *machine, const uint32_t base) in test_output_pins()
44 static void test_input_pins(const char *machine, const uint32_t base) in test_input_pins()
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| /qemu/target/i386/tcg/ |
| H A D | mpx_helper.c | 36 static uint64_t lookup_bte64(CPUX86State *env, uint64_t base, uintptr_t ra) in lookup_bte64()
56 static uint32_t lookup_bte32(CPUX86State *env, uint32_t base, uintptr_t ra) in lookup_bte32()
76 uint64_t helper_bndldx64(CPUX86State *env, target_ulong base, target_ulong ptr) in helper_bndldx64()
93 uint64_t helper_bndldx32(CPUX86State *env, target_ulong base, target_ulong ptr) in helper_bndldx32()
109 void helper_bndstx64(CPUX86State *env, target_ulong base, target_ulong ptr, in helper_bndstx64()
121 void helper_bndstx32(CPUX86State *env, target_ulong base, target_ulong ptr, in helper_bndstx32()
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| /qemu/hw/usb/ |
| H A D | canokey.c | 67 int canokey_emu_stall_ep(void *base, uint8_t ep) in canokey_emu_stall_ep()
77 int canokey_emu_set_address(void *base, uint8_t addr) in canokey_emu_set_address()
86 void *base, uint8_t ep, uint8_t *pbuf, uint16_t size) in canokey_emu_prepare_receive()
96 void *base, uint8_t ep, const uint8_t *pbuf, uint16_t size) in canokey_emu_transmit()
127 uint32_t canokey_emu_get_rx_data_size(void *base, uint8_t ep) in canokey_emu_get_rx_data_size()
270 static void canokey_realize(USBDevice *base, Error **errp) in canokey_realize()
294 static void canokey_unrealize(USBDevice *base) in canokey_unrealize()
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| H A D | ccid-card-passthru.c | 58 CCIDCardState base; member
334 CCIDCardState *base, const uint8_t *apdu, uint32_t len) in passthru_apdu_from_guest()
345 static const uint8_t *passthru_get_atr(CCIDCardState *base, uint32_t *len) in passthru_get_atr()
353 static void passthru_realize(CCIDCardState *base, Error **errp) in passthru_realize()
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| /qemu/hw/i386/ |
| H A D | microvm-dt.c | 74 hwaddr base = dev->mmio[0].addr; in dt_add_virtio() local
92 hwaddr base = MICROVM_XHCI_BASE; in dt_add_xhci() local
107 hwaddr base = PCIE_MMIO_BASE; in dt_add_pcie() local
153 hwaddr base = dev->mmio[0].addr; in dt_add_ioapic() local
192 hwaddr base = object_property_get_int(OBJECT(dev), "iobase", &error_fatal); in dt_add_isa_serial() local
213 hwaddr base = object_property_get_uint(OBJECT(dev), "iobase", &error_fatal); in dt_add_isa_rtc() local
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| /qemu/hw/xen/ |
| H A D | xen_pvdev.c | 72 int xenstore_write_str(const char *base, const char *node, const char *val) in xenstore_write_str()
83 char *xenstore_read_str(const char *base, const char *node) in xenstore_read_str()
97 int xenstore_write_int(const char *base, const char *node, int ival) in xenstore_write_int()
105 int xenstore_write_int64(const char *base, const char *node, int64_t ival) in xenstore_write_int64()
113 int xenstore_read_int(const char *base, const char *node, int *ival) in xenstore_read_int()
126 int xenstore_read_uint64(const char *base, const char *node, uint64_t *uval) in xenstore_read_uint64()
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| /qemu/hw/loongarch/ |
| H A D | virt-fdt-build.c | 112 uint64_t base, uint64_t size, int node_id) in fdt_add_memory_node()
130 hwaddr base, size, ram_size, gap; in fdt_add_memory_nodes() local
173 hwaddr base = VIRT_FWCFG_BASE; in fdt_add_fw_cfg_node() local
376 hwaddr base = base_pcie; in fdt_add_pcie_node() local
404 uint32_t *pch_pic_phandle, hwaddr base, in fdt_add_uart_node()
429 hwaddr base = VIRT_RTC_REG_BASE; in fdt_add_rtc_node() local
450 hwaddr base = VIRT_GED_REG_ADDR; in fdt_add_ged_reset() local
511 hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE; in virt_fdt_setup() local
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| /qemu/hw/tricore/ |
| H A D | tc27x_soc.c | 71 hwaddr base, hwaddr size) in make_rom()
82 hwaddr base, hwaddr size) in make_ram()
93 MemoryRegion *orig, hwaddr base) in make_alias()
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| /qemu/ |
| H A D | event-loop-base.c | 27 EventLoopBase *base = EVENT_LOOP_BASE(obj); in event_loop_base_instance_init() local
56 EventLoopBase *base = EVENT_LOOP_BASE(obj); in event_loop_base_set_param() local
81 EventLoopBase *base = EVENT_LOOP_BASE(uc); in event_loop_base_complete() local
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| /qemu/target/i386/hvf/ |
| H A D | x86.c | 53 target_ulong base; in x86_read_segment_descriptor() local
83 target_ulong base; in x86_write_segment_descriptor() local
105 target_ulong base = rvmcs(cpu->accel->fd, VMCS_GUEST_IDTR_BASE); in x86_read_call_gate() local
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| /qemu/tests/multiboot/ |
| H A D | libc.c | 49 static void print_num(uint64_t value, int base) in print_num()
68 int base; in printf() local
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| /qemu/target/ppc/ |
| H A D | mmu-hash32.h | 77 target_ulong base = ppc_hash32_hpt_base(cpu); in ppc_hash32_load_hpte0() local
85 target_ulong base = ppc_hash32_hpt_base(cpu); in ppc_hash32_load_hpte1() local
93 target_ulong base = ppc_hash32_hpt_base(cpu); in ppc_hash32_store_hpte0() local
101 target_ulong base = ppc_hash32_hpt_base(cpu); in ppc_hash32_store_hpte1() local
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| /qemu/tests/tcg/minilib/ |
| H A D | printf.c | 28 static void print_num(unsigned long long value, int base) in print_num()
51 int base; in ml_printf() local
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| /qemu/hw/pci/ |
| H A D | pci_bridge.c | 78 uint32_t base, uint32_t base_upper16) in pci_config_get_io_base()
89 static pcibus_t pci_config_get_memory_base(const PCIDevice *d, uint32_t base) in pci_config_get_memory_base()
96 uint32_t base, uint32_t upper) in pci_config_get_pref_base()
112 pcibus_t base; in pci_bridge_get_base() local
155 pcibus_t base = pci_bridge_get_base(bridge_dev, type); in pci_bridge_init_alias() local
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| /qemu/util/ |
| H A D | cutils.c | 448 int qemu_strtoi(const char *nptr, const char **endptr, int base, in qemu_strtoi()
504 int qemu_strtoui(const char *nptr, const char **endptr, int base, in qemu_strtoui()
573 int qemu_strtol(const char *nptr, const char **endptr, int base, in qemu_strtol()
618 int qemu_strtoul(const char *nptr, const char **endptr, int base, in qemu_strtoul()
647 int qemu_strtoi64(const char *nptr, const char **endptr, int base, in qemu_strtoi64()
675 int qemu_strtou64(const char *nptr, const char **endptr, int base, in qemu_strtou64()
816 int parse_uint(const char *s, const char **endptr, int base, uint64_t *value) in parse_uint()
872 int parse_uint_full(const char *s, int base, uint64_t *value) in parse_uint_full()
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| /qemu/hw/arm/ |
| H A D | sbsa-ref.c | 321 hwaddr base, hwaddr size, in sbsa_flash_map1()
409 hwaddr base = sbsa_ref_memmap[SBSA_SECURE_MEM].base; in create_secure_ram() local
521 hwaddr base = sbsa_ref_memmap[uart].base; in create_uart() local
535 hwaddr base = sbsa_ref_memmap[SBSA_RTC].base; in create_rtc() local
570 hwaddr base = sbsa_ref_memmap[SBSA_GPIO].base; in create_gpio() local
585 hwaddr base = sbsa_ref_memmap[SBSA_AHCI].base; in create_ahci() local
604 hwaddr base = sbsa_ref_memmap[SBSA_XHCI].base; in create_xhci() local
616 hwaddr base = sbsa_ref_memmap[SBSA_SMMU].base; in create_smmu() local
704 hwaddr base = sbsa_ref_memmap[SBSA_SECURE_EC].base; in create_secure_ec() local
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| /qemu/hw/char/ |
| H A D | omap_uart.c | 29 hwaddr base; member
50 struct omap_uart_s *omap_uart_init(hwaddr base, in omap_uart_init()
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| /qemu/hw/intc/ |
| H A D | riscv_imsic.c | 51 uint32_t i, max_irq, base; in riscv_imsic_topei() local
69 uint32_t base = page * imsic->num_irqs; in riscv_imsic_update() local
130 uint32_t base, topei = riscv_imsic_topei(imsic, page); in riscv_imsic_topei_rmw() local
155 uint32_t i, base, prev; in riscv_imsic_eix_rmw() local
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| /qemu/hw/openrisc/ |
| H A D | virt.c | 73 hwaddr base; member
199 static void openrisc_virt_ompic_init(OR1KVirtState *state, hwaddr base, in openrisc_virt_ompic_init()
230 static void openrisc_virt_serial_init(OR1KVirtState *state, hwaddr base, in openrisc_virt_serial_init()
256 static void openrisc_virt_test_init(OR1KVirtState *state, hwaddr base, in openrisc_virt_test_init()
294 static void openrisc_virt_rtc_init(OR1KVirtState *state, hwaddr base, in openrisc_virt_rtc_init()
443 static void openrisc_virt_virtio_init(OR1KVirtState *state, hwaddr base, in openrisc_virt_virtio_init()
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| H A D | openrisc_sim.c | 78 hwaddr base; member
171 static void openrisc_sim_net_init(Or1ksimState *state, hwaddr base, hwaddr size, in openrisc_sim_net_init()
214 static void openrisc_sim_ompic_init(Or1ksimState *state, hwaddr base, in openrisc_sim_ompic_init()
245 static void openrisc_sim_serial_init(Or1ksimState *state, hwaddr base, in openrisc_sim_serial_init()
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| /qemu/tests/unit/ |
| H A D | test-bdrv-graph-mod.c | 236 BlockDriverState *base = no_perm_node("base"); in test_parallel_exclusive_write() local
361 BlockDriverState *base = no_perm_node("base"); in test_parallel_perm_update() local
438 BlockDriverState *base = no_perm_node("base"); in test_append_greedy_filter() local
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| /qemu/include/qobject/ |
| H A D | qstring.h | 19 struct QObjectBase_ base; member
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| H A D | qnull.h | 19 struct QObjectBase_ base; member
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