1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * MFD core driver for the X-Powers' Power Management ICs
4 *
5 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
6 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
7 * as well as configurable GPIOs.
8 *
9 * This file contains the interface independent core functions.
10 *
11 * Copyright (C) 2014 Carlo Caione
12 *
13 * Author: Carlo Caione <carlo@caione.org>
14 */
15
16 #include <linux/acpi.h>
17 #include <linux/bitops.h>
18 #include <linux/delay.h>
19 #include <linux/err.h>
20 #include <linux/interrupt.h>
21 #include <linux/kernel.h>
22 #include <linux/mfd/axp20x.h>
23 #include <linux/mfd/core.h>
24 #include <linux/module.h>
25 #include <linux/of.h>
26 #include <linux/property.h>
27 #include <linux/reboot.h>
28 #include <linux/regmap.h>
29 #include <linux/regulator/consumer.h>
30
31 #define AXP20X_OFF BIT(7)
32
33 #define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE 0
34 #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE BIT(4)
35
36 static const char * const axp20x_model_names[] = {
37 [AXP152_ID] = "AXP152",
38 [AXP192_ID] = "AXP192",
39 [AXP202_ID] = "AXP202",
40 [AXP209_ID] = "AXP209",
41 [AXP221_ID] = "AXP221",
42 [AXP223_ID] = "AXP223",
43 [AXP288_ID] = "AXP288",
44 [AXP313A_ID] = "AXP313a",
45 [AXP323_ID] = "AXP323",
46 [AXP717_ID] = "AXP717",
47 [AXP803_ID] = "AXP803",
48 [AXP806_ID] = "AXP806",
49 [AXP809_ID] = "AXP809",
50 [AXP813_ID] = "AXP813",
51 [AXP15060_ID] = "AXP15060",
52 };
53
54 static const struct regmap_range axp152_writeable_ranges[] = {
55 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
56 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
57 };
58
59 static const struct regmap_range axp152_volatile_ranges[] = {
60 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
61 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
62 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
63 };
64
65 static const struct regmap_access_table axp152_writeable_table = {
66 .yes_ranges = axp152_writeable_ranges,
67 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges),
68 };
69
70 static const struct regmap_access_table axp152_volatile_table = {
71 .yes_ranges = axp152_volatile_ranges,
72 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges),
73 };
74
75 static const struct regmap_range axp20x_writeable_ranges[] = {
76 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
77 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
78 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
79 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)),
80 };
81
82 static const struct regmap_range axp20x_volatile_ranges[] = {
83 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS),
84 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
85 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
86 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
87 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL),
88 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L),
89 };
90
91 static const struct regmap_access_table axp20x_writeable_table = {
92 .yes_ranges = axp20x_writeable_ranges,
93 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges),
94 };
95
96 static const struct regmap_access_table axp20x_volatile_table = {
97 .yes_ranges = axp20x_volatile_ranges,
98 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges),
99 };
100
101 static const struct regmap_range axp192_writeable_ranges[] = {
102 regmap_reg_range(AXP192_DATACACHE(0), AXP192_DATACACHE(5)),
103 regmap_reg_range(AXP192_PWR_OUT_CTRL, AXP192_IRQ5_STATE),
104 regmap_reg_range(AXP20X_DCDC_MODE, AXP192_N_RSTO_CTRL),
105 regmap_reg_range(AXP20X_CC_CTRL, AXP20X_CC_CTRL),
106 };
107
108 static const struct regmap_range axp192_volatile_ranges[] = {
109 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP192_USB_OTG_STATUS),
110 regmap_reg_range(AXP192_IRQ1_STATE, AXP192_IRQ4_STATE),
111 regmap_reg_range(AXP192_IRQ5_STATE, AXP192_IRQ5_STATE),
112 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
113 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL),
114 regmap_reg_range(AXP192_GPIO2_0_STATE, AXP192_GPIO2_0_STATE),
115 regmap_reg_range(AXP192_GPIO4_3_STATE, AXP192_GPIO4_3_STATE),
116 regmap_reg_range(AXP192_N_RSTO_CTRL, AXP192_N_RSTO_CTRL),
117 regmap_reg_range(AXP20X_CHRG_CC_31_24, AXP20X_CC_CTRL),
118 };
119
120 static const struct regmap_access_table axp192_writeable_table = {
121 .yes_ranges = axp192_writeable_ranges,
122 .n_yes_ranges = ARRAY_SIZE(axp192_writeable_ranges),
123 };
124
125 static const struct regmap_access_table axp192_volatile_table = {
126 .yes_ranges = axp192_volatile_ranges,
127 .n_yes_ranges = ARRAY_SIZE(axp192_volatile_ranges),
128 };
129
130 /* AXP22x ranges are shared with the AXP809, as they cover the same range */
131 static const struct regmap_range axp22x_writeable_ranges[] = {
132 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
133 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3),
134 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1),
135 };
136
137 static const struct regmap_range axp22x_volatile_ranges[] = {
138 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE),
139 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
140 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
141 regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L),
142 regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES),
143 };
144
145 static const struct regmap_access_table axp22x_writeable_table = {
146 .yes_ranges = axp22x_writeable_ranges,
147 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges),
148 };
149
150 static const struct regmap_access_table axp22x_volatile_table = {
151 .yes_ranges = axp22x_volatile_ranges,
152 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges),
153 };
154
155 /* AXP288 ranges are shared with the AXP803, as they cover the same range */
156 static const struct regmap_range axp288_writeable_ranges[] = {
157 regmap_reg_range(AXP288_POWER_REASON, AXP288_POWER_REASON),
158 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
159 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
160 };
161
162 static const struct regmap_range axp288_volatile_ranges[] = {
163 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON),
164 regmap_reg_range(AXP22X_PWR_OUT_CTRL1, AXP22X_ALDO3_V_OUT),
165 regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL),
166 regmap_reg_range(AXP288_BC_DET_STAT, AXP20X_VBUS_IPSOUT_MGMT),
167 regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL),
168 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
169 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL),
170 regmap_reg_range(AXP20X_GPIO1_CTRL, AXP22X_GPIO_STATE),
171 regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L),
172 regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG),
173 };
174
175 static const struct regmap_access_table axp288_writeable_table = {
176 .yes_ranges = axp288_writeable_ranges,
177 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges),
178 };
179
180 static const struct regmap_access_table axp288_volatile_table = {
181 .yes_ranges = axp288_volatile_ranges,
182 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges),
183 };
184
185 static const struct regmap_range axp806_writeable_ranges[] = {
186 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)),
187 regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL),
188 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN),
189 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
190 regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT),
191 };
192
193 static const struct regmap_range axp313a_writeable_ranges[] = {
194 regmap_reg_range(AXP313A_ON_INDICATE, AXP313A_IRQ_STATE),
195 };
196
197 static const struct regmap_range axp323_writeable_ranges[] = {
198 regmap_reg_range(AXP313A_ON_INDICATE, AXP323_DCDC_MODE_CTRL2),
199 };
200
201 static const struct regmap_range axp313a_volatile_ranges[] = {
202 regmap_reg_range(AXP313A_SHUTDOWN_CTRL, AXP313A_SHUTDOWN_CTRL),
203 regmap_reg_range(AXP313A_IRQ_STATE, AXP313A_IRQ_STATE),
204 };
205
206 static const struct regmap_access_table axp313a_writeable_table = {
207 .yes_ranges = axp313a_writeable_ranges,
208 .n_yes_ranges = ARRAY_SIZE(axp313a_writeable_ranges),
209 };
210
211 static const struct regmap_access_table axp323_writeable_table = {
212 .yes_ranges = axp323_writeable_ranges,
213 .n_yes_ranges = ARRAY_SIZE(axp323_writeable_ranges),
214 };
215
216 static const struct regmap_access_table axp313a_volatile_table = {
217 .yes_ranges = axp313a_volatile_ranges,
218 .n_yes_ranges = ARRAY_SIZE(axp313a_volatile_ranges),
219 };
220
221 static const struct regmap_range axp717_writeable_ranges[] = {
222 regmap_reg_range(AXP717_PMU_FAULT, AXP717_MODULE_EN_CONTROL_1),
223 regmap_reg_range(AXP717_MIN_SYS_V_CONTROL, AXP717_BOOST_CONTROL),
224 regmap_reg_range(AXP717_VSYS_V_POWEROFF, AXP717_VSYS_V_POWEROFF),
225 regmap_reg_range(AXP717_IRQ0_EN, AXP717_IRQ4_EN),
226 regmap_reg_range(AXP717_IRQ0_STATE, AXP717_IRQ4_STATE),
227 regmap_reg_range(AXP717_TS_PIN_CFG, AXP717_TS_PIN_CFG),
228 regmap_reg_range(AXP717_ICC_CHG_SET, AXP717_CV_CHG_SET),
229 regmap_reg_range(AXP717_DCDC_OUTPUT_CONTROL, AXP717_CPUSLDO_CONTROL),
230 regmap_reg_range(AXP717_ADC_CH_EN_CONTROL, AXP717_ADC_CH_EN_CONTROL),
231 regmap_reg_range(AXP717_ADC_DATA_SEL, AXP717_ADC_DATA_SEL),
232 regmap_reg_range(AXP717_TYPEC_CC_AA_EN, AXP717_TYPEC_CC_AA_EN),
233 regmap_reg_range(AXP717_TYPEC_CC_MODE_CONTROL, AXP717_TYPEC_CC_MODE_CONTROL),
234 };
235
236 static const struct regmap_range axp717_volatile_ranges[] = {
237 regmap_reg_range(AXP717_ON_INDICATE, AXP717_PMU_FAULT),
238 regmap_reg_range(AXP717_IRQ0_STATE, AXP717_IRQ4_STATE),
239 regmap_reg_range(AXP717_BATT_PERCENT_DATA, AXP717_BATT_PERCENT_DATA),
240 regmap_reg_range(AXP717_BATT_V_H, AXP717_BATT_CHRG_I_L),
241 regmap_reg_range(AXP717_ADC_DATA_H, AXP717_ADC_DATA_L),
242 regmap_reg_range(AXP717_TYPEC_CC_STATUS, AXP717_TYPEC_CC_STATUS),
243 };
244
245 static const struct regmap_access_table axp717_writeable_table = {
246 .yes_ranges = axp717_writeable_ranges,
247 .n_yes_ranges = ARRAY_SIZE(axp717_writeable_ranges),
248 };
249
250 static const struct regmap_access_table axp717_volatile_table = {
251 .yes_ranges = axp717_volatile_ranges,
252 .n_yes_ranges = ARRAY_SIZE(axp717_volatile_ranges),
253 };
254
255 static const struct regmap_range axp806_volatile_ranges[] = {
256 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
257 };
258
259 static const struct regmap_access_table axp806_writeable_table = {
260 .yes_ranges = axp806_writeable_ranges,
261 .n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges),
262 };
263
264 static const struct regmap_access_table axp806_volatile_table = {
265 .yes_ranges = axp806_volatile_ranges,
266 .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges),
267 };
268
269 static const struct regmap_range axp15060_writeable_ranges[] = {
270 regmap_reg_range(AXP15060_PWR_OUT_CTRL1, AXP15060_DCDC_MODE_CTRL2),
271 regmap_reg_range(AXP15060_OUTPUT_MONITOR_DISCHARGE, AXP15060_CPUSLDO_V_CTRL),
272 regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ),
273 regmap_reg_range(AXP15060_PEK_KEY, AXP15060_PEK_KEY),
274 regmap_reg_range(AXP15060_IRQ1_EN, AXP15060_IRQ2_EN),
275 regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE),
276 };
277
278 static const struct regmap_range axp15060_volatile_ranges[] = {
279 regmap_reg_range(AXP15060_STARTUP_SRC, AXP15060_STARTUP_SRC),
280 regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ),
281 regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE),
282 };
283
284 static const struct regmap_access_table axp15060_writeable_table = {
285 .yes_ranges = axp15060_writeable_ranges,
286 .n_yes_ranges = ARRAY_SIZE(axp15060_writeable_ranges),
287 };
288
289 static const struct regmap_access_table axp15060_volatile_table = {
290 .yes_ranges = axp15060_volatile_ranges,
291 .n_yes_ranges = ARRAY_SIZE(axp15060_volatile_ranges),
292 };
293
294 static const struct resource axp152_pek_resources[] = {
295 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
296 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
297 };
298
299 static const struct resource axp192_ac_power_supply_resources[] = {
300 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
301 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
302 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
303 };
304
305 static const struct resource axp192_usb_power_supply_resources[] = {
306 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
307 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
308 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_VALID, "VBUS_VALID"),
309 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
310 };
311
312 static const struct resource axp20x_ac_power_supply_resources[] = {
313 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
314 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
315 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
316 };
317
318 static const struct resource axp20x_pek_resources[] = {
319 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
320 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
321 };
322
323 static const struct resource axp20x_usb_power_supply_resources[] = {
324 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
325 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
326 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"),
327 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
328 };
329
330 static const struct resource axp22x_usb_power_supply_resources[] = {
331 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
332 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
333 };
334
335 static const struct resource axp717_usb_power_supply_resources[] = {
336 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_VBUS_OVER_V, "VBUS_OVER_V"),
337 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
338 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
339 };
340
341 /* AXP803 and AXP813/AXP818 share the same interrupts */
342 static const struct resource axp803_usb_power_supply_resources[] = {
343 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
344 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
345 };
346
347 static const struct resource axp22x_pek_resources[] = {
348 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
349 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
350 };
351
352 static const struct resource axp288_power_button_resources[] = {
353 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKP, "PEK_DBR"),
354 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKN, "PEK_DBF"),
355 };
356
357 static const struct resource axp288_fuel_gauge_resources[] = {
358 DEFINE_RES_IRQ(AXP288_IRQ_QWBTU),
359 DEFINE_RES_IRQ(AXP288_IRQ_WBTU),
360 DEFINE_RES_IRQ(AXP288_IRQ_QWBTO),
361 DEFINE_RES_IRQ(AXP288_IRQ_WBTO),
362 DEFINE_RES_IRQ(AXP288_IRQ_WL2),
363 DEFINE_RES_IRQ(AXP288_IRQ_WL1),
364 };
365
366 static const struct resource axp313a_pek_resources[] = {
367 DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
368 DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
369 };
370
371 static const struct resource axp717_pek_resources[] = {
372 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
373 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
374 };
375
376 static const struct resource axp803_pek_resources[] = {
377 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
378 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
379 };
380
381 static const struct resource axp806_pek_resources[] = {
382 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"),
383 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"),
384 };
385
386 static const struct resource axp809_pek_resources[] = {
387 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
388 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
389 };
390
391 static const struct resource axp15060_pek_resources[] = {
392 DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
393 DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
394 };
395
396 static const struct regmap_config axp152_regmap_config = {
397 .reg_bits = 8,
398 .val_bits = 8,
399 .wr_table = &axp152_writeable_table,
400 .volatile_table = &axp152_volatile_table,
401 .max_register = AXP152_PWM1_DUTY_CYCLE,
402 .cache_type = REGCACHE_MAPLE,
403 };
404
405 static const struct regmap_config axp192_regmap_config = {
406 .reg_bits = 8,
407 .val_bits = 8,
408 .wr_table = &axp192_writeable_table,
409 .volatile_table = &axp192_volatile_table,
410 .max_register = AXP20X_CC_CTRL,
411 .cache_type = REGCACHE_MAPLE,
412 };
413
414 static const struct regmap_config axp20x_regmap_config = {
415 .reg_bits = 8,
416 .val_bits = 8,
417 .wr_table = &axp20x_writeable_table,
418 .volatile_table = &axp20x_volatile_table,
419 .max_register = AXP20X_OCV(AXP20X_OCV_MAX),
420 .cache_type = REGCACHE_MAPLE,
421 };
422
423 static const struct regmap_config axp22x_regmap_config = {
424 .reg_bits = 8,
425 .val_bits = 8,
426 .wr_table = &axp22x_writeable_table,
427 .volatile_table = &axp22x_volatile_table,
428 .max_register = AXP22X_BATLOW_THRES1,
429 .cache_type = REGCACHE_MAPLE,
430 };
431
432 static const struct regmap_config axp288_regmap_config = {
433 .reg_bits = 8,
434 .val_bits = 8,
435 .wr_table = &axp288_writeable_table,
436 .volatile_table = &axp288_volatile_table,
437 .max_register = AXP288_FG_TUNE5,
438 .cache_type = REGCACHE_MAPLE,
439 };
440
441 static const struct regmap_config axp313a_regmap_config = {
442 .reg_bits = 8,
443 .val_bits = 8,
444 .wr_table = &axp313a_writeable_table,
445 .volatile_table = &axp313a_volatile_table,
446 .max_register = AXP313A_IRQ_STATE,
447 .cache_type = REGCACHE_MAPLE,
448 };
449
450 static const struct regmap_config axp323_regmap_config = {
451 .reg_bits = 8,
452 .val_bits = 8,
453 .wr_table = &axp323_writeable_table,
454 .volatile_table = &axp313a_volatile_table,
455 .max_register = AXP323_DCDC_MODE_CTRL2,
456 .cache_type = REGCACHE_MAPLE,
457 };
458
459 static const struct regmap_config axp717_regmap_config = {
460 .reg_bits = 8,
461 .val_bits = 8,
462 .wr_table = &axp717_writeable_table,
463 .volatile_table = &axp717_volatile_table,
464 .max_register = AXP717_TYPEC_CC_STATUS,
465 .cache_type = REGCACHE_MAPLE,
466 };
467
468 static const struct regmap_config axp806_regmap_config = {
469 .reg_bits = 8,
470 .val_bits = 8,
471 .wr_table = &axp806_writeable_table,
472 .volatile_table = &axp806_volatile_table,
473 .max_register = AXP806_REG_ADDR_EXT,
474 .cache_type = REGCACHE_MAPLE,
475 };
476
477 static const struct regmap_config axp15060_regmap_config = {
478 .reg_bits = 8,
479 .val_bits = 8,
480 .wr_table = &axp15060_writeable_table,
481 .volatile_table = &axp15060_volatile_table,
482 .max_register = AXP15060_IRQ2_STATE,
483 .cache_type = REGCACHE_MAPLE,
484 };
485
486 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \
487 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
488
489 static const struct regmap_irq axp152_regmap_irqs[] = {
490 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6),
491 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5),
492 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3),
493 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2),
494 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5),
495 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4),
496 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3),
497 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2),
498 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1),
499 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0),
500 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7),
501 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6),
502 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5),
503 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3),
504 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2),
505 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1),
506 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0),
507 };
508
509 static const struct regmap_irq axp192_regmap_irqs[] = {
510 INIT_REGMAP_IRQ(AXP192, ACIN_OVER_V, 0, 7),
511 INIT_REGMAP_IRQ(AXP192, ACIN_PLUGIN, 0, 6),
512 INIT_REGMAP_IRQ(AXP192, ACIN_REMOVAL, 0, 5),
513 INIT_REGMAP_IRQ(AXP192, VBUS_OVER_V, 0, 4),
514 INIT_REGMAP_IRQ(AXP192, VBUS_PLUGIN, 0, 3),
515 INIT_REGMAP_IRQ(AXP192, VBUS_REMOVAL, 0, 2),
516 INIT_REGMAP_IRQ(AXP192, VBUS_V_LOW, 0, 1),
517 INIT_REGMAP_IRQ(AXP192, BATT_PLUGIN, 1, 7),
518 INIT_REGMAP_IRQ(AXP192, BATT_REMOVAL, 1, 6),
519 INIT_REGMAP_IRQ(AXP192, BATT_ENT_ACT_MODE, 1, 5),
520 INIT_REGMAP_IRQ(AXP192, BATT_EXIT_ACT_MODE, 1, 4),
521 INIT_REGMAP_IRQ(AXP192, CHARG, 1, 3),
522 INIT_REGMAP_IRQ(AXP192, CHARG_DONE, 1, 2),
523 INIT_REGMAP_IRQ(AXP192, BATT_TEMP_HIGH, 1, 1),
524 INIT_REGMAP_IRQ(AXP192, BATT_TEMP_LOW, 1, 0),
525 INIT_REGMAP_IRQ(AXP192, DIE_TEMP_HIGH, 2, 7),
526 INIT_REGMAP_IRQ(AXP192, CHARG_I_LOW, 2, 6),
527 INIT_REGMAP_IRQ(AXP192, DCDC1_V_LONG, 2, 5),
528 INIT_REGMAP_IRQ(AXP192, DCDC2_V_LONG, 2, 4),
529 INIT_REGMAP_IRQ(AXP192, DCDC3_V_LONG, 2, 3),
530 INIT_REGMAP_IRQ(AXP192, PEK_SHORT, 2, 1),
531 INIT_REGMAP_IRQ(AXP192, PEK_LONG, 2, 0),
532 INIT_REGMAP_IRQ(AXP192, N_OE_PWR_ON, 3, 7),
533 INIT_REGMAP_IRQ(AXP192, N_OE_PWR_OFF, 3, 6),
534 INIT_REGMAP_IRQ(AXP192, VBUS_VALID, 3, 5),
535 INIT_REGMAP_IRQ(AXP192, VBUS_NOT_VALID, 3, 4),
536 INIT_REGMAP_IRQ(AXP192, VBUS_SESS_VALID, 3, 3),
537 INIT_REGMAP_IRQ(AXP192, VBUS_SESS_END, 3, 2),
538 INIT_REGMAP_IRQ(AXP192, LOW_PWR_LVL, 3, 0),
539 INIT_REGMAP_IRQ(AXP192, TIMER, 4, 7),
540 INIT_REGMAP_IRQ(AXP192, GPIO2_INPUT, 4, 2),
541 INIT_REGMAP_IRQ(AXP192, GPIO1_INPUT, 4, 1),
542 INIT_REGMAP_IRQ(AXP192, GPIO0_INPUT, 4, 0),
543 };
544
545 static const struct regmap_irq axp20x_regmap_irqs[] = {
546 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7),
547 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6),
548 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5),
549 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4),
550 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3),
551 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2),
552 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1),
553 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7),
554 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6),
555 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5),
556 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4),
557 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3),
558 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2),
559 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1),
560 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0),
561 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7),
562 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6),
563 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5),
564 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4),
565 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3),
566 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1),
567 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0),
568 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7),
569 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6),
570 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5),
571 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4),
572 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3),
573 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2),
574 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1),
575 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0),
576 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7),
577 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6),
578 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5),
579 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3),
580 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2),
581 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1),
582 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0),
583 };
584
585 static const struct regmap_irq axp22x_regmap_irqs[] = {
586 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7),
587 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6),
588 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5),
589 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4),
590 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3),
591 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2),
592 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1),
593 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7),
594 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6),
595 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5),
596 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4),
597 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3),
598 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2),
599 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1),
600 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0),
601 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7),
602 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1),
603 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0),
604 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1),
605 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0),
606 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7),
607 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6),
608 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5),
609 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1),
610 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0),
611 };
612
613 /* some IRQs are compatible with axp20x models */
614 static const struct regmap_irq axp288_regmap_irqs[] = {
615 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2),
616 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3),
617 INIT_REGMAP_IRQ(AXP288, OV, 0, 4),
618 INIT_REGMAP_IRQ(AXP288, FALLING_ALT, 0, 5),
619 INIT_REGMAP_IRQ(AXP288, RISING_ALT, 0, 6),
620 INIT_REGMAP_IRQ(AXP288, OV_ALT, 0, 7),
621
622 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2),
623 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3),
624 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4),
625 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5),
626 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6),
627 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7),
628
629 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0),
630 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1),
631 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2),
632 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3),
633 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4),
634 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5),
635 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6),
636 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7),
637
638 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0),
639 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1),
640 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2),
641 INIT_REGMAP_IRQ(AXP288, OT, 3, 7),
642
643 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0),
644 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1),
645 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2),
646 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3),
647 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4),
648 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5),
649 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6),
650 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7),
651
652 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0),
653 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),
654 };
655
656 static const struct regmap_irq axp313a_regmap_irqs[] = {
657 INIT_REGMAP_IRQ(AXP313A, PEK_RIS_EDGE, 0, 7),
658 INIT_REGMAP_IRQ(AXP313A, PEK_FAL_EDGE, 0, 6),
659 INIT_REGMAP_IRQ(AXP313A, PEK_SHORT, 0, 5),
660 INIT_REGMAP_IRQ(AXP313A, PEK_LONG, 0, 4),
661 INIT_REGMAP_IRQ(AXP313A, DCDC3_V_LOW, 0, 3),
662 INIT_REGMAP_IRQ(AXP313A, DCDC2_V_LOW, 0, 2),
663 INIT_REGMAP_IRQ(AXP313A, DIE_TEMP_HIGH, 0, 0),
664 };
665
666 static const struct regmap_irq axp717_regmap_irqs[] = {
667 INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL2, 0, 7),
668 INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL1, 0, 6),
669 INIT_REGMAP_IRQ(AXP717, GAUGE_NEW_SOC, 0, 4),
670 INIT_REGMAP_IRQ(AXP717, BOOST_OVER_V, 0, 2),
671 INIT_REGMAP_IRQ(AXP717, VBUS_OVER_V, 0, 1),
672 INIT_REGMAP_IRQ(AXP717, VBUS_FAULT, 0, 0),
673 INIT_REGMAP_IRQ(AXP717, VBUS_PLUGIN, 1, 7),
674 INIT_REGMAP_IRQ(AXP717, VBUS_REMOVAL, 1, 6),
675 INIT_REGMAP_IRQ(AXP717, BATT_PLUGIN, 1, 5),
676 INIT_REGMAP_IRQ(AXP717, BATT_REMOVAL, 1, 4),
677 INIT_REGMAP_IRQ(AXP717, PEK_SHORT, 1, 3),
678 INIT_REGMAP_IRQ(AXP717, PEK_LONG, 1, 2),
679 INIT_REGMAP_IRQ(AXP717, PEK_FAL_EDGE, 1, 1),
680 INIT_REGMAP_IRQ(AXP717, PEK_RIS_EDGE, 1, 0),
681 INIT_REGMAP_IRQ(AXP717, WDOG_EXPIRE, 2, 7),
682 INIT_REGMAP_IRQ(AXP717, LDO_OVER_CURR, 2, 6),
683 INIT_REGMAP_IRQ(AXP717, BATT_OVER_CURR, 2, 5),
684 INIT_REGMAP_IRQ(AXP717, CHARG_DONE, 2, 4),
685 INIT_REGMAP_IRQ(AXP717, CHARG, 2, 3),
686 INIT_REGMAP_IRQ(AXP717, DIE_TEMP_HIGH, 2, 2),
687 INIT_REGMAP_IRQ(AXP717, CHARG_TIMER, 2, 1),
688 INIT_REGMAP_IRQ(AXP717, BATT_OVER_V, 2, 0),
689 INIT_REGMAP_IRQ(AXP717, BC_USB_DONE, 3, 7),
690 INIT_REGMAP_IRQ(AXP717, BC_USB_CHNG, 3, 6),
691 INIT_REGMAP_IRQ(AXP717, BATT_QUIT_TEMP_HIGH, 3, 4),
692 INIT_REGMAP_IRQ(AXP717, BATT_CHG_TEMP_HIGH, 3, 3),
693 INIT_REGMAP_IRQ(AXP717, BATT_CHG_TEMP_LOW, 3, 2),
694 INIT_REGMAP_IRQ(AXP717, BATT_ACT_TEMP_HIGH, 3, 1),
695 INIT_REGMAP_IRQ(AXP717, BATT_ACT_TEMP_LOW, 3, 0),
696 INIT_REGMAP_IRQ(AXP717, TYPEC_REMOVE, 4, 6),
697 INIT_REGMAP_IRQ(AXP717, TYPEC_PLUGIN, 4, 5),
698 };
699
700 static const struct regmap_irq axp803_regmap_irqs[] = {
701 INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7),
702 INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6),
703 INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL, 0, 5),
704 INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V, 0, 4),
705 INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN, 0, 3),
706 INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL, 0, 2),
707 INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN, 1, 7),
708 INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL, 1, 6),
709 INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE, 1, 5),
710 INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE, 1, 4),
711 INIT_REGMAP_IRQ(AXP803, CHARG, 1, 3),
712 INIT_REGMAP_IRQ(AXP803, CHARG_DONE, 1, 2),
713 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH, 2, 7),
714 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END, 2, 6),
715 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW, 2, 5),
716 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END, 2, 4),
717 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH, 2, 3),
718 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END, 2, 2),
719 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW, 2, 1),
720 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END, 2, 0),
721 INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH, 3, 7),
722 INIT_REGMAP_IRQ(AXP803, GPADC, 3, 2),
723 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1, 3, 1),
724 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2, 3, 0),
725 INIT_REGMAP_IRQ(AXP803, TIMER, 4, 7),
726 INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE, 4, 6),
727 INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE, 4, 5),
728 INIT_REGMAP_IRQ(AXP803, PEK_SHORT, 4, 4),
729 INIT_REGMAP_IRQ(AXP803, PEK_LONG, 4, 3),
730 INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF, 4, 2),
731 INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT, 4, 1),
732 INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT, 4, 0),
733 INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG, 5, 1),
734 INIT_REGMAP_IRQ(AXP803, MV_CHNG, 5, 0),
735 };
736
737 static const struct regmap_irq axp806_regmap_irqs[] = {
738 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0),
739 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1),
740 INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3),
741 INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4),
742 INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5),
743 INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6),
744 INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7),
745 INIT_REGMAP_IRQ(AXP806, POK_LONG, 1, 0),
746 INIT_REGMAP_IRQ(AXP806, POK_SHORT, 1, 1),
747 INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4),
748 INIT_REGMAP_IRQ(AXP806, POK_FALL, 1, 5),
749 INIT_REGMAP_IRQ(AXP806, POK_RISE, 1, 6),
750 };
751
752 static const struct regmap_irq axp809_regmap_irqs[] = {
753 INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7),
754 INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6),
755 INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5),
756 INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4),
757 INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3),
758 INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2),
759 INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1),
760 INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7),
761 INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6),
762 INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5),
763 INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4),
764 INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3),
765 INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2),
766 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7),
767 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6),
768 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5),
769 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4),
770 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3),
771 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2),
772 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1),
773 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0),
774 INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7),
775 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1),
776 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0),
777 INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7),
778 INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6),
779 INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5),
780 INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4),
781 INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3),
782 INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2),
783 INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1),
784 INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0),
785 };
786
787 static const struct regmap_irq axp15060_regmap_irqs[] = {
788 INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV1, 0, 0),
789 INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV2, 0, 1),
790 INIT_REGMAP_IRQ(AXP15060, DCDC1_V_LOW, 0, 2),
791 INIT_REGMAP_IRQ(AXP15060, DCDC2_V_LOW, 0, 3),
792 INIT_REGMAP_IRQ(AXP15060, DCDC3_V_LOW, 0, 4),
793 INIT_REGMAP_IRQ(AXP15060, DCDC4_V_LOW, 0, 5),
794 INIT_REGMAP_IRQ(AXP15060, DCDC5_V_LOW, 0, 6),
795 INIT_REGMAP_IRQ(AXP15060, DCDC6_V_LOW, 0, 7),
796 INIT_REGMAP_IRQ(AXP15060, PEK_LONG, 1, 0),
797 INIT_REGMAP_IRQ(AXP15060, PEK_SHORT, 1, 1),
798 INIT_REGMAP_IRQ(AXP15060, GPIO1_INPUT, 1, 2),
799 INIT_REGMAP_IRQ(AXP15060, PEK_FAL_EDGE, 1, 3),
800 INIT_REGMAP_IRQ(AXP15060, PEK_RIS_EDGE, 1, 4),
801 INIT_REGMAP_IRQ(AXP15060, GPIO2_INPUT, 1, 5),
802 };
803
804 static const struct regmap_irq_chip axp152_regmap_irq_chip = {
805 .name = "axp152_irq_chip",
806 .status_base = AXP152_IRQ1_STATE,
807 .ack_base = AXP152_IRQ1_STATE,
808 .unmask_base = AXP152_IRQ1_EN,
809 .init_ack_masked = true,
810 .irqs = axp152_regmap_irqs,
811 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs),
812 .num_regs = 3,
813 };
814
axp192_get_irq_reg(struct regmap_irq_chip_data * data,unsigned int base,int index)815 static unsigned int axp192_get_irq_reg(struct regmap_irq_chip_data *data,
816 unsigned int base, int index)
817 {
818 /* linear mapping for IRQ1 to IRQ4 */
819 if (index < 4)
820 return base + index;
821
822 /* handle IRQ5 separately */
823 if (base == AXP192_IRQ1_EN)
824 return AXP192_IRQ5_EN;
825
826 return AXP192_IRQ5_STATE;
827 }
828
829 static const struct regmap_irq_chip axp192_regmap_irq_chip = {
830 .name = "axp192_irq_chip",
831 .status_base = AXP192_IRQ1_STATE,
832 .ack_base = AXP192_IRQ1_STATE,
833 .unmask_base = AXP192_IRQ1_EN,
834 .init_ack_masked = true,
835 .irqs = axp192_regmap_irqs,
836 .num_irqs = ARRAY_SIZE(axp192_regmap_irqs),
837 .num_regs = 5,
838 .get_irq_reg = axp192_get_irq_reg,
839 };
840
841 static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
842 .name = "axp20x_irq_chip",
843 .status_base = AXP20X_IRQ1_STATE,
844 .ack_base = AXP20X_IRQ1_STATE,
845 .unmask_base = AXP20X_IRQ1_EN,
846 .init_ack_masked = true,
847 .irqs = axp20x_regmap_irqs,
848 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs),
849 .num_regs = 5,
850
851 };
852
853 static const struct regmap_irq_chip axp22x_regmap_irq_chip = {
854 .name = "axp22x_irq_chip",
855 .status_base = AXP20X_IRQ1_STATE,
856 .ack_base = AXP20X_IRQ1_STATE,
857 .unmask_base = AXP20X_IRQ1_EN,
858 .init_ack_masked = true,
859 .irqs = axp22x_regmap_irqs,
860 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs),
861 .num_regs = 5,
862 };
863
864 static const struct regmap_irq_chip axp288_regmap_irq_chip = {
865 .name = "axp288_irq_chip",
866 .status_base = AXP20X_IRQ1_STATE,
867 .ack_base = AXP20X_IRQ1_STATE,
868 .unmask_base = AXP20X_IRQ1_EN,
869 .init_ack_masked = true,
870 .irqs = axp288_regmap_irqs,
871 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs),
872 .num_regs = 6,
873
874 };
875
876 static const struct regmap_irq_chip axp313a_regmap_irq_chip = {
877 .name = "axp313a_irq_chip",
878 .status_base = AXP313A_IRQ_STATE,
879 .ack_base = AXP313A_IRQ_STATE,
880 .unmask_base = AXP313A_IRQ_EN,
881 .init_ack_masked = true,
882 .irqs = axp313a_regmap_irqs,
883 .num_irqs = ARRAY_SIZE(axp313a_regmap_irqs),
884 .num_regs = 1,
885 };
886
887 static const struct regmap_irq_chip axp717_regmap_irq_chip = {
888 .name = "axp717_irq_chip",
889 .status_base = AXP717_IRQ0_STATE,
890 .ack_base = AXP717_IRQ0_STATE,
891 .unmask_base = AXP717_IRQ0_EN,
892 .init_ack_masked = true,
893 .irqs = axp717_regmap_irqs,
894 .num_irqs = ARRAY_SIZE(axp717_regmap_irqs),
895 .num_regs = 5,
896 };
897
898 static const struct regmap_irq_chip axp803_regmap_irq_chip = {
899 .name = "axp803",
900 .status_base = AXP20X_IRQ1_STATE,
901 .ack_base = AXP20X_IRQ1_STATE,
902 .unmask_base = AXP20X_IRQ1_EN,
903 .init_ack_masked = true,
904 .irqs = axp803_regmap_irqs,
905 .num_irqs = ARRAY_SIZE(axp803_regmap_irqs),
906 .num_regs = 6,
907 };
908
909 static const struct regmap_irq_chip axp806_regmap_irq_chip = {
910 .name = "axp806",
911 .status_base = AXP20X_IRQ1_STATE,
912 .ack_base = AXP20X_IRQ1_STATE,
913 .unmask_base = AXP20X_IRQ1_EN,
914 .init_ack_masked = true,
915 .irqs = axp806_regmap_irqs,
916 .num_irqs = ARRAY_SIZE(axp806_regmap_irqs),
917 .num_regs = 2,
918 };
919
920 static const struct regmap_irq_chip axp809_regmap_irq_chip = {
921 .name = "axp809",
922 .status_base = AXP20X_IRQ1_STATE,
923 .ack_base = AXP20X_IRQ1_STATE,
924 .unmask_base = AXP20X_IRQ1_EN,
925 .init_ack_masked = true,
926 .irqs = axp809_regmap_irqs,
927 .num_irqs = ARRAY_SIZE(axp809_regmap_irqs),
928 .num_regs = 5,
929 };
930
931 static const struct regmap_irq_chip axp15060_regmap_irq_chip = {
932 .name = "axp15060",
933 .status_base = AXP15060_IRQ1_STATE,
934 .ack_base = AXP15060_IRQ1_STATE,
935 .unmask_base = AXP15060_IRQ1_EN,
936 .init_ack_masked = true,
937 .irqs = axp15060_regmap_irqs,
938 .num_irqs = ARRAY_SIZE(axp15060_regmap_irqs),
939 .num_regs = 2,
940 };
941
942 static const struct mfd_cell axp192_cells[] = {
943 {
944 .name = "axp192-adc",
945 .of_compatible = "x-powers,axp192-adc",
946 }, {
947 .name = "axp20x-battery-power-supply",
948 .of_compatible = "x-powers,axp192-battery-power-supply",
949 }, {
950 .name = "axp20x-ac-power-supply",
951 .of_compatible = "x-powers,axp202-ac-power-supply",
952 .num_resources = ARRAY_SIZE(axp192_ac_power_supply_resources),
953 .resources = axp192_ac_power_supply_resources,
954 }, {
955 .name = "axp20x-usb-power-supply",
956 .of_compatible = "x-powers,axp192-usb-power-supply",
957 .num_resources = ARRAY_SIZE(axp192_usb_power_supply_resources),
958 .resources = axp192_usb_power_supply_resources,
959 },
960 { .name = "axp20x-regulator" },
961 };
962
963 static const struct mfd_cell axp20x_cells[] = {
964 {
965 .name = "axp20x-gpio",
966 .of_compatible = "x-powers,axp209-gpio",
967 }, {
968 .name = "axp20x-pek",
969 .num_resources = ARRAY_SIZE(axp20x_pek_resources),
970 .resources = axp20x_pek_resources,
971 }, {
972 .name = "axp20x-regulator",
973 }, {
974 .name = "axp20x-adc",
975 .of_compatible = "x-powers,axp209-adc",
976 }, {
977 .name = "axp20x-battery-power-supply",
978 .of_compatible = "x-powers,axp209-battery-power-supply",
979 }, {
980 .name = "axp20x-ac-power-supply",
981 .of_compatible = "x-powers,axp202-ac-power-supply",
982 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
983 .resources = axp20x_ac_power_supply_resources,
984 }, {
985 .name = "axp20x-usb-power-supply",
986 .of_compatible = "x-powers,axp202-usb-power-supply",
987 .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources),
988 .resources = axp20x_usb_power_supply_resources,
989 },
990 };
991
992 static const struct mfd_cell axp221_cells[] = {
993 {
994 .name = "axp20x-gpio",
995 .of_compatible = "x-powers,axp221-gpio",
996 }, {
997 .name = "axp221-pek",
998 .num_resources = ARRAY_SIZE(axp22x_pek_resources),
999 .resources = axp22x_pek_resources,
1000 }, {
1001 .name = "axp20x-regulator",
1002 }, {
1003 .name = "axp22x-adc",
1004 .of_compatible = "x-powers,axp221-adc",
1005 }, {
1006 .name = "axp20x-ac-power-supply",
1007 .of_compatible = "x-powers,axp221-ac-power-supply",
1008 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
1009 .resources = axp20x_ac_power_supply_resources,
1010 }, {
1011 .name = "axp20x-battery-power-supply",
1012 .of_compatible = "x-powers,axp221-battery-power-supply",
1013 }, {
1014 .name = "axp20x-usb-power-supply",
1015 .of_compatible = "x-powers,axp221-usb-power-supply",
1016 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources),
1017 .resources = axp22x_usb_power_supply_resources,
1018 },
1019 };
1020
1021 static const struct mfd_cell axp223_cells[] = {
1022 {
1023 .name = "axp20x-gpio",
1024 .of_compatible = "x-powers,axp221-gpio",
1025 }, {
1026 .name = "axp221-pek",
1027 .num_resources = ARRAY_SIZE(axp22x_pek_resources),
1028 .resources = axp22x_pek_resources,
1029 }, {
1030 .name = "axp22x-adc",
1031 .of_compatible = "x-powers,axp221-adc",
1032 }, {
1033 .name = "axp20x-battery-power-supply",
1034 .of_compatible = "x-powers,axp221-battery-power-supply",
1035 }, {
1036 .name = "axp20x-regulator",
1037 }, {
1038 .name = "axp20x-ac-power-supply",
1039 .of_compatible = "x-powers,axp221-ac-power-supply",
1040 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
1041 .resources = axp20x_ac_power_supply_resources,
1042 }, {
1043 .name = "axp20x-usb-power-supply",
1044 .of_compatible = "x-powers,axp223-usb-power-supply",
1045 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources),
1046 .resources = axp22x_usb_power_supply_resources,
1047 },
1048 };
1049
1050 static const struct mfd_cell axp152_cells[] = {
1051 {
1052 .name = "axp20x-pek",
1053 .num_resources = ARRAY_SIZE(axp152_pek_resources),
1054 .resources = axp152_pek_resources,
1055 },
1056 };
1057
1058 static struct mfd_cell axp313a_cells[] = {
1059 /* AXP323 is sometimes paired with AXP717 as sub-PMIC */
1060 MFD_CELL_BASIC("axp20x-regulator", NULL, NULL, 0, 1),
1061 MFD_CELL_RES("axp313a-pek", axp313a_pek_resources),
1062 };
1063
1064 static struct mfd_cell axp717_cells[] = {
1065 MFD_CELL_NAME("axp20x-regulator"),
1066 MFD_CELL_RES("axp20x-pek", axp717_pek_resources),
1067 MFD_CELL_OF("axp717-adc",
1068 NULL, NULL, 0, 0, "x-powers,axp717-adc"),
1069 MFD_CELL_OF("axp20x-usb-power-supply",
1070 axp717_usb_power_supply_resources, NULL, 0, 0,
1071 "x-powers,axp717-usb-power-supply"),
1072 MFD_CELL_OF("axp20x-battery-power-supply",
1073 NULL, NULL, 0, 0, "x-powers,axp717-battery-power-supply"),
1074 };
1075
1076 static const struct resource axp288_adc_resources[] = {
1077 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"),
1078 };
1079
1080 static const struct resource axp288_extcon_resources[] = {
1081 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_FALL),
1082 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_RISE),
1083 DEFINE_RES_IRQ(AXP288_IRQ_MV_CHNG),
1084 DEFINE_RES_IRQ(AXP288_IRQ_BC_USB_CHNG),
1085 };
1086
1087 static const struct resource axp288_charger_resources[] = {
1088 DEFINE_RES_IRQ(AXP288_IRQ_OV),
1089 DEFINE_RES_IRQ(AXP288_IRQ_DONE),
1090 DEFINE_RES_IRQ(AXP288_IRQ_CHARGING),
1091 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_QUIT),
1092 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_ENTER),
1093 DEFINE_RES_IRQ(AXP288_IRQ_QCBTU),
1094 DEFINE_RES_IRQ(AXP288_IRQ_CBTU),
1095 DEFINE_RES_IRQ(AXP288_IRQ_QCBTO),
1096 DEFINE_RES_IRQ(AXP288_IRQ_CBTO),
1097 };
1098
1099 static const char * const axp288_fuel_gauge_suppliers[] = { "axp288_charger" };
1100
1101 static const struct property_entry axp288_fuel_gauge_properties[] = {
1102 PROPERTY_ENTRY_STRING_ARRAY("supplied-from", axp288_fuel_gauge_suppliers),
1103 { }
1104 };
1105
1106 static const struct software_node axp288_fuel_gauge_sw_node = {
1107 .name = "axp288_fuel_gauge",
1108 .properties = axp288_fuel_gauge_properties,
1109 };
1110
1111 static const struct mfd_cell axp288_cells[] = {
1112 {
1113 .name = "axp288_adc",
1114 .num_resources = ARRAY_SIZE(axp288_adc_resources),
1115 .resources = axp288_adc_resources,
1116 }, {
1117 .name = "axp288_extcon",
1118 .num_resources = ARRAY_SIZE(axp288_extcon_resources),
1119 .resources = axp288_extcon_resources,
1120 }, {
1121 .name = "axp288_charger",
1122 .num_resources = ARRAY_SIZE(axp288_charger_resources),
1123 .resources = axp288_charger_resources,
1124 }, {
1125 .name = "axp288_fuel_gauge",
1126 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources),
1127 .resources = axp288_fuel_gauge_resources,
1128 .swnode = &axp288_fuel_gauge_sw_node,
1129 }, {
1130 .name = "axp221-pek",
1131 .num_resources = ARRAY_SIZE(axp288_power_button_resources),
1132 .resources = axp288_power_button_resources,
1133 }, {
1134 .name = "axp288_pmic_acpi",
1135 },
1136 };
1137
1138 static const struct mfd_cell axp803_cells[] = {
1139 {
1140 .name = "axp221-pek",
1141 .num_resources = ARRAY_SIZE(axp803_pek_resources),
1142 .resources = axp803_pek_resources,
1143 }, {
1144 .name = "axp20x-gpio",
1145 .of_compatible = "x-powers,axp813-gpio",
1146 }, {
1147 .name = "axp813-adc",
1148 .of_compatible = "x-powers,axp813-adc",
1149 }, {
1150 .name = "axp20x-battery-power-supply",
1151 .of_compatible = "x-powers,axp813-battery-power-supply",
1152 }, {
1153 .name = "axp20x-ac-power-supply",
1154 .of_compatible = "x-powers,axp813-ac-power-supply",
1155 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
1156 .resources = axp20x_ac_power_supply_resources,
1157 }, {
1158 .name = "axp20x-usb-power-supply",
1159 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources),
1160 .resources = axp803_usb_power_supply_resources,
1161 .of_compatible = "x-powers,axp813-usb-power-supply",
1162 },
1163 { .name = "axp20x-regulator" },
1164 };
1165
1166 static const struct mfd_cell axp806_self_working_cells[] = {
1167 {
1168 .name = "axp221-pek",
1169 .num_resources = ARRAY_SIZE(axp806_pek_resources),
1170 .resources = axp806_pek_resources,
1171 },
1172 { .name = "axp20x-regulator" },
1173 };
1174
1175 static const struct mfd_cell axp806_cells[] = {
1176 {
1177 .id = 2,
1178 .name = "axp20x-regulator",
1179 },
1180 };
1181
1182 static const struct mfd_cell axp809_cells[] = {
1183 {
1184 .name = "axp20x-gpio",
1185 .of_compatible = "x-powers,axp221-gpio",
1186 }, {
1187 .name = "axp221-pek",
1188 .num_resources = ARRAY_SIZE(axp809_pek_resources),
1189 .resources = axp809_pek_resources,
1190 }, {
1191 .id = 1,
1192 .name = "axp20x-regulator",
1193 },
1194 };
1195
1196 static const struct mfd_cell axp813_cells[] = {
1197 {
1198 .name = "axp221-pek",
1199 .num_resources = ARRAY_SIZE(axp803_pek_resources),
1200 .resources = axp803_pek_resources,
1201 }, {
1202 .name = "axp20x-regulator",
1203 }, {
1204 .name = "axp20x-gpio",
1205 .of_compatible = "x-powers,axp813-gpio",
1206 }, {
1207 .name = "axp813-adc",
1208 .of_compatible = "x-powers,axp813-adc",
1209 }, {
1210 .name = "axp20x-battery-power-supply",
1211 .of_compatible = "x-powers,axp813-battery-power-supply",
1212 }, {
1213 .name = "axp20x-ac-power-supply",
1214 .of_compatible = "x-powers,axp813-ac-power-supply",
1215 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
1216 .resources = axp20x_ac_power_supply_resources,
1217 }, {
1218 .name = "axp20x-usb-power-supply",
1219 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources),
1220 .resources = axp803_usb_power_supply_resources,
1221 .of_compatible = "x-powers,axp813-usb-power-supply",
1222 },
1223 };
1224
1225 static const struct mfd_cell axp15060_cells[] = {
1226 {
1227 .name = "axp221-pek",
1228 .num_resources = ARRAY_SIZE(axp15060_pek_resources),
1229 .resources = axp15060_pek_resources,
1230 }, {
1231 .name = "axp20x-regulator",
1232 },
1233 };
1234
1235 /* For boards that don't have IRQ line connected to SOC. */
1236 static const struct mfd_cell axp_regulator_only_cells[] = {
1237 /* PMIC without IRQ line may be secondary PMIC */
1238 MFD_CELL_BASIC("axp20x-regulator", NULL, NULL, 0, 1),
1239 };
1240
axp20x_power_off(struct sys_off_data * data)1241 static int axp20x_power_off(struct sys_off_data *data)
1242 {
1243 struct axp20x_dev *axp20x = data->cb_data;
1244 unsigned int shutdown_reg;
1245
1246 switch (axp20x->variant) {
1247 case AXP323_ID:
1248 case AXP313A_ID:
1249 shutdown_reg = AXP313A_SHUTDOWN_CTRL;
1250 break;
1251 default:
1252 shutdown_reg = AXP20X_OFF_CTRL;
1253 break;
1254 }
1255
1256 regmap_write(axp20x->regmap, shutdown_reg, AXP20X_OFF);
1257
1258 /* Give capacitors etc. time to drain to avoid kernel panic msg. */
1259 mdelay(500);
1260
1261 return NOTIFY_DONE;
1262 }
1263
axp20x_match_device(struct axp20x_dev * axp20x)1264 int axp20x_match_device(struct axp20x_dev *axp20x)
1265 {
1266 struct device *dev = axp20x->dev;
1267 const struct mfd_cell *cells_no_irq = NULL;
1268 int nr_cells_no_irq = 0;
1269
1270 axp20x->variant = (long)device_get_match_data(dev);
1271 switch (axp20x->variant) {
1272 case AXP152_ID:
1273 axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
1274 axp20x->cells = axp152_cells;
1275 axp20x->regmap_cfg = &axp152_regmap_config;
1276 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
1277 break;
1278 case AXP192_ID:
1279 axp20x->nr_cells = ARRAY_SIZE(axp192_cells);
1280 axp20x->cells = axp192_cells;
1281 axp20x->regmap_cfg = &axp192_regmap_config;
1282 axp20x->regmap_irq_chip = &axp192_regmap_irq_chip;
1283 break;
1284 case AXP202_ID:
1285 case AXP209_ID:
1286 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
1287 axp20x->cells = axp20x_cells;
1288 axp20x->regmap_cfg = &axp20x_regmap_config;
1289 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;
1290 break;
1291 case AXP221_ID:
1292 axp20x->nr_cells = ARRAY_SIZE(axp221_cells);
1293 axp20x->cells = axp221_cells;
1294 axp20x->regmap_cfg = &axp22x_regmap_config;
1295 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
1296 break;
1297 case AXP223_ID:
1298 axp20x->nr_cells = ARRAY_SIZE(axp223_cells);
1299 axp20x->cells = axp223_cells;
1300 axp20x->regmap_cfg = &axp22x_regmap_config;
1301 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
1302 break;
1303 case AXP288_ID:
1304 axp20x->cells = axp288_cells;
1305 axp20x->nr_cells = ARRAY_SIZE(axp288_cells);
1306 axp20x->regmap_cfg = &axp288_regmap_config;
1307 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
1308 axp20x->irq_flags = IRQF_TRIGGER_LOW;
1309 break;
1310 case AXP313A_ID:
1311 axp20x->nr_cells = ARRAY_SIZE(axp313a_cells);
1312 axp20x->cells = axp313a_cells;
1313 axp20x->regmap_cfg = &axp313a_regmap_config;
1314 axp20x->regmap_irq_chip = &axp313a_regmap_irq_chip;
1315 break;
1316 case AXP323_ID:
1317 axp20x->nr_cells = ARRAY_SIZE(axp313a_cells);
1318 axp20x->cells = axp313a_cells;
1319 axp20x->regmap_cfg = &axp323_regmap_config;
1320 axp20x->regmap_irq_chip = &axp313a_regmap_irq_chip;
1321 break;
1322 case AXP717_ID:
1323 axp20x->nr_cells = ARRAY_SIZE(axp717_cells);
1324 axp20x->cells = axp717_cells;
1325 axp20x->regmap_cfg = &axp717_regmap_config;
1326 axp20x->regmap_irq_chip = &axp717_regmap_irq_chip;
1327 break;
1328 case AXP803_ID:
1329 axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
1330 axp20x->cells = axp803_cells;
1331 axp20x->regmap_cfg = &axp288_regmap_config;
1332 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
1333 break;
1334 case AXP806_ID:
1335 /*
1336 * Don't register the power key part if in slave mode or
1337 * if there is no interrupt line.
1338 */
1339 if (of_property_read_bool(axp20x->dev->of_node,
1340 "x-powers,self-working-mode")) {
1341 axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells);
1342 axp20x->cells = axp806_self_working_cells;
1343 } else {
1344 axp20x->nr_cells = ARRAY_SIZE(axp806_cells);
1345 axp20x->cells = axp806_cells;
1346 }
1347 nr_cells_no_irq = ARRAY_SIZE(axp806_cells);
1348 cells_no_irq = axp806_cells;
1349 axp20x->regmap_cfg = &axp806_regmap_config;
1350 axp20x->regmap_irq_chip = &axp806_regmap_irq_chip;
1351 break;
1352 case AXP809_ID:
1353 axp20x->nr_cells = ARRAY_SIZE(axp809_cells);
1354 axp20x->cells = axp809_cells;
1355 axp20x->regmap_cfg = &axp22x_regmap_config;
1356 axp20x->regmap_irq_chip = &axp809_regmap_irq_chip;
1357 break;
1358 case AXP813_ID:
1359 axp20x->nr_cells = ARRAY_SIZE(axp813_cells);
1360 axp20x->cells = axp813_cells;
1361 axp20x->regmap_cfg = &axp288_regmap_config;
1362 /*
1363 * The IRQ table given in the datasheet is incorrect.
1364 * In IRQ enable/status registers 1, there are separate
1365 * IRQs for ACIN and VBUS, instead of bits [7:5] being
1366 * the same as bits [4:2]. So it shares the same IRQs
1367 * as the AXP803, rather than the AXP288.
1368 */
1369 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
1370 break;
1371 case AXP15060_ID:
1372 axp20x->nr_cells = ARRAY_SIZE(axp15060_cells);
1373 axp20x->cells = axp15060_cells;
1374 axp20x->regmap_cfg = &axp15060_regmap_config;
1375 axp20x->regmap_irq_chip = &axp15060_regmap_irq_chip;
1376 break;
1377 default:
1378 dev_err(dev, "unsupported AXP20X ID %u\n", axp20x->variant);
1379 return -EINVAL;
1380 }
1381
1382 /*
1383 * Use an alternative cell array when no interrupt line is connected,
1384 * since IRQs are required by some drivers.
1385 * The default is the safe "regulator-only", as this works fine without
1386 * an interrupt specified.
1387 */
1388 if (axp20x->irq <= 0) {
1389 if (cells_no_irq) {
1390 axp20x->nr_cells = nr_cells_no_irq;
1391 axp20x->cells = cells_no_irq;
1392 } else {
1393 axp20x->nr_cells = ARRAY_SIZE(axp_regulator_only_cells);
1394 axp20x->cells = axp_regulator_only_cells;
1395 }
1396 }
1397
1398 dev_info(dev, "AXP20x variant %s found\n",
1399 axp20x_model_names[axp20x->variant]);
1400
1401 return 0;
1402 }
1403 EXPORT_SYMBOL(axp20x_match_device);
1404
axp20x_device_probe(struct axp20x_dev * axp20x)1405 int axp20x_device_probe(struct axp20x_dev *axp20x)
1406 {
1407 int ret;
1408
1409 /*
1410 * The AXP806 supports either master/standalone or slave mode.
1411 * Slave mode allows sharing the serial bus, even with multiple
1412 * AXP806 which all have the same hardware address.
1413 *
1414 * This is done with extra "serial interface address extension",
1415 * or AXP806_BUS_ADDR_EXT, and "register address extension", or
1416 * AXP806_REG_ADDR_EXT, registers. The former is read-only, with
1417 * 1 bit customizable at the factory, and 1 bit depending on the
1418 * state of an external pin. The latter is writable. The device
1419 * will only respond to operations to its other registers when
1420 * the these device addressing bits (in the upper 4 bits of the
1421 * registers) match.
1422 *
1423 * By default we support an AXP806 chained to an AXP809 in slave
1424 * mode. Boards which use an AXP806 in master mode can set the
1425 * property "x-powers,master-mode" to override the default.
1426 */
1427 if (axp20x->variant == AXP806_ID) {
1428 if (of_property_read_bool(axp20x->dev->of_node,
1429 "x-powers,master-mode") ||
1430 of_property_read_bool(axp20x->dev->of_node,
1431 "x-powers,self-working-mode"))
1432 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
1433 AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE);
1434 else
1435 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
1436 AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE);
1437 }
1438
1439 /* Only if there is an interrupt line connected towards the CPU. */
1440 if (axp20x->irq > 0) {
1441 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
1442 IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags,
1443 -1, axp20x->regmap_irq_chip,
1444 &axp20x->regmap_irqc);
1445 if (ret) {
1446 dev_err(axp20x->dev, "failed to add irq chip: %d\n",
1447 ret);
1448 return ret;
1449 }
1450 }
1451
1452 ret = mfd_add_devices(axp20x->dev, PLATFORM_DEVID_NONE, axp20x->cells,
1453 axp20x->nr_cells, NULL, 0, NULL);
1454
1455 if (ret) {
1456 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret);
1457 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
1458 return ret;
1459 }
1460
1461 if (axp20x->variant != AXP288_ID)
1462 devm_register_power_off_handler(axp20x->dev, axp20x_power_off, axp20x);
1463
1464 dev_info(axp20x->dev, "AXP20X driver loaded\n");
1465
1466 return 0;
1467 }
1468 EXPORT_SYMBOL(axp20x_device_probe);
1469
axp20x_device_remove(struct axp20x_dev * axp20x)1470 void axp20x_device_remove(struct axp20x_dev *axp20x)
1471 {
1472 mfd_remove_devices(axp20x->dev);
1473 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
1474 }
1475 EXPORT_SYMBOL(axp20x_device_remove);
1476
1477 MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
1478 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
1479 MODULE_LICENSE("GPL");
1480