1 // SPDX-License-Identifier: ISC
2 /*
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
7 */
8
9 #include <linux/skbuff.h>
10 #include <linux/ctype.h>
11
12 #include "core.h"
13 #include "htc.h"
14 #include "debug.h"
15 #include "wmi.h"
16 #include "wmi-tlv.h"
17 #include "mac.h"
18 #include "testmode.h"
19 #include "wmi-ops.h"
20 #include "p2p.h"
21 #include "hw.h"
22 #include "hif.h"
23 #include "txrx.h"
24
25 #define ATH10K_WMI_BARRIER_ECHO_ID 0xBA991E9
26 #define ATH10K_WMI_BARRIER_TIMEOUT_HZ (3 * HZ)
27 #define ATH10K_WMI_DFS_CONF_TIMEOUT_HZ (HZ / 6)
28
29 /* MAIN WMI cmd track */
30 static struct wmi_cmd_map wmi_cmd_map = {
31 .init_cmdid = WMI_INIT_CMDID,
32 .start_scan_cmdid = WMI_START_SCAN_CMDID,
33 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
34 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
35 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
36 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
37 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
38 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
39 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
40 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
41 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
42 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
43 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
44 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
45 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
46 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
47 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
48 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
49 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
50 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
51 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
52 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
53 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
54 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
55 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
56 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
57 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
58 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
59 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
60 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
61 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
62 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
63 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
64 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
65 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
66 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
67 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
68 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
69 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
70 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
71 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
72 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
73 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
74 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
75 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
76 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
77 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
78 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
79 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
80 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
81 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
82 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
83 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
84 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
85 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
86 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
87 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
88 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
89 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
90 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
91 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
92 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
93 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
94 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
95 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
96 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
97 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
98 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
99 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
100 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
101 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
102 .wlan_profile_set_hist_intvl_cmdid =
103 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
104 .wlan_profile_get_profile_data_cmdid =
105 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
106 .wlan_profile_enable_profile_id_cmdid =
107 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
108 .wlan_profile_list_profile_id_cmdid =
109 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
110 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
111 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
112 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
113 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
114 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
115 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
116 .wow_enable_disable_wake_event_cmdid =
117 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
118 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
119 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
120 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
121 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
122 .vdev_spectral_scan_configure_cmdid =
123 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
124 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
125 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
126 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
127 .network_list_offload_config_cmdid =
128 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
129 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
130 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
131 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
132 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
133 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
134 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
135 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
136 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
137 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
138 .echo_cmdid = WMI_ECHO_CMDID,
139 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
140 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
141 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
142 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
143 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
144 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
145 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
146 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
147 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
148 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
149 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
150 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
151 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
152 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
153 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
154 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
155 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
156 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
157 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
158 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
159 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
160 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
161 .nan_cmdid = WMI_CMD_UNSUPPORTED,
162 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
163 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
164 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
165 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
166 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
167 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
168 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
169 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
170 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
171 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
172 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
173 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
174 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
175 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
176 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
177 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
178 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
179 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
180 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
181 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
182 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
183 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
184 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
185 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
186 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
187 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
188 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
189 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
190 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
191 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
192 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
193 .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
194 };
195
196 /* 10.X WMI cmd track */
197 static struct wmi_cmd_map wmi_10x_cmd_map = {
198 .init_cmdid = WMI_10X_INIT_CMDID,
199 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
200 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
201 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
202 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
203 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
204 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
205 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
206 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
207 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
208 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
209 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
210 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
211 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
212 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
213 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
214 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
215 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
216 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
217 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
218 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
219 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
220 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
221 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
222 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
223 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
224 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
225 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
226 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
227 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
228 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
229 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
230 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
231 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
232 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
233 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
234 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
235 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
236 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
237 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
238 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
239 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
240 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
241 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
242 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
243 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
244 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
245 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
246 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
247 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
248 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
249 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
250 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
251 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
252 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
253 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
254 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
255 .roam_scan_rssi_change_threshold =
256 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
257 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
258 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
259 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
260 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
261 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
262 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
263 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
264 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
265 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
266 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
267 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
268 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
269 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
270 .wlan_profile_set_hist_intvl_cmdid =
271 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
272 .wlan_profile_get_profile_data_cmdid =
273 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
274 .wlan_profile_enable_profile_id_cmdid =
275 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
276 .wlan_profile_list_profile_id_cmdid =
277 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
278 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
279 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
280 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
281 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
282 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
283 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
284 .wow_enable_disable_wake_event_cmdid =
285 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
286 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
287 .wow_hostwakeup_from_sleep_cmdid =
288 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
289 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
290 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
291 .vdev_spectral_scan_configure_cmdid =
292 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
293 .vdev_spectral_scan_enable_cmdid =
294 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
295 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
296 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
297 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
298 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
299 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
300 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
301 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
302 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
303 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
304 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
305 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
306 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
307 .echo_cmdid = WMI_10X_ECHO_CMDID,
308 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
309 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
310 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
311 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
312 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
313 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
314 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
315 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
316 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
317 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
318 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
319 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
320 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
321 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
322 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
323 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
324 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
325 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
326 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
327 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
328 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
329 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
330 .nan_cmdid = WMI_CMD_UNSUPPORTED,
331 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
332 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
333 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
334 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
335 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
336 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
337 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
338 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
339 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
340 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
341 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
342 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
343 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
344 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
345 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
346 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
347 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
348 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
349 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
350 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
351 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
352 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
353 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
354 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
355 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
356 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
357 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
358 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
359 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
360 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
361 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
362 .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
363 };
364
365 /* 10.2.4 WMI cmd track */
366 static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
367 .init_cmdid = WMI_10_2_INIT_CMDID,
368 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
369 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
370 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
371 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
372 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
373 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
374 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
375 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
376 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
377 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
378 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
379 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
380 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
381 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
382 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
383 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
384 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
385 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
386 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
387 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
388 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
389 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
390 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
391 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
392 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
393 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
394 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
395 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
396 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
397 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
398 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
399 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
400 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
401 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
402 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
403 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
404 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
405 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
406 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
407 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
408 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
409 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
410 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
411 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
412 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
413 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
414 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
415 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
416 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
417 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
418 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
419 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
420 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
421 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
422 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
423 .roam_scan_rssi_change_threshold =
424 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
425 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
426 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
427 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
428 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
429 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
430 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
431 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
432 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
433 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
434 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
435 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
436 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
437 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
438 .wlan_profile_set_hist_intvl_cmdid =
439 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
440 .wlan_profile_get_profile_data_cmdid =
441 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
442 .wlan_profile_enable_profile_id_cmdid =
443 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
444 .wlan_profile_list_profile_id_cmdid =
445 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
446 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
447 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
448 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
449 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
450 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
451 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
452 .wow_enable_disable_wake_event_cmdid =
453 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
454 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
455 .wow_hostwakeup_from_sleep_cmdid =
456 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
457 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
458 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
459 .vdev_spectral_scan_configure_cmdid =
460 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
461 .vdev_spectral_scan_enable_cmdid =
462 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
463 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
464 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
465 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
466 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
467 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
468 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
469 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
470 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
471 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
472 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
473 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
474 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
475 .echo_cmdid = WMI_10_2_ECHO_CMDID,
476 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
477 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
478 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
479 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
480 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
481 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
482 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
483 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
484 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
485 .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
486 .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS,
487 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
488 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
489 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
490 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
491 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
492 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
493 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
494 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
495 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
496 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
497 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
498 .nan_cmdid = WMI_CMD_UNSUPPORTED,
499 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
500 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
501 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
502 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
503 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
504 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
505 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
506 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
507 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
508 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
509 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
510 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
511 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
512 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
513 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
514 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
515 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
516 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
517 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
518 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
519 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
520 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
521 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
522 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
523 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
524 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
525 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
526 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
527 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
528 .pdev_bss_chan_info_request_cmdid =
529 WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
530 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
531 .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
532 .set_bb_timing_cmdid = WMI_10_2_PDEV_SET_BB_TIMING_CONFIG_CMDID,
533 };
534
535 /* 10.4 WMI cmd track */
536 static struct wmi_cmd_map wmi_10_4_cmd_map = {
537 .init_cmdid = WMI_10_4_INIT_CMDID,
538 .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID,
539 .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID,
540 .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID,
541 .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
542 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
543 .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
544 .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID,
545 .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID,
546 .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
547 .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
548 .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
549 .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
550 .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
551 .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
552 .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
553 .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
554 .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
555 .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
556 .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID,
557 .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID,
558 .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID,
559 .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
560 .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID,
561 .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID,
562 .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID,
563 .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID,
564 .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID,
565 .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID,
566 .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID,
567 .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID,
568 .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID,
569 .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID,
570 .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
571 .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
572 .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID,
573 .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID,
574 .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID,
575 .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID,
576 .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID,
577 .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
578 .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID,
579 .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID,
580 .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
581 .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID,
582 .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID,
583 .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID,
584 .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID,
585 .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID,
586 .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID,
587 .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
588 .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID,
589 .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID,
590 .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID,
591 .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE,
592 .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
593 .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD,
594 .roam_scan_rssi_change_threshold =
595 WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
596 .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE,
597 .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
598 .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
599 .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD,
600 .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
601 .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
602 .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE,
603 .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
604 .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
605 .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID,
606 .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
607 .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
608 .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
609 .wlan_profile_set_hist_intvl_cmdid =
610 WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
611 .wlan_profile_get_profile_data_cmdid =
612 WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
613 .wlan_profile_enable_profile_id_cmdid =
614 WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
615 .wlan_profile_list_profile_id_cmdid =
616 WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
617 .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID,
618 .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID,
619 .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID,
620 .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID,
621 .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
622 .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
623 .wow_enable_disable_wake_event_cmdid =
624 WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
625 .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID,
626 .wow_hostwakeup_from_sleep_cmdid =
627 WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
628 .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID,
629 .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID,
630 .vdev_spectral_scan_configure_cmdid =
631 WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
632 .vdev_spectral_scan_enable_cmdid =
633 WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
634 .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID,
635 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
636 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
637 .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID,
638 .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
639 .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
640 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
641 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
642 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
643 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
644 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
645 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
646 .echo_cmdid = WMI_10_4_ECHO_CMDID,
647 .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID,
648 .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID,
649 .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID,
650 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
651 .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
652 .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
653 .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID,
654 .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID,
655 .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID,
656 .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
657 .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED,
658 .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED,
659 .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
660 .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
661 .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
662 .wlan_peer_caching_add_peer_cmdid =
663 WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
664 .wlan_peer_caching_evict_peer_cmdid =
665 WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
666 .wlan_peer_caching_restore_peer_cmdid =
667 WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
668 .wlan_peer_caching_print_all_peers_info_cmdid =
669 WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
670 .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
671 .peer_add_proxy_sta_entry_cmdid =
672 WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
673 .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID,
674 .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID,
675 .nan_cmdid = WMI_10_4_NAN_CMDID,
676 .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID,
677 .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID,
678 .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
679 .pdev_smart_ant_set_rx_antenna_cmdid =
680 WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
681 .peer_smart_ant_set_tx_antenna_cmdid =
682 WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
683 .peer_smart_ant_set_train_info_cmdid =
684 WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
685 .peer_smart_ant_set_node_config_ops_cmdid =
686 WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
687 .pdev_set_antenna_switch_table_cmdid =
688 WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
689 .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
690 .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
691 .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
692 .pdev_ratepwr_chainmsk_table_cmdid =
693 WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
694 .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID,
695 .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID,
696 .fwtest_cmdid = WMI_10_4_FWTEST_CMDID,
697 .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID,
698 .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID,
699 .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
700 .pdev_get_ani_ofdm_config_cmdid =
701 WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
702 .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
703 .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
704 .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID,
705 .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID,
706 .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
707 .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID,
708 .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID,
709 .vdev_filter_neighbor_rx_packets_cmdid =
710 WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
711 .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID,
712 .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID,
713 .pdev_bss_chan_info_request_cmdid =
714 WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
715 .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID,
716 .vdev_set_ie_cmdid = WMI_10_4_VDEV_SET_IE_CMDID,
717 .set_lteu_config_cmdid = WMI_10_4_SET_LTEU_CONFIG_CMDID,
718 .atf_ssid_grouping_request_cmdid =
719 WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
720 .peer_atf_ext_request_cmdid = WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
721 .set_periodic_channel_stats_cfg_cmdid =
722 WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
723 .peer_bwf_request_cmdid = WMI_10_4_PEER_BWF_REQUEST_CMDID,
724 .btcoex_cfg_cmdid = WMI_10_4_BTCOEX_CFG_CMDID,
725 .peer_tx_mu_txmit_count_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
726 .peer_tx_mu_txmit_rstcnt_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
727 .peer_gid_userpos_list_cmdid = WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
728 .pdev_check_cal_version_cmdid = WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
729 .coex_version_cfg_cmid = WMI_10_4_COEX_VERSION_CFG_CMID,
730 .pdev_get_rx_filter_cmdid = WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
731 .pdev_extended_nss_cfg_cmdid = WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
732 .vdev_set_scan_nac_rssi_cmdid = WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
733 .prog_gpio_band_select_cmdid = WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
734 .config_smart_logging_cmdid = WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
735 .debug_fatal_condition_cmdid = WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
736 .get_tsf_timer_cmdid = WMI_10_4_GET_TSF_TIMER_CMDID,
737 .pdev_get_tpc_table_cmdid = WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
738 .vdev_sifs_trigger_time_cmdid = WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
739 .pdev_wds_entry_list_cmdid = WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
740 .tdls_set_state_cmdid = WMI_10_4_TDLS_SET_STATE_CMDID,
741 .tdls_peer_update_cmdid = WMI_10_4_TDLS_PEER_UPDATE_CMDID,
742 .tdls_set_offchan_mode_cmdid = WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
743 .radar_found_cmdid = WMI_10_4_RADAR_FOUND_CMDID,
744 .per_peer_per_tid_config_cmdid = WMI_10_4_PER_PEER_PER_TID_CONFIG_CMDID,
745 };
746
747 static struct wmi_peer_param_map wmi_peer_param_map = {
748 .smps_state = WMI_PEER_SMPS_STATE,
749 .ampdu = WMI_PEER_AMPDU,
750 .authorize = WMI_PEER_AUTHORIZE,
751 .chan_width = WMI_PEER_CHAN_WIDTH,
752 .nss = WMI_PEER_NSS,
753 .use_4addr = WMI_PEER_USE_4ADDR,
754 .use_fixed_power = WMI_PEER_USE_FIXED_PWR,
755 .debug = WMI_PEER_DEBUG,
756 .phymode = WMI_PEER_PHYMODE,
757 .dummy_var = WMI_PEER_DUMMY_VAR,
758 };
759
760 /* MAIN WMI VDEV param map */
761 static struct wmi_vdev_param_map wmi_vdev_param_map = {
762 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
763 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
764 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
765 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
766 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
767 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
768 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
769 .preamble = WMI_VDEV_PARAM_PREAMBLE,
770 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
771 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
772 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
773 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
774 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
775 .wmi_vdev_oc_scheduler_air_time_limit =
776 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
777 .wds = WMI_VDEV_PARAM_WDS,
778 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
779 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
780 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
781 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
782 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
783 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
784 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
785 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
786 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
787 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
788 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
789 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
790 .sgi = WMI_VDEV_PARAM_SGI,
791 .ldpc = WMI_VDEV_PARAM_LDPC,
792 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
793 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
794 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
795 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
796 .nss = WMI_VDEV_PARAM_NSS,
797 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
798 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
799 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
800 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
801 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
802 .ap_keepalive_min_idle_inactive_time_secs =
803 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
804 .ap_keepalive_max_idle_inactive_time_secs =
805 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
806 .ap_keepalive_max_unresponsive_time_secs =
807 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
808 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
809 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
810 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
811 .txbf = WMI_VDEV_PARAM_TXBF,
812 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
813 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
814 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
815 .ap_detect_out_of_sync_sleeping_sta_time_secs =
816 WMI_VDEV_PARAM_UNSUPPORTED,
817 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
818 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
819 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
820 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
821 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
822 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
823 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
824 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
825 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
826 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
827 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
828 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
829 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
830 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
831 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
832 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
833 .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED,
834 .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED,
835 };
836
837 /* 10.X WMI VDEV param map */
838 static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
839 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
840 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
841 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
842 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
843 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
844 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
845 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
846 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
847 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
848 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
849 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
850 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
851 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
852 .wmi_vdev_oc_scheduler_air_time_limit =
853 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
854 .wds = WMI_10X_VDEV_PARAM_WDS,
855 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
856 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
857 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
858 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
859 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
860 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
861 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
862 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
863 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
864 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
865 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
866 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
867 .sgi = WMI_10X_VDEV_PARAM_SGI,
868 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
869 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
870 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
871 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
872 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
873 .nss = WMI_10X_VDEV_PARAM_NSS,
874 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
875 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
876 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
877 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
878 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
879 .ap_keepalive_min_idle_inactive_time_secs =
880 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
881 .ap_keepalive_max_idle_inactive_time_secs =
882 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
883 .ap_keepalive_max_unresponsive_time_secs =
884 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
885 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
886 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
887 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
888 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
889 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
890 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
891 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
892 .ap_detect_out_of_sync_sleeping_sta_time_secs =
893 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
894 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
895 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
896 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
897 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
898 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
899 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
900 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
901 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
902 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
903 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
904 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
905 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
906 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
907 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
908 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
909 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
910 .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED,
911 .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED,
912 };
913
914 static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
915 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
916 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
917 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
918 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
919 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
920 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
921 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
922 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
923 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
924 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
925 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
926 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
927 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
928 .wmi_vdev_oc_scheduler_air_time_limit =
929 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
930 .wds = WMI_10X_VDEV_PARAM_WDS,
931 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
932 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
933 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
934 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
935 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
936 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
937 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
938 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
939 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
940 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
941 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
942 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
943 .sgi = WMI_10X_VDEV_PARAM_SGI,
944 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
945 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
946 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
947 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
948 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
949 .nss = WMI_10X_VDEV_PARAM_NSS,
950 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
951 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
952 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
953 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
954 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
955 .ap_keepalive_min_idle_inactive_time_secs =
956 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
957 .ap_keepalive_max_idle_inactive_time_secs =
958 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
959 .ap_keepalive_max_unresponsive_time_secs =
960 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
961 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
962 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
963 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
964 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
965 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
966 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
967 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
968 .ap_detect_out_of_sync_sleeping_sta_time_secs =
969 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
970 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
971 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
972 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
973 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
974 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
975 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
976 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
977 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
978 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
979 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
980 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
981 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
982 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
983 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
984 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
985 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
986 .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED,
987 .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED,
988 };
989
990 static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = {
991 .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD,
992 .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
993 .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
994 .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
995 .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
996 .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
997 .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME,
998 .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE,
999 .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME,
1000 .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
1001 .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
1002 .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
1003 .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
1004 .wmi_vdev_oc_scheduler_air_time_limit =
1005 WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
1006 .wds = WMI_10_4_VDEV_PARAM_WDS,
1007 .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
1008 .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
1009 .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
1010 .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
1011 .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM,
1012 .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH,
1013 .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
1014 .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
1015 .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
1016 .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE,
1017 .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
1018 .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE,
1019 .sgi = WMI_10_4_VDEV_PARAM_SGI,
1020 .ldpc = WMI_10_4_VDEV_PARAM_LDPC,
1021 .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC,
1022 .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC,
1023 .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
1024 .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID,
1025 .nss = WMI_10_4_VDEV_PARAM_NSS,
1026 .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
1027 .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
1028 .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
1029 .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
1030 .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
1031 .ap_keepalive_min_idle_inactive_time_secs =
1032 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
1033 .ap_keepalive_max_idle_inactive_time_secs =
1034 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
1035 .ap_keepalive_max_unresponsive_time_secs =
1036 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
1037 .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
1038 .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
1039 .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
1040 .txbf = WMI_10_4_VDEV_PARAM_TXBF,
1041 .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
1042 .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
1043 .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
1044 .ap_detect_out_of_sync_sleeping_sta_time_secs =
1045 WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
1046 .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
1047 .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
1048 .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET,
1049 .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
1050 .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
1051 .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
1052 .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
1053 .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
1054 .early_rx_bmiss_sample_cycle =
1055 WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
1056 .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
1057 .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
1058 .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
1059 .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA,
1060 .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC,
1061 .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
1062 .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
1063 .inc_tsf = WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
1064 .dec_tsf = WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
1065 .disable_4addr_src_lrn = WMI_10_4_VDEV_PARAM_DISABLE_4_ADDR_SRC_LRN,
1066 .rtt_responder_role = WMI_10_4_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE,
1067 };
1068
1069 static struct wmi_pdev_param_map wmi_pdev_param_map = {
1070 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
1071 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
1072 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
1073 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
1074 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
1075 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
1076 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
1077 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1078 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
1079 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
1080 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1081 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
1082 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
1083 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1084 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
1085 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
1086 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
1087 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
1088 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
1089 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1090 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1091 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
1092 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1093 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
1094 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
1095 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
1096 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1097 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1098 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
1099 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1100 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1101 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1102 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1103 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
1104 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
1105 .dcs = WMI_PDEV_PARAM_DCS,
1106 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
1107 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
1108 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
1109 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
1110 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
1111 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
1112 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
1113 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
1114 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
1115 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1116 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
1117 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1118 .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
1119 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1120 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1121 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1122 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1123 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1124 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1125 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1126 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1127 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1128 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1129 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1130 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1131 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1132 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1133 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1134 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1135 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1136 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1137 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1138 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1139 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1140 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1141 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1142 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1143 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1144 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1145 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1146 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1147 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1148 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1149 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1150 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1151 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1152 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1153 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1154 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1155 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1156 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1157 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1158 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1159 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1160 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1161 .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
1162 };
1163
1164 static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
1165 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
1166 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
1167 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
1168 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
1169 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
1170 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
1171 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
1172 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1173 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
1174 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
1175 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1176 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
1177 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
1178 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1179 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
1180 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
1181 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
1182 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
1183 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
1184 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1185 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1186 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
1187 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1188 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
1189 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
1190 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
1191 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
1192 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
1193 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
1194 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1195 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1196 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1197 .bcnflt_stats_update_period =
1198 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1199 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
1200 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
1201 .dcs = WMI_10X_PDEV_PARAM_DCS,
1202 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
1203 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
1204 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
1205 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
1206 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
1207 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
1208 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
1209 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
1210 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
1211 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
1212 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
1213 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
1214 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
1215 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1216 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1217 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1218 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1219 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1220 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1221 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1222 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1223 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1224 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1225 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1226 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1227 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1228 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1229 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1230 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1231 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1232 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1233 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1234 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1235 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1236 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1237 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1238 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1239 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1240 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1241 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1242 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1243 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1244 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1245 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1246 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1247 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1248 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1249 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1250 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1251 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1252 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1253 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1254 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1255 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1256 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1257 .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
1258 };
1259
1260 static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
1261 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
1262 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
1263 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
1264 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
1265 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
1266 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
1267 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
1268 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1269 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
1270 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
1271 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1272 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
1273 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
1274 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1275 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
1276 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
1277 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
1278 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
1279 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
1280 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1281 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1282 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
1283 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1284 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
1285 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
1286 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
1287 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
1288 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
1289 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
1290 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1291 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1292 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1293 .bcnflt_stats_update_period =
1294 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1295 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
1296 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
1297 .dcs = WMI_10X_PDEV_PARAM_DCS,
1298 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
1299 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
1300 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
1301 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
1302 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
1303 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
1304 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
1305 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
1306 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
1307 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
1308 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
1309 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
1310 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
1311 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1312 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1313 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1314 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1315 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1316 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1317 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1318 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1319 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1320 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1321 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1322 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1323 .peer_sta_ps_statechg_enable =
1324 WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
1325 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1326 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1327 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1328 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1329 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1330 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1331 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1332 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1333 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1334 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1335 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1336 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1337 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1338 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1339 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1340 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1341 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1342 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1343 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1344 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1345 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1346 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1347 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1348 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1349 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1350 .pdev_reset = WMI_10X_PDEV_PARAM_PDEV_RESET,
1351 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1352 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1353 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1354 .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
1355 };
1356
1357 /* firmware 10.2 specific mappings */
1358 static struct wmi_cmd_map wmi_10_2_cmd_map = {
1359 .init_cmdid = WMI_10_2_INIT_CMDID,
1360 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
1361 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
1362 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
1363 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
1364 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
1365 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
1366 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
1367 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
1368 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
1369 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
1370 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
1371 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
1372 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
1373 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
1374 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1375 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
1376 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
1377 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
1378 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
1379 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
1380 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
1381 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
1382 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
1383 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
1384 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
1385 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
1386 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
1387 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
1388 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
1389 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
1390 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
1391 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
1392 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
1393 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
1394 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
1395 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
1396 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
1397 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
1398 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
1399 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
1400 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
1401 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
1402 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
1403 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
1404 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
1405 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
1406 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
1407 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
1408 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
1409 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
1410 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
1411 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
1412 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
1413 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
1414 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
1415 .roam_scan_rssi_change_threshold =
1416 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1417 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
1418 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
1419 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
1420 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
1421 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
1422 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
1423 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
1424 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
1425 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
1426 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
1427 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
1428 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
1429 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
1430 .wlan_profile_set_hist_intvl_cmdid =
1431 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1432 .wlan_profile_get_profile_data_cmdid =
1433 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1434 .wlan_profile_enable_profile_id_cmdid =
1435 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1436 .wlan_profile_list_profile_id_cmdid =
1437 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1438 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
1439 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
1440 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
1441 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
1442 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
1443 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
1444 .wow_enable_disable_wake_event_cmdid =
1445 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1446 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
1447 .wow_hostwakeup_from_sleep_cmdid =
1448 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1449 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
1450 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
1451 .vdev_spectral_scan_configure_cmdid =
1452 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1453 .vdev_spectral_scan_enable_cmdid =
1454 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1455 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
1456 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
1457 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
1458 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
1459 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
1460 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
1461 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
1462 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
1463 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
1464 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
1465 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
1466 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
1467 .echo_cmdid = WMI_10_2_ECHO_CMDID,
1468 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
1469 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
1470 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
1471 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
1472 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1473 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1474 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
1475 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
1476 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
1477 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
1478 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
1479 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
1480 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
1481 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
1482 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
1483 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
1484 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
1485 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
1486 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
1487 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
1488 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1489 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
1490 .nan_cmdid = WMI_CMD_UNSUPPORTED,
1491 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
1492 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
1493 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
1494 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
1495 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
1496 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
1497 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
1498 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
1499 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
1500 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
1501 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
1502 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
1503 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
1504 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
1505 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
1506 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
1507 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
1508 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
1509 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
1510 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
1511 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
1512 .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
1513 };
1514
1515 static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = {
1516 .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK,
1517 .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
1518 .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
1519 .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
1520 .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
1521 .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
1522 .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
1523 .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1524 .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
1525 .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
1526 .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1527 .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
1528 .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
1529 .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1530 .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE,
1531 .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
1532 .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
1533 .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
1534 .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
1535 .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1536 .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1537 .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
1538 .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1539 .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
1540 .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
1541 .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
1542 .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
1543 .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1544 .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
1545 .pdev_stats_update_period =
1546 WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1547 .vdev_stats_update_period =
1548 WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1549 .peer_stats_update_period =
1550 WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1551 .bcnflt_stats_update_period =
1552 WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1553 .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS,
1554 .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
1555 .dcs = WMI_10_4_PDEV_PARAM_DCS,
1556 .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE,
1557 .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
1558 .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
1559 .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
1560 .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
1561 .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
1562 .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA,
1563 .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
1564 .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
1565 .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
1566 .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR,
1567 .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE,
1568 .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD,
1569 .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST,
1570 .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
1571 .smart_antenna_default_antenna =
1572 WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
1573 .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
1574 .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
1575 .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
1576 .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER,
1577 .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
1578 .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
1579 .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
1580 .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
1581 .remove_mcast2ucast_buffer =
1582 WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
1583 .peer_sta_ps_statechg_enable =
1584 WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
1585 .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
1586 .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
1587 .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
1588 .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
1589 .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
1590 .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
1591 .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
1592 .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
1593 .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS,
1594 .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
1595 .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
1596 .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
1597 .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE,
1598 .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
1599 .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
1600 .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
1601 .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN,
1602 .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
1603 .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
1604 .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
1605 .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
1606 .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
1607 .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
1608 .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
1609 .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
1610 .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET,
1611 .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
1612 .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
1613 .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
1614 .enable_btcoex = WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
1615 };
1616
1617 static const u8 wmi_key_cipher_suites[] = {
1618 [WMI_CIPHER_NONE] = WMI_CIPHER_NONE,
1619 [WMI_CIPHER_WEP] = WMI_CIPHER_WEP,
1620 [WMI_CIPHER_TKIP] = WMI_CIPHER_TKIP,
1621 [WMI_CIPHER_AES_OCB] = WMI_CIPHER_AES_OCB,
1622 [WMI_CIPHER_AES_CCM] = WMI_CIPHER_AES_CCM,
1623 [WMI_CIPHER_WAPI] = WMI_CIPHER_WAPI,
1624 [WMI_CIPHER_CKIP] = WMI_CIPHER_CKIP,
1625 [WMI_CIPHER_AES_CMAC] = WMI_CIPHER_AES_CMAC,
1626 [WMI_CIPHER_AES_GCM] = WMI_CIPHER_AES_GCM,
1627 };
1628
1629 static const u8 wmi_tlv_key_cipher_suites[] = {
1630 [WMI_CIPHER_NONE] = WMI_TLV_CIPHER_NONE,
1631 [WMI_CIPHER_WEP] = WMI_TLV_CIPHER_WEP,
1632 [WMI_CIPHER_TKIP] = WMI_TLV_CIPHER_TKIP,
1633 [WMI_CIPHER_AES_OCB] = WMI_TLV_CIPHER_AES_OCB,
1634 [WMI_CIPHER_AES_CCM] = WMI_TLV_CIPHER_AES_CCM,
1635 [WMI_CIPHER_WAPI] = WMI_TLV_CIPHER_WAPI,
1636 [WMI_CIPHER_CKIP] = WMI_TLV_CIPHER_CKIP,
1637 [WMI_CIPHER_AES_CMAC] = WMI_TLV_CIPHER_AES_CMAC,
1638 [WMI_CIPHER_AES_GCM] = WMI_TLV_CIPHER_AES_GCM,
1639 };
1640
1641 static const struct wmi_peer_flags_map wmi_peer_flags_map = {
1642 .auth = WMI_PEER_AUTH,
1643 .qos = WMI_PEER_QOS,
1644 .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY,
1645 .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY,
1646 .apsd = WMI_PEER_APSD,
1647 .ht = WMI_PEER_HT,
1648 .bw40 = WMI_PEER_40MHZ,
1649 .stbc = WMI_PEER_STBC,
1650 .ldbc = WMI_PEER_LDPC,
1651 .dyn_mimops = WMI_PEER_DYN_MIMOPS,
1652 .static_mimops = WMI_PEER_STATIC_MIMOPS,
1653 .spatial_mux = WMI_PEER_SPATIAL_MUX,
1654 .vht = WMI_PEER_VHT,
1655 .bw80 = WMI_PEER_80MHZ,
1656 .vht_2g = WMI_PEER_VHT_2G,
1657 .pmf = WMI_PEER_PMF,
1658 .bw160 = WMI_PEER_160MHZ,
1659 };
1660
1661 static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = {
1662 .auth = WMI_10X_PEER_AUTH,
1663 .qos = WMI_10X_PEER_QOS,
1664 .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY,
1665 .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY,
1666 .apsd = WMI_10X_PEER_APSD,
1667 .ht = WMI_10X_PEER_HT,
1668 .bw40 = WMI_10X_PEER_40MHZ,
1669 .stbc = WMI_10X_PEER_STBC,
1670 .ldbc = WMI_10X_PEER_LDPC,
1671 .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS,
1672 .static_mimops = WMI_10X_PEER_STATIC_MIMOPS,
1673 .spatial_mux = WMI_10X_PEER_SPATIAL_MUX,
1674 .vht = WMI_10X_PEER_VHT,
1675 .bw80 = WMI_10X_PEER_80MHZ,
1676 .bw160 = WMI_10X_PEER_160MHZ,
1677 };
1678
1679 static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = {
1680 .auth = WMI_10_2_PEER_AUTH,
1681 .qos = WMI_10_2_PEER_QOS,
1682 .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY,
1683 .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY,
1684 .apsd = WMI_10_2_PEER_APSD,
1685 .ht = WMI_10_2_PEER_HT,
1686 .bw40 = WMI_10_2_PEER_40MHZ,
1687 .stbc = WMI_10_2_PEER_STBC,
1688 .ldbc = WMI_10_2_PEER_LDPC,
1689 .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS,
1690 .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS,
1691 .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX,
1692 .vht = WMI_10_2_PEER_VHT,
1693 .bw80 = WMI_10_2_PEER_80MHZ,
1694 .vht_2g = WMI_10_2_PEER_VHT_2G,
1695 .pmf = WMI_10_2_PEER_PMF,
1696 .bw160 = WMI_10_2_PEER_160MHZ,
1697 };
1698
ath10k_wmi_put_wmi_channel(struct ath10k * ar,struct wmi_channel * ch,const struct wmi_channel_arg * arg)1699 void ath10k_wmi_put_wmi_channel(struct ath10k *ar, struct wmi_channel *ch,
1700 const struct wmi_channel_arg *arg)
1701 {
1702 u32 flags = 0;
1703 struct ieee80211_channel *chan = NULL;
1704
1705 memset(ch, 0, sizeof(*ch));
1706
1707 if (arg->passive)
1708 flags |= WMI_CHAN_FLAG_PASSIVE;
1709 if (arg->allow_ibss)
1710 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
1711 if (arg->allow_ht)
1712 flags |= WMI_CHAN_FLAG_ALLOW_HT;
1713 if (arg->allow_vht)
1714 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
1715 if (arg->ht40plus)
1716 flags |= WMI_CHAN_FLAG_HT40_PLUS;
1717 if (arg->chan_radar)
1718 flags |= WMI_CHAN_FLAG_DFS;
1719
1720 ch->band_center_freq2 = 0;
1721 ch->mhz = __cpu_to_le32(arg->freq);
1722 ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
1723 if (arg->mode == MODE_11AC_VHT80_80) {
1724 ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq2);
1725 chan = ieee80211_get_channel(ar->hw->wiphy,
1726 arg->band_center_freq2 - 10);
1727 }
1728
1729 if (arg->mode == MODE_11AC_VHT160) {
1730 u32 band_center_freq1;
1731 u32 band_center_freq2;
1732
1733 if (arg->freq > arg->band_center_freq1) {
1734 band_center_freq1 = arg->band_center_freq1 + 40;
1735 band_center_freq2 = arg->band_center_freq1 - 40;
1736 } else {
1737 band_center_freq1 = arg->band_center_freq1 - 40;
1738 band_center_freq2 = arg->band_center_freq1 + 40;
1739 }
1740
1741 ch->band_center_freq1 =
1742 __cpu_to_le32(band_center_freq1);
1743 /* Minus 10 to get a defined 5G channel frequency*/
1744 chan = ieee80211_get_channel(ar->hw->wiphy,
1745 band_center_freq2 - 10);
1746 /* The center frequency of the entire VHT160 */
1747 ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq1);
1748 }
1749
1750 if (chan && chan->flags & IEEE80211_CHAN_RADAR)
1751 flags |= WMI_CHAN_FLAG_DFS_CFREQ2;
1752
1753 ch->min_power = arg->min_power;
1754 ch->max_power = arg->max_power;
1755 ch->reg_power = arg->max_reg_power;
1756 ch->antenna_max = arg->max_antenna_gain;
1757 ch->max_tx_power = arg->max_power;
1758
1759 /* mode & flags share storage */
1760 ch->mode = arg->mode;
1761 ch->flags |= __cpu_to_le32(flags);
1762 }
1763
ath10k_wmi_wait_for_service_ready(struct ath10k * ar)1764 int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
1765 {
1766 unsigned long time_left;
1767
1768 time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
1769 WMI_SERVICE_READY_TIMEOUT_HZ);
1770 if (!time_left)
1771 return -ETIMEDOUT;
1772 return 0;
1773 }
1774
ath10k_wmi_wait_for_unified_ready(struct ath10k * ar)1775 int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
1776 {
1777 unsigned long time_left;
1778
1779 time_left = wait_for_completion_timeout(&ar->wmi.unified_ready,
1780 WMI_UNIFIED_READY_TIMEOUT_HZ);
1781 if (!time_left)
1782 return -ETIMEDOUT;
1783 return 0;
1784 }
1785
ath10k_wmi_alloc_skb(struct ath10k * ar,u32 len)1786 struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
1787 {
1788 struct sk_buff *skb;
1789 u32 round_len = roundup(len, 4);
1790
1791 skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
1792 if (!skb)
1793 return NULL;
1794
1795 skb_reserve(skb, WMI_SKB_HEADROOM);
1796 if (!IS_ALIGNED((unsigned long)skb->data, 4))
1797 ath10k_warn(ar, "Unaligned WMI skb\n");
1798
1799 skb_put(skb, round_len);
1800 memset(skb->data, 0, round_len);
1801
1802 return skb;
1803 }
1804
ath10k_wmi_htc_tx_complete(struct ath10k * ar,struct sk_buff * skb)1805 static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
1806 {
1807 dev_kfree_skb(skb);
1808 }
1809
ath10k_wmi_cmd_send_nowait(struct ath10k * ar,struct sk_buff * skb,u32 cmd_id)1810 int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
1811 u32 cmd_id)
1812 {
1813 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
1814 struct wmi_cmd_hdr *cmd_hdr;
1815 int ret;
1816 u32 cmd = 0;
1817
1818 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
1819 return -ENOMEM;
1820
1821 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
1822
1823 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
1824 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
1825
1826 memset(skb_cb, 0, sizeof(*skb_cb));
1827 trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len);
1828 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
1829
1830 if (ret)
1831 goto err_pull;
1832
1833 return 0;
1834
1835 err_pull:
1836 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
1837 return ret;
1838 }
1839
ath10k_wmi_tx_beacon_nowait(struct ath10k_vif * arvif)1840 static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
1841 {
1842 struct ath10k *ar = arvif->ar;
1843 struct ath10k_skb_cb *cb;
1844 struct sk_buff *bcn;
1845 bool dtim_zero;
1846 bool deliver_cab;
1847 int ret;
1848
1849 spin_lock_bh(&ar->data_lock);
1850
1851 bcn = arvif->beacon;
1852
1853 if (!bcn)
1854 goto unlock;
1855
1856 cb = ATH10K_SKB_CB(bcn);
1857
1858 switch (arvif->beacon_state) {
1859 case ATH10K_BEACON_SENDING:
1860 case ATH10K_BEACON_SENT:
1861 break;
1862 case ATH10K_BEACON_SCHEDULED:
1863 arvif->beacon_state = ATH10K_BEACON_SENDING;
1864 spin_unlock_bh(&ar->data_lock);
1865
1866 dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO);
1867 deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB);
1868 ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
1869 arvif->vdev_id,
1870 bcn->data, bcn->len,
1871 cb->paddr,
1872 dtim_zero,
1873 deliver_cab);
1874
1875 spin_lock_bh(&ar->data_lock);
1876
1877 if (ret == 0)
1878 arvif->beacon_state = ATH10K_BEACON_SENT;
1879 else
1880 arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
1881 }
1882
1883 unlock:
1884 spin_unlock_bh(&ar->data_lock);
1885 }
1886
ath10k_wmi_tx_beacons_iter(void * data,u8 * mac,struct ieee80211_vif * vif)1887 static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
1888 struct ieee80211_vif *vif)
1889 {
1890 struct ath10k_vif *arvif = (void *)vif->drv_priv;
1891
1892 ath10k_wmi_tx_beacon_nowait(arvif);
1893 }
1894
ath10k_wmi_tx_beacons_nowait(struct ath10k * ar)1895 static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
1896 {
1897 ieee80211_iterate_active_interfaces_atomic(ar->hw,
1898 ATH10K_ITER_NORMAL_FLAGS,
1899 ath10k_wmi_tx_beacons_iter,
1900 NULL);
1901 }
1902
ath10k_wmi_op_ep_tx_credits(struct ath10k * ar)1903 static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
1904 {
1905 /* try to send pending beacons first. they take priority */
1906 ath10k_wmi_tx_beacons_nowait(ar);
1907
1908 wake_up(&ar->wmi.tx_credits_wq);
1909 }
1910
ath10k_wmi_cmd_send(struct ath10k * ar,struct sk_buff * skb,u32 cmd_id)1911 int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
1912 {
1913 int ret = -EOPNOTSUPP;
1914
1915 might_sleep();
1916
1917 if (cmd_id == WMI_CMD_UNSUPPORTED) {
1918 ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
1919 cmd_id);
1920 return ret;
1921 }
1922
1923 wait_event_timeout(ar->wmi.tx_credits_wq, ({
1924 /* try to send pending beacons first. they take priority */
1925 ath10k_wmi_tx_beacons_nowait(ar);
1926
1927 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
1928
1929 if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
1930 ret = -ESHUTDOWN;
1931
1932 (ret != -EAGAIN);
1933 }), 3 * HZ);
1934
1935 if (ret)
1936 dev_kfree_skb_any(skb);
1937
1938 if (ret == -EAGAIN) {
1939 ath10k_warn(ar, "wmi command %d timeout, restarting hardware\n",
1940 cmd_id);
1941 ath10k_core_start_recovery(ar);
1942 }
1943
1944 return ret;
1945 }
1946
1947 static struct sk_buff *
ath10k_wmi_op_gen_mgmt_tx(struct ath10k * ar,struct sk_buff * msdu)1948 ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
1949 {
1950 struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu);
1951 struct ath10k_vif *arvif;
1952 struct wmi_mgmt_tx_cmd *cmd;
1953 struct ieee80211_hdr *hdr;
1954 struct sk_buff *skb;
1955 int len;
1956 u32 vdev_id;
1957 u32 buf_len = msdu->len;
1958 u16 fc;
1959 const u8 *peer_addr;
1960
1961 hdr = (struct ieee80211_hdr *)msdu->data;
1962 fc = le16_to_cpu(hdr->frame_control);
1963
1964 if (cb->vif) {
1965 arvif = (void *)cb->vif->drv_priv;
1966 vdev_id = arvif->vdev_id;
1967 } else {
1968 vdev_id = 0;
1969 }
1970
1971 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
1972 return ERR_PTR(-EINVAL);
1973
1974 len = sizeof(cmd->hdr) + msdu->len;
1975
1976 if ((ieee80211_is_action(hdr->frame_control) ||
1977 ieee80211_is_deauth(hdr->frame_control) ||
1978 ieee80211_is_disassoc(hdr->frame_control)) &&
1979 ieee80211_has_protected(hdr->frame_control)) {
1980 peer_addr = hdr->addr1;
1981 if (is_multicast_ether_addr(peer_addr)) {
1982 len += sizeof(struct ieee80211_mmie_16);
1983 buf_len += sizeof(struct ieee80211_mmie_16);
1984 } else {
1985 if (cb->ucast_cipher == WLAN_CIPHER_SUITE_GCMP ||
1986 cb->ucast_cipher == WLAN_CIPHER_SUITE_GCMP_256) {
1987 len += IEEE80211_GCMP_MIC_LEN;
1988 buf_len += IEEE80211_GCMP_MIC_LEN;
1989 } else {
1990 len += IEEE80211_CCMP_MIC_LEN;
1991 buf_len += IEEE80211_CCMP_MIC_LEN;
1992 }
1993 }
1994 }
1995
1996 len = round_up(len, 4);
1997
1998 skb = ath10k_wmi_alloc_skb(ar, len);
1999 if (!skb)
2000 return ERR_PTR(-ENOMEM);
2001
2002 cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
2003
2004 cmd->hdr.vdev_id = __cpu_to_le32(vdev_id);
2005 cmd->hdr.tx_rate = 0;
2006 cmd->hdr.tx_power = 0;
2007 cmd->hdr.buf_len = __cpu_to_le32(buf_len);
2008
2009 ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
2010 memcpy(cmd->buf, msdu->data, msdu->len);
2011
2012 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %pK len %d ftype %02x stype %02x\n",
2013 msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
2014 fc & IEEE80211_FCTL_STYPE);
2015 trace_ath10k_tx_hdr(ar, skb->data, skb->len);
2016 trace_ath10k_tx_payload(ar, skb->data, skb->len);
2017
2018 return skb;
2019 }
2020
ath10k_wmi_event_scan_started(struct ath10k * ar)2021 static void ath10k_wmi_event_scan_started(struct ath10k *ar)
2022 {
2023 lockdep_assert_held(&ar->data_lock);
2024
2025 switch (ar->scan.state) {
2026 case ATH10K_SCAN_IDLE:
2027 case ATH10K_SCAN_RUNNING:
2028 case ATH10K_SCAN_ABORTING:
2029 ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
2030 ath10k_scan_state_str(ar->scan.state),
2031 ar->scan.state);
2032 break;
2033 case ATH10K_SCAN_STARTING:
2034 ar->scan.state = ATH10K_SCAN_RUNNING;
2035
2036 if (ar->scan.is_roc)
2037 ieee80211_ready_on_channel(ar->hw);
2038
2039 complete(&ar->scan.started);
2040 break;
2041 }
2042 }
2043
ath10k_wmi_event_scan_start_failed(struct ath10k * ar)2044 static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
2045 {
2046 lockdep_assert_held(&ar->data_lock);
2047
2048 switch (ar->scan.state) {
2049 case ATH10K_SCAN_IDLE:
2050 case ATH10K_SCAN_RUNNING:
2051 case ATH10K_SCAN_ABORTING:
2052 ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
2053 ath10k_scan_state_str(ar->scan.state),
2054 ar->scan.state);
2055 break;
2056 case ATH10K_SCAN_STARTING:
2057 complete(&ar->scan.started);
2058 __ath10k_scan_finish(ar);
2059 break;
2060 }
2061 }
2062
ath10k_wmi_event_scan_completed(struct ath10k * ar)2063 static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
2064 {
2065 lockdep_assert_held(&ar->data_lock);
2066
2067 switch (ar->scan.state) {
2068 case ATH10K_SCAN_IDLE:
2069 case ATH10K_SCAN_STARTING:
2070 /* One suspected reason scan can be completed while starting is
2071 * if firmware fails to deliver all scan events to the host,
2072 * e.g. when transport pipe is full. This has been observed
2073 * with spectral scan phyerr events starving wmi transport
2074 * pipe. In such case the "scan completed" event should be (and
2075 * is) ignored by the host as it may be just firmware's scan
2076 * state machine recovering.
2077 */
2078 ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
2079 ath10k_scan_state_str(ar->scan.state),
2080 ar->scan.state);
2081 break;
2082 case ATH10K_SCAN_RUNNING:
2083 case ATH10K_SCAN_ABORTING:
2084 __ath10k_scan_finish(ar);
2085 break;
2086 }
2087 }
2088
ath10k_wmi_event_scan_bss_chan(struct ath10k * ar)2089 static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
2090 {
2091 lockdep_assert_held(&ar->data_lock);
2092
2093 switch (ar->scan.state) {
2094 case ATH10K_SCAN_IDLE:
2095 case ATH10K_SCAN_STARTING:
2096 ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
2097 ath10k_scan_state_str(ar->scan.state),
2098 ar->scan.state);
2099 break;
2100 case ATH10K_SCAN_RUNNING:
2101 case ATH10K_SCAN_ABORTING:
2102 ar->scan_channel = NULL;
2103 break;
2104 }
2105 }
2106
ath10k_wmi_event_scan_foreign_chan(struct ath10k * ar,u32 freq)2107 static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
2108 {
2109 lockdep_assert_held(&ar->data_lock);
2110
2111 switch (ar->scan.state) {
2112 case ATH10K_SCAN_IDLE:
2113 case ATH10K_SCAN_STARTING:
2114 ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
2115 ath10k_scan_state_str(ar->scan.state),
2116 ar->scan.state);
2117 break;
2118 case ATH10K_SCAN_RUNNING:
2119 case ATH10K_SCAN_ABORTING:
2120 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
2121
2122 if (ar->scan.is_roc && ar->scan.roc_freq == freq)
2123 complete(&ar->scan.on_channel);
2124 break;
2125 }
2126 }
2127
2128 static const char *
ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,enum wmi_scan_completion_reason reason)2129 ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
2130 enum wmi_scan_completion_reason reason)
2131 {
2132 switch (type) {
2133 case WMI_SCAN_EVENT_STARTED:
2134 return "started";
2135 case WMI_SCAN_EVENT_COMPLETED:
2136 switch (reason) {
2137 case WMI_SCAN_REASON_COMPLETED:
2138 return "completed";
2139 case WMI_SCAN_REASON_CANCELLED:
2140 return "completed [cancelled]";
2141 case WMI_SCAN_REASON_PREEMPTED:
2142 return "completed [preempted]";
2143 case WMI_SCAN_REASON_TIMEDOUT:
2144 return "completed [timedout]";
2145 case WMI_SCAN_REASON_INTERNAL_FAILURE:
2146 return "completed [internal err]";
2147 case WMI_SCAN_REASON_MAX:
2148 break;
2149 }
2150 return "completed [unknown]";
2151 case WMI_SCAN_EVENT_BSS_CHANNEL:
2152 return "bss channel";
2153 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
2154 return "foreign channel";
2155 case WMI_SCAN_EVENT_DEQUEUED:
2156 return "dequeued";
2157 case WMI_SCAN_EVENT_PREEMPTED:
2158 return "preempted";
2159 case WMI_SCAN_EVENT_START_FAILED:
2160 return "start failed";
2161 case WMI_SCAN_EVENT_RESTARTED:
2162 return "restarted";
2163 case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
2164 return "foreign channel exit";
2165 default:
2166 return "unknown";
2167 }
2168 }
2169
ath10k_wmi_op_pull_scan_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_scan_ev_arg * arg)2170 static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
2171 struct wmi_scan_ev_arg *arg)
2172 {
2173 struct wmi_scan_event *ev = (void *)skb->data;
2174
2175 if (skb->len < sizeof(*ev))
2176 return -EPROTO;
2177
2178 skb_pull(skb, sizeof(*ev));
2179 arg->event_type = ev->event_type;
2180 arg->reason = ev->reason;
2181 arg->channel_freq = ev->channel_freq;
2182 arg->scan_req_id = ev->scan_req_id;
2183 arg->scan_id = ev->scan_id;
2184 arg->vdev_id = ev->vdev_id;
2185
2186 return 0;
2187 }
2188
ath10k_wmi_event_scan(struct ath10k * ar,struct sk_buff * skb)2189 int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
2190 {
2191 struct wmi_scan_ev_arg arg = {};
2192 enum wmi_scan_event_type event_type;
2193 enum wmi_scan_completion_reason reason;
2194 u32 freq;
2195 u32 req_id;
2196 u32 scan_id;
2197 u32 vdev_id;
2198 int ret;
2199
2200 ret = ath10k_wmi_pull_scan(ar, skb, &arg);
2201 if (ret) {
2202 ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
2203 return ret;
2204 }
2205
2206 event_type = __le32_to_cpu(arg.event_type);
2207 reason = __le32_to_cpu(arg.reason);
2208 freq = __le32_to_cpu(arg.channel_freq);
2209 req_id = __le32_to_cpu(arg.scan_req_id);
2210 scan_id = __le32_to_cpu(arg.scan_id);
2211 vdev_id = __le32_to_cpu(arg.vdev_id);
2212
2213 spin_lock_bh(&ar->data_lock);
2214
2215 ath10k_dbg(ar, ATH10K_DBG_WMI,
2216 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
2217 ath10k_wmi_event_scan_type_str(event_type, reason),
2218 event_type, reason, freq, req_id, scan_id, vdev_id,
2219 ath10k_scan_state_str(ar->scan.state), ar->scan.state);
2220
2221 switch (event_type) {
2222 case WMI_SCAN_EVENT_STARTED:
2223 ath10k_wmi_event_scan_started(ar);
2224 break;
2225 case WMI_SCAN_EVENT_COMPLETED:
2226 ath10k_wmi_event_scan_completed(ar);
2227 break;
2228 case WMI_SCAN_EVENT_BSS_CHANNEL:
2229 ath10k_wmi_event_scan_bss_chan(ar);
2230 break;
2231 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
2232 ath10k_wmi_event_scan_foreign_chan(ar, freq);
2233 break;
2234 case WMI_SCAN_EVENT_START_FAILED:
2235 ath10k_warn(ar, "received scan start failure event\n");
2236 ath10k_wmi_event_scan_start_failed(ar);
2237 break;
2238 case WMI_SCAN_EVENT_DEQUEUED:
2239 case WMI_SCAN_EVENT_PREEMPTED:
2240 case WMI_SCAN_EVENT_RESTARTED:
2241 case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
2242 default:
2243 break;
2244 }
2245
2246 spin_unlock_bh(&ar->data_lock);
2247 return 0;
2248 }
2249
2250 /* If keys are configured, HW decrypts all frames
2251 * with protected bit set. Mark such frames as decrypted.
2252 */
ath10k_wmi_handle_wep_reauth(struct ath10k * ar,struct sk_buff * skb,struct ieee80211_rx_status * status)2253 static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
2254 struct sk_buff *skb,
2255 struct ieee80211_rx_status *status)
2256 {
2257 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2258 unsigned int hdrlen;
2259 bool peer_key;
2260 u8 *addr, keyidx;
2261
2262 if (!ieee80211_is_auth(hdr->frame_control) ||
2263 !ieee80211_has_protected(hdr->frame_control))
2264 return;
2265
2266 hdrlen = ieee80211_hdrlen(hdr->frame_control);
2267 if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
2268 return;
2269
2270 keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
2271 addr = ieee80211_get_SA(hdr);
2272
2273 spin_lock_bh(&ar->data_lock);
2274 peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
2275 spin_unlock_bh(&ar->data_lock);
2276
2277 if (peer_key) {
2278 ath10k_dbg(ar, ATH10K_DBG_MAC,
2279 "mac wep key present for peer %pM\n", addr);
2280 status->flag |= RX_FLAG_DECRYPTED;
2281 }
2282 }
2283
ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_mgmt_rx_ev_arg * arg)2284 static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
2285 struct wmi_mgmt_rx_ev_arg *arg)
2286 {
2287 struct wmi_mgmt_rx_event_v1 *ev_v1;
2288 struct wmi_mgmt_rx_event_v2 *ev_v2;
2289 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
2290 struct wmi_mgmt_rx_ext_info *ext_info;
2291 size_t pull_len;
2292 u32 msdu_len;
2293 u32 len;
2294
2295 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX,
2296 ar->running_fw->fw_file.fw_features)) {
2297 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
2298 ev_hdr = &ev_v2->hdr.v1;
2299 pull_len = sizeof(*ev_v2);
2300 } else {
2301 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
2302 ev_hdr = &ev_v1->hdr;
2303 pull_len = sizeof(*ev_v1);
2304 }
2305
2306 if (skb->len < pull_len)
2307 return -EPROTO;
2308
2309 skb_pull(skb, pull_len);
2310 arg->channel = ev_hdr->channel;
2311 arg->buf_len = ev_hdr->buf_len;
2312 arg->status = ev_hdr->status;
2313 arg->snr = ev_hdr->snr;
2314 arg->phy_mode = ev_hdr->phy_mode;
2315 arg->rate = ev_hdr->rate;
2316
2317 msdu_len = __le32_to_cpu(arg->buf_len);
2318 if (skb->len < msdu_len)
2319 return -EPROTO;
2320
2321 if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
2322 len = ALIGN(le32_to_cpu(arg->buf_len), 4);
2323 ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
2324 memcpy(&arg->ext_info, ext_info,
2325 sizeof(struct wmi_mgmt_rx_ext_info));
2326 }
2327 /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
2328 * trailer with credit update. Trim the excess garbage.
2329 */
2330 skb_trim(skb, msdu_len);
2331
2332 return 0;
2333 }
2334
ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_mgmt_rx_ev_arg * arg)2335 static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar,
2336 struct sk_buff *skb,
2337 struct wmi_mgmt_rx_ev_arg *arg)
2338 {
2339 struct wmi_10_4_mgmt_rx_event *ev;
2340 struct wmi_10_4_mgmt_rx_hdr *ev_hdr;
2341 size_t pull_len;
2342 u32 msdu_len;
2343 struct wmi_mgmt_rx_ext_info *ext_info;
2344 u32 len;
2345
2346 ev = (struct wmi_10_4_mgmt_rx_event *)skb->data;
2347 ev_hdr = &ev->hdr;
2348 pull_len = sizeof(*ev);
2349
2350 if (skb->len < pull_len)
2351 return -EPROTO;
2352
2353 skb_pull(skb, pull_len);
2354 arg->channel = ev_hdr->channel;
2355 arg->buf_len = ev_hdr->buf_len;
2356 arg->status = ev_hdr->status;
2357 arg->snr = ev_hdr->snr;
2358 arg->phy_mode = ev_hdr->phy_mode;
2359 arg->rate = ev_hdr->rate;
2360
2361 msdu_len = __le32_to_cpu(arg->buf_len);
2362 if (skb->len < msdu_len)
2363 return -EPROTO;
2364
2365 if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
2366 len = ALIGN(le32_to_cpu(arg->buf_len), 4);
2367 ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
2368 memcpy(&arg->ext_info, ext_info,
2369 sizeof(struct wmi_mgmt_rx_ext_info));
2370 }
2371
2372 /* Make sure bytes added for padding are removed. */
2373 skb_trim(skb, msdu_len);
2374
2375 return 0;
2376 }
2377
ath10k_wmi_rx_is_decrypted(struct ath10k * ar,struct ieee80211_hdr * hdr)2378 static bool ath10k_wmi_rx_is_decrypted(struct ath10k *ar,
2379 struct ieee80211_hdr *hdr)
2380 {
2381 if (!ieee80211_has_protected(hdr->frame_control))
2382 return false;
2383
2384 /* FW delivers WEP Shared Auth frame with Protected Bit set and
2385 * encrypted payload. However in case of PMF it delivers decrypted
2386 * frames with Protected Bit set.
2387 */
2388 if (ieee80211_is_auth(hdr->frame_control))
2389 return false;
2390
2391 /* qca99x0 based FW delivers broadcast or multicast management frames
2392 * (ex: group privacy action frames in mesh) as encrypted payload.
2393 */
2394 if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) &&
2395 ar->hw_params.sw_decrypt_mcast_mgmt)
2396 return false;
2397
2398 return true;
2399 }
2400
2401 static int
wmi_process_mgmt_tx_comp(struct ath10k * ar,struct mgmt_tx_compl_params * param)2402 wmi_process_mgmt_tx_comp(struct ath10k *ar, struct mgmt_tx_compl_params *param)
2403 {
2404 struct ath10k_mgmt_tx_pkt_addr *pkt_addr;
2405 struct ath10k_wmi *wmi = &ar->wmi;
2406 struct ieee80211_tx_info *info;
2407 struct sk_buff *msdu;
2408 int ret;
2409
2410 spin_lock_bh(&ar->data_lock);
2411
2412 pkt_addr = idr_find(&wmi->mgmt_pending_tx, param->desc_id);
2413 if (!pkt_addr) {
2414 ath10k_warn(ar, "received mgmt tx completion for invalid msdu_id: %d\n",
2415 param->desc_id);
2416 ret = -ENOENT;
2417 goto out;
2418 }
2419
2420 msdu = pkt_addr->vaddr;
2421 dma_unmap_single(ar->dev, pkt_addr->paddr,
2422 msdu->len, DMA_TO_DEVICE);
2423 info = IEEE80211_SKB_CB(msdu);
2424
2425 if (param->status) {
2426 info->flags &= ~IEEE80211_TX_STAT_ACK;
2427 } else {
2428 info->flags |= IEEE80211_TX_STAT_ACK;
2429 info->status.ack_signal = ATH10K_DEFAULT_NOISE_FLOOR +
2430 param->ack_rssi;
2431 info->status.flags |= IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;
2432 }
2433
2434 ieee80211_tx_status_irqsafe(ar->hw, msdu);
2435
2436 ret = 0;
2437
2438 out:
2439 idr_remove(&wmi->mgmt_pending_tx, param->desc_id);
2440 spin_unlock_bh(&ar->data_lock);
2441 return ret;
2442 }
2443
ath10k_wmi_event_mgmt_tx_compl(struct ath10k * ar,struct sk_buff * skb)2444 int ath10k_wmi_event_mgmt_tx_compl(struct ath10k *ar, struct sk_buff *skb)
2445 {
2446 struct wmi_tlv_mgmt_tx_compl_ev_arg arg;
2447 struct mgmt_tx_compl_params param;
2448 int ret;
2449
2450 ret = ath10k_wmi_pull_mgmt_tx_compl(ar, skb, &arg);
2451 if (ret) {
2452 ath10k_warn(ar, "failed to parse mgmt comp event: %d\n", ret);
2453 return ret;
2454 }
2455
2456 memset(¶m, 0, sizeof(struct mgmt_tx_compl_params));
2457 param.desc_id = __le32_to_cpu(arg.desc_id);
2458 param.status = __le32_to_cpu(arg.status);
2459
2460 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, ar->wmi.svc_map))
2461 param.ack_rssi = __le32_to_cpu(arg.ack_rssi);
2462
2463 wmi_process_mgmt_tx_comp(ar, ¶m);
2464
2465 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi tlv evnt mgmt tx completion\n");
2466
2467 return 0;
2468 }
2469
ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k * ar,struct sk_buff * skb)2470 int ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k *ar, struct sk_buff *skb)
2471 {
2472 struct wmi_tlv_mgmt_tx_bundle_compl_ev_arg arg;
2473 struct mgmt_tx_compl_params param;
2474 u32 num_reports;
2475 int i, ret;
2476
2477 ret = ath10k_wmi_pull_mgmt_tx_bundle_compl(ar, skb, &arg);
2478 if (ret) {
2479 ath10k_warn(ar, "failed to parse bundle mgmt compl event: %d\n", ret);
2480 return ret;
2481 }
2482
2483 num_reports = __le32_to_cpu(arg.num_reports);
2484
2485 for (i = 0; i < num_reports; i++) {
2486 memset(¶m, 0, sizeof(struct mgmt_tx_compl_params));
2487 param.desc_id = __le32_to_cpu(arg.desc_ids[i]);
2488 param.status = __le32_to_cpu(arg.desc_ids[i]);
2489
2490 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, ar->wmi.svc_map))
2491 param.ack_rssi = __le32_to_cpu(arg.ack_rssi[i]);
2492 wmi_process_mgmt_tx_comp(ar, ¶m);
2493 }
2494
2495 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi tlv event bundle mgmt tx completion\n");
2496
2497 return 0;
2498 }
2499
ath10k_wmi_event_mgmt_rx(struct ath10k * ar,struct sk_buff * skb)2500 int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
2501 {
2502 struct wmi_mgmt_rx_ev_arg arg = {};
2503 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
2504 struct ieee80211_hdr *hdr;
2505 struct ieee80211_supported_band *sband;
2506 u32 rx_status;
2507 u32 channel;
2508 u32 phy_mode;
2509 u32 snr, rssi;
2510 u32 rate;
2511 u16 fc;
2512 int ret, i;
2513
2514 ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
2515 if (ret) {
2516 ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
2517 dev_kfree_skb(skb);
2518 return ret;
2519 }
2520
2521 channel = __le32_to_cpu(arg.channel);
2522 rx_status = __le32_to_cpu(arg.status);
2523 snr = __le32_to_cpu(arg.snr);
2524 phy_mode = __le32_to_cpu(arg.phy_mode);
2525 rate = __le32_to_cpu(arg.rate);
2526
2527 memset(status, 0, sizeof(*status));
2528
2529 ath10k_dbg(ar, ATH10K_DBG_MGMT,
2530 "event mgmt rx status %08x\n", rx_status);
2531
2532 if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) ||
2533 (rx_status & (WMI_RX_STATUS_ERR_DECRYPT |
2534 WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) {
2535 dev_kfree_skb(skb);
2536 return 0;
2537 }
2538
2539 if (rx_status & WMI_RX_STATUS_ERR_MIC)
2540 status->flag |= RX_FLAG_MMIC_ERROR;
2541
2542 if (rx_status & WMI_RX_STATUS_EXT_INFO) {
2543 status->mactime =
2544 __le64_to_cpu(arg.ext_info.rx_mac_timestamp);
2545 status->flag |= RX_FLAG_MACTIME_END;
2546 }
2547 /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
2548 * MODE_11B. This means phy_mode is not a reliable source for the band
2549 * of mgmt rx.
2550 */
2551 if (channel >= 1 && channel <= 14) {
2552 status->band = NL80211_BAND_2GHZ;
2553 } else if (channel >= 36 && channel <= ATH10K_MAX_5G_CHAN) {
2554 status->band = NL80211_BAND_5GHZ;
2555 } else {
2556 /* Shouldn't happen unless list of advertised channels to
2557 * mac80211 has been changed.
2558 */
2559 WARN_ON_ONCE(1);
2560 dev_kfree_skb(skb);
2561 return 0;
2562 }
2563
2564 if (phy_mode == MODE_11B && status->band == NL80211_BAND_5GHZ)
2565 ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
2566
2567 sband = &ar->mac.sbands[status->band];
2568
2569 status->freq = ieee80211_channel_to_frequency(channel, status->band);
2570 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
2571
2572 BUILD_BUG_ON(ARRAY_SIZE(status->chain_signal) != ARRAY_SIZE(arg.rssi));
2573
2574 for (i = 0; i < ARRAY_SIZE(status->chain_signal); i++) {
2575 status->chains &= ~BIT(i);
2576 rssi = __le32_to_cpu(arg.rssi[i]);
2577 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt rssi[%d]:%d\n", i, arg.rssi[i]);
2578
2579 if (rssi != ATH10K_INVALID_RSSI && rssi != 0) {
2580 status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR + rssi;
2581 status->chains |= BIT(i);
2582 }
2583 }
2584
2585 status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100);
2586
2587 hdr = (struct ieee80211_hdr *)skb->data;
2588 fc = le16_to_cpu(hdr->frame_control);
2589
2590 /* Firmware is guaranteed to report all essential management frames via
2591 * WMI while it can deliver some extra via HTT. Since there can be
2592 * duplicates split the reporting wrt monitor/sniffing.
2593 */
2594 status->flag |= RX_FLAG_SKIP_MONITOR;
2595
2596 ath10k_wmi_handle_wep_reauth(ar, skb, status);
2597
2598 if (ath10k_wmi_rx_is_decrypted(ar, hdr)) {
2599 status->flag |= RX_FLAG_DECRYPTED;
2600
2601 if (!ieee80211_is_action(hdr->frame_control) &&
2602 !ieee80211_is_deauth(hdr->frame_control) &&
2603 !ieee80211_is_disassoc(hdr->frame_control)) {
2604 status->flag |= RX_FLAG_IV_STRIPPED |
2605 RX_FLAG_MMIC_STRIPPED;
2606 hdr->frame_control = __cpu_to_le16(fc &
2607 ~IEEE80211_FCTL_PROTECTED);
2608 }
2609 }
2610
2611 if (ieee80211_is_beacon(hdr->frame_control))
2612 ath10k_mac_handle_beacon(ar, skb);
2613
2614 if (ieee80211_is_beacon(hdr->frame_control) ||
2615 ieee80211_is_probe_resp(hdr->frame_control))
2616 status->boottime_ns = ktime_get_boottime_ns();
2617
2618 ath10k_dbg(ar, ATH10K_DBG_MGMT,
2619 "event mgmt rx skb %pK len %d ftype %02x stype %02x\n",
2620 skb, skb->len,
2621 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
2622
2623 ath10k_dbg(ar, ATH10K_DBG_MGMT,
2624 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
2625 status->freq, status->band, status->signal,
2626 status->rate_idx);
2627
2628 ieee80211_rx_ni(ar->hw, skb);
2629
2630 return 0;
2631 }
2632
freq_to_idx(struct ath10k * ar,int freq)2633 static int freq_to_idx(struct ath10k *ar, int freq)
2634 {
2635 struct ieee80211_supported_band *sband;
2636 int band, ch, idx = 0;
2637
2638 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
2639 sband = ar->hw->wiphy->bands[band];
2640 if (!sband)
2641 continue;
2642
2643 for (ch = 0; ch < sband->n_channels; ch++, idx++)
2644 if (sband->channels[ch].center_freq == freq)
2645 goto exit;
2646 }
2647
2648 exit:
2649 return idx;
2650 }
2651
ath10k_wmi_op_pull_ch_info_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_ch_info_ev_arg * arg)2652 static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
2653 struct wmi_ch_info_ev_arg *arg)
2654 {
2655 struct wmi_chan_info_event *ev = (void *)skb->data;
2656
2657 if (skb->len < sizeof(*ev))
2658 return -EPROTO;
2659
2660 skb_pull(skb, sizeof(*ev));
2661 arg->err_code = ev->err_code;
2662 arg->freq = ev->freq;
2663 arg->cmd_flags = ev->cmd_flags;
2664 arg->noise_floor = ev->noise_floor;
2665 arg->rx_clear_count = ev->rx_clear_count;
2666 arg->cycle_count = ev->cycle_count;
2667
2668 return 0;
2669 }
2670
ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_ch_info_ev_arg * arg)2671 static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar,
2672 struct sk_buff *skb,
2673 struct wmi_ch_info_ev_arg *arg)
2674 {
2675 struct wmi_10_4_chan_info_event *ev = (void *)skb->data;
2676
2677 if (skb->len < sizeof(*ev))
2678 return -EPROTO;
2679
2680 skb_pull(skb, sizeof(*ev));
2681 arg->err_code = ev->err_code;
2682 arg->freq = ev->freq;
2683 arg->cmd_flags = ev->cmd_flags;
2684 arg->noise_floor = ev->noise_floor;
2685 arg->rx_clear_count = ev->rx_clear_count;
2686 arg->cycle_count = ev->cycle_count;
2687 arg->chan_tx_pwr_range = ev->chan_tx_pwr_range;
2688 arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
2689 arg->rx_frame_count = ev->rx_frame_count;
2690
2691 return 0;
2692 }
2693
2694 /*
2695 * Handle the channel info event for firmware which only sends one
2696 * chan_info event per scanned channel.
2697 */
ath10k_wmi_event_chan_info_unpaired(struct ath10k * ar,struct chan_info_params * params)2698 static void ath10k_wmi_event_chan_info_unpaired(struct ath10k *ar,
2699 struct chan_info_params *params)
2700 {
2701 struct survey_info *survey;
2702 int idx;
2703
2704 if (params->cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
2705 ath10k_dbg(ar, ATH10K_DBG_WMI, "chan info report completed\n");
2706 return;
2707 }
2708
2709 idx = freq_to_idx(ar, params->freq);
2710 if (idx >= ARRAY_SIZE(ar->survey)) {
2711 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
2712 params->freq, idx);
2713 return;
2714 }
2715
2716 survey = &ar->survey[idx];
2717
2718 if (!params->mac_clk_mhz)
2719 return;
2720
2721 memset(survey, 0, sizeof(*survey));
2722
2723 survey->noise = params->noise_floor;
2724 survey->time = (params->cycle_count / params->mac_clk_mhz) / 1000;
2725 survey->time_busy = (params->rx_clear_count / params->mac_clk_mhz) / 1000;
2726 survey->filled |= SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME |
2727 SURVEY_INFO_TIME_BUSY;
2728 }
2729
2730 /*
2731 * Handle the channel info event for firmware which sends chan_info
2732 * event in pairs(start and stop events) for every scanned channel.
2733 */
ath10k_wmi_event_chan_info_paired(struct ath10k * ar,struct chan_info_params * params)2734 static void ath10k_wmi_event_chan_info_paired(struct ath10k *ar,
2735 struct chan_info_params *params)
2736 {
2737 struct survey_info *survey;
2738 int idx;
2739
2740 idx = freq_to_idx(ar, params->freq);
2741 if (idx >= ARRAY_SIZE(ar->survey)) {
2742 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
2743 params->freq, idx);
2744 return;
2745 }
2746
2747 if (params->cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
2748 if (ar->ch_info_can_report_survey) {
2749 survey = &ar->survey[idx];
2750 survey->noise = params->noise_floor;
2751 survey->filled = SURVEY_INFO_NOISE_DBM;
2752
2753 ath10k_hw_fill_survey_time(ar,
2754 survey,
2755 params->cycle_count,
2756 params->rx_clear_count,
2757 ar->survey_last_cycle_count,
2758 ar->survey_last_rx_clear_count);
2759 }
2760
2761 ar->ch_info_can_report_survey = false;
2762 } else {
2763 ar->ch_info_can_report_survey = true;
2764 }
2765
2766 if (!(params->cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
2767 ar->survey_last_rx_clear_count = params->rx_clear_count;
2768 ar->survey_last_cycle_count = params->cycle_count;
2769 }
2770 }
2771
ath10k_wmi_event_chan_info(struct ath10k * ar,struct sk_buff * skb)2772 void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
2773 {
2774 struct chan_info_params ch_info_param;
2775 struct wmi_ch_info_ev_arg arg = {};
2776 int ret;
2777
2778 ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
2779 if (ret) {
2780 ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
2781 return;
2782 }
2783
2784 ch_info_param.err_code = __le32_to_cpu(arg.err_code);
2785 ch_info_param.freq = __le32_to_cpu(arg.freq);
2786 ch_info_param.cmd_flags = __le32_to_cpu(arg.cmd_flags);
2787 ch_info_param.noise_floor = __le32_to_cpu(arg.noise_floor);
2788 ch_info_param.rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
2789 ch_info_param.cycle_count = __le32_to_cpu(arg.cycle_count);
2790 ch_info_param.mac_clk_mhz = __le32_to_cpu(arg.mac_clk_mhz);
2791
2792 ath10k_dbg(ar, ATH10K_DBG_WMI,
2793 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
2794 ch_info_param.err_code, ch_info_param.freq, ch_info_param.cmd_flags,
2795 ch_info_param.noise_floor, ch_info_param.rx_clear_count,
2796 ch_info_param.cycle_count);
2797
2798 spin_lock_bh(&ar->data_lock);
2799
2800 switch (ar->scan.state) {
2801 case ATH10K_SCAN_IDLE:
2802 case ATH10K_SCAN_STARTING:
2803 ath10k_dbg(ar, ATH10K_DBG_WMI, "received chan info event without a scan request, ignoring\n");
2804 goto exit;
2805 case ATH10K_SCAN_RUNNING:
2806 case ATH10K_SCAN_ABORTING:
2807 break;
2808 }
2809
2810 if (test_bit(ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL,
2811 ar->running_fw->fw_file.fw_features))
2812 ath10k_wmi_event_chan_info_unpaired(ar, &ch_info_param);
2813 else
2814 ath10k_wmi_event_chan_info_paired(ar, &ch_info_param);
2815
2816 exit:
2817 spin_unlock_bh(&ar->data_lock);
2818 }
2819
ath10k_wmi_event_echo(struct ath10k * ar,struct sk_buff * skb)2820 void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
2821 {
2822 struct wmi_echo_ev_arg arg = {};
2823 int ret;
2824
2825 ret = ath10k_wmi_pull_echo_ev(ar, skb, &arg);
2826 if (ret) {
2827 ath10k_warn(ar, "failed to parse echo: %d\n", ret);
2828 return;
2829 }
2830
2831 ath10k_dbg(ar, ATH10K_DBG_WMI,
2832 "wmi event echo value 0x%08x\n",
2833 le32_to_cpu(arg.value));
2834
2835 if (le32_to_cpu(arg.value) == ATH10K_WMI_BARRIER_ECHO_ID)
2836 complete(&ar->wmi.barrier);
2837 }
2838
ath10k_wmi_event_debug_mesg(struct ath10k * ar,struct sk_buff * skb)2839 int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
2840 {
2841 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
2842 skb->len);
2843
2844 trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
2845
2846 return 0;
2847 }
2848
ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base * src,struct ath10k_fw_stats_pdev * dst)2849 void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
2850 struct ath10k_fw_stats_pdev *dst)
2851 {
2852 dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
2853 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
2854 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
2855 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
2856 dst->cycle_count = __le32_to_cpu(src->cycle_count);
2857 dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
2858 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
2859 }
2860
ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx * src,struct ath10k_fw_stats_pdev * dst)2861 void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
2862 struct ath10k_fw_stats_pdev *dst)
2863 {
2864 dst->comp_queued = __le32_to_cpu(src->comp_queued);
2865 dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
2866 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
2867 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
2868 dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
2869 dst->local_enqued = __le32_to_cpu(src->local_enqued);
2870 dst->local_freed = __le32_to_cpu(src->local_freed);
2871 dst->hw_queued = __le32_to_cpu(src->hw_queued);
2872 dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
2873 dst->underrun = __le32_to_cpu(src->underrun);
2874 dst->tx_abort = __le32_to_cpu(src->tx_abort);
2875 dst->mpdus_requeued = __le32_to_cpu(src->mpdus_requeued);
2876 dst->tx_ko = __le32_to_cpu(src->tx_ko);
2877 dst->data_rc = __le32_to_cpu(src->data_rc);
2878 dst->self_triggers = __le32_to_cpu(src->self_triggers);
2879 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
2880 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
2881 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
2882 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
2883 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
2884 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
2885 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
2886 }
2887
2888 static void
ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx * src,struct ath10k_fw_stats_pdev * dst)2889 ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src,
2890 struct ath10k_fw_stats_pdev *dst)
2891 {
2892 dst->comp_queued = __le32_to_cpu(src->comp_queued);
2893 dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
2894 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
2895 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
2896 dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
2897 dst->local_enqued = __le32_to_cpu(src->local_enqued);
2898 dst->local_freed = __le32_to_cpu(src->local_freed);
2899 dst->hw_queued = __le32_to_cpu(src->hw_queued);
2900 dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
2901 dst->underrun = __le32_to_cpu(src->underrun);
2902 dst->tx_abort = __le32_to_cpu(src->tx_abort);
2903 dst->mpdus_requeued = __le32_to_cpu(src->mpdus_requeued);
2904 dst->tx_ko = __le32_to_cpu(src->tx_ko);
2905 dst->data_rc = __le32_to_cpu(src->data_rc);
2906 dst->self_triggers = __le32_to_cpu(src->self_triggers);
2907 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
2908 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
2909 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
2910 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
2911 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
2912 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
2913 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
2914 dst->hw_paused = __le32_to_cpu(src->hw_paused);
2915 dst->seq_posted = __le32_to_cpu(src->seq_posted);
2916 dst->seq_failed_queueing =
2917 __le32_to_cpu(src->seq_failed_queueing);
2918 dst->seq_completed = __le32_to_cpu(src->seq_completed);
2919 dst->seq_restarted = __le32_to_cpu(src->seq_restarted);
2920 dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted);
2921 dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush);
2922 dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
2923 dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated);
2924 dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed);
2925 dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
2926 dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired);
2927 }
2928
ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx * src,struct ath10k_fw_stats_pdev * dst)2929 void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
2930 struct ath10k_fw_stats_pdev *dst)
2931 {
2932 dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
2933 dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
2934 dst->r0_frags = __le32_to_cpu(src->r0_frags);
2935 dst->r1_frags = __le32_to_cpu(src->r1_frags);
2936 dst->r2_frags = __le32_to_cpu(src->r2_frags);
2937 dst->r3_frags = __le32_to_cpu(src->r3_frags);
2938 dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
2939 dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
2940 dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
2941 dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
2942 dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
2943 dst->phy_errs = __le32_to_cpu(src->phy_errs);
2944 dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
2945 dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
2946 }
2947
ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra * src,struct ath10k_fw_stats_pdev * dst)2948 void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
2949 struct ath10k_fw_stats_pdev *dst)
2950 {
2951 dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
2952 dst->rts_bad = __le32_to_cpu(src->rts_bad);
2953 dst->rts_good = __le32_to_cpu(src->rts_good);
2954 dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
2955 dst->no_beacons = __le32_to_cpu(src->no_beacons);
2956 dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
2957 }
2958
ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats * src,struct ath10k_fw_stats_peer * dst)2959 void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
2960 struct ath10k_fw_stats_peer *dst)
2961 {
2962 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
2963 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
2964 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
2965 }
2966
2967 static void
ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats * src,struct ath10k_fw_stats_peer * dst)2968 ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src,
2969 struct ath10k_fw_stats_peer *dst)
2970 {
2971 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
2972 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
2973 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
2974 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
2975 }
2976
2977 static void
ath10k_wmi_10_4_pull_vdev_stats(const struct wmi_vdev_stats_extd * src,struct ath10k_fw_stats_vdev_extd * dst)2978 ath10k_wmi_10_4_pull_vdev_stats(const struct wmi_vdev_stats_extd *src,
2979 struct ath10k_fw_stats_vdev_extd *dst)
2980 {
2981 dst->vdev_id = __le32_to_cpu(src->vdev_id);
2982 dst->ppdu_aggr_cnt = __le32_to_cpu(src->ppdu_aggr_cnt);
2983 dst->ppdu_noack = __le32_to_cpu(src->ppdu_noack);
2984 dst->mpdu_queued = __le32_to_cpu(src->mpdu_queued);
2985 dst->ppdu_nonaggr_cnt = __le32_to_cpu(src->ppdu_nonaggr_cnt);
2986 dst->mpdu_sw_requeued = __le32_to_cpu(src->mpdu_sw_requeued);
2987 dst->mpdu_suc_retry = __le32_to_cpu(src->mpdu_suc_retry);
2988 dst->mpdu_suc_multitry = __le32_to_cpu(src->mpdu_suc_multitry);
2989 dst->mpdu_fail_retry = __le32_to_cpu(src->mpdu_fail_retry);
2990 dst->tx_ftm_suc = __le32_to_cpu(src->tx_ftm_suc);
2991 dst->tx_ftm_suc_retry = __le32_to_cpu(src->tx_ftm_suc_retry);
2992 dst->tx_ftm_fail = __le32_to_cpu(src->tx_ftm_fail);
2993 dst->rx_ftmr_cnt = __le32_to_cpu(src->rx_ftmr_cnt);
2994 dst->rx_ftmr_dup_cnt = __le32_to_cpu(src->rx_ftmr_dup_cnt);
2995 dst->rx_iftmr_cnt = __le32_to_cpu(src->rx_iftmr_cnt);
2996 dst->rx_iftmr_dup_cnt = __le32_to_cpu(src->rx_iftmr_dup_cnt);
2997 }
2998
ath10k_wmi_main_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)2999 static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
3000 struct sk_buff *skb,
3001 struct ath10k_fw_stats *stats)
3002 {
3003 const struct wmi_stats_event *ev = (void *)skb->data;
3004 u32 num_pdev_stats, num_peer_stats;
3005 int i;
3006
3007 if (!skb_pull(skb, sizeof(*ev)))
3008 return -EPROTO;
3009
3010 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3011 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3012
3013 for (i = 0; i < num_pdev_stats; i++) {
3014 const struct wmi_pdev_stats *src;
3015 struct ath10k_fw_stats_pdev *dst;
3016
3017 src = (void *)skb->data;
3018 if (!skb_pull(skb, sizeof(*src)))
3019 return -EPROTO;
3020
3021 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3022 if (!dst)
3023 continue;
3024
3025 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3026 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3027 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3028
3029 list_add_tail(&dst->list, &stats->pdevs);
3030 }
3031
3032 /* fw doesn't implement vdev stats */
3033
3034 for (i = 0; i < num_peer_stats; i++) {
3035 const struct wmi_peer_stats *src;
3036 struct ath10k_fw_stats_peer *dst;
3037
3038 src = (void *)skb->data;
3039 if (!skb_pull(skb, sizeof(*src)))
3040 return -EPROTO;
3041
3042 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3043 if (!dst)
3044 continue;
3045
3046 ath10k_wmi_pull_peer_stats(src, dst);
3047 list_add_tail(&dst->list, &stats->peers);
3048 }
3049
3050 return 0;
3051 }
3052
ath10k_wmi_10x_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3053 static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
3054 struct sk_buff *skb,
3055 struct ath10k_fw_stats *stats)
3056 {
3057 const struct wmi_stats_event *ev = (void *)skb->data;
3058 u32 num_pdev_stats, num_peer_stats;
3059 int i;
3060
3061 if (!skb_pull(skb, sizeof(*ev)))
3062 return -EPROTO;
3063
3064 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3065 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3066
3067 for (i = 0; i < num_pdev_stats; i++) {
3068 const struct wmi_10x_pdev_stats *src;
3069 struct ath10k_fw_stats_pdev *dst;
3070
3071 src = (void *)skb->data;
3072 if (!skb_pull(skb, sizeof(*src)))
3073 return -EPROTO;
3074
3075 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3076 if (!dst)
3077 continue;
3078
3079 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3080 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3081 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3082 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3083
3084 list_add_tail(&dst->list, &stats->pdevs);
3085 }
3086
3087 /* fw doesn't implement vdev stats */
3088
3089 for (i = 0; i < num_peer_stats; i++) {
3090 const struct wmi_10x_peer_stats *src;
3091 struct ath10k_fw_stats_peer *dst;
3092
3093 src = (void *)skb->data;
3094 if (!skb_pull(skb, sizeof(*src)))
3095 return -EPROTO;
3096
3097 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3098 if (!dst)
3099 continue;
3100
3101 ath10k_wmi_pull_peer_stats(&src->old, dst);
3102
3103 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
3104
3105 list_add_tail(&dst->list, &stats->peers);
3106 }
3107
3108 return 0;
3109 }
3110
ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3111 static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
3112 struct sk_buff *skb,
3113 struct ath10k_fw_stats *stats)
3114 {
3115 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
3116 u32 num_pdev_stats;
3117 u32 num_pdev_ext_stats;
3118 u32 num_peer_stats;
3119 int i;
3120
3121 if (!skb_pull(skb, sizeof(*ev)))
3122 return -EPROTO;
3123
3124 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3125 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
3126 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3127
3128 for (i = 0; i < num_pdev_stats; i++) {
3129 const struct wmi_10_2_pdev_stats *src;
3130 struct ath10k_fw_stats_pdev *dst;
3131
3132 src = (void *)skb->data;
3133 if (!skb_pull(skb, sizeof(*src)))
3134 return -EPROTO;
3135
3136 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3137 if (!dst)
3138 continue;
3139
3140 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3141 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3142 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3143 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3144 /* FIXME: expose 10.2 specific values */
3145
3146 list_add_tail(&dst->list, &stats->pdevs);
3147 }
3148
3149 for (i = 0; i < num_pdev_ext_stats; i++) {
3150 const struct wmi_10_2_pdev_ext_stats *src;
3151
3152 src = (void *)skb->data;
3153 if (!skb_pull(skb, sizeof(*src)))
3154 return -EPROTO;
3155
3156 /* FIXME: expose values to userspace
3157 *
3158 * Note: Even though this loop seems to do nothing it is
3159 * required to parse following sub-structures properly.
3160 */
3161 }
3162
3163 /* fw doesn't implement vdev stats */
3164
3165 for (i = 0; i < num_peer_stats; i++) {
3166 const struct wmi_10_2_peer_stats *src;
3167 struct ath10k_fw_stats_peer *dst;
3168
3169 src = (void *)skb->data;
3170 if (!skb_pull(skb, sizeof(*src)))
3171 return -EPROTO;
3172
3173 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3174 if (!dst)
3175 continue;
3176
3177 ath10k_wmi_pull_peer_stats(&src->old, dst);
3178
3179 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
3180 /* FIXME: expose 10.2 specific values */
3181
3182 list_add_tail(&dst->list, &stats->peers);
3183 }
3184
3185 return 0;
3186 }
3187
ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3188 static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
3189 struct sk_buff *skb,
3190 struct ath10k_fw_stats *stats)
3191 {
3192 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
3193 u32 num_pdev_stats;
3194 u32 num_pdev_ext_stats;
3195 u32 num_peer_stats;
3196 int i;
3197
3198 if (!skb_pull(skb, sizeof(*ev)))
3199 return -EPROTO;
3200
3201 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3202 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
3203 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3204
3205 for (i = 0; i < num_pdev_stats; i++) {
3206 const struct wmi_10_2_pdev_stats *src;
3207 struct ath10k_fw_stats_pdev *dst;
3208
3209 src = (void *)skb->data;
3210 if (!skb_pull(skb, sizeof(*src)))
3211 return -EPROTO;
3212
3213 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3214 if (!dst)
3215 continue;
3216
3217 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3218 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3219 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3220 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3221 /* FIXME: expose 10.2 specific values */
3222
3223 list_add_tail(&dst->list, &stats->pdevs);
3224 }
3225
3226 for (i = 0; i < num_pdev_ext_stats; i++) {
3227 const struct wmi_10_2_pdev_ext_stats *src;
3228
3229 src = (void *)skb->data;
3230 if (!skb_pull(skb, sizeof(*src)))
3231 return -EPROTO;
3232
3233 /* FIXME: expose values to userspace
3234 *
3235 * Note: Even though this loop seems to do nothing it is
3236 * required to parse following sub-structures properly.
3237 */
3238 }
3239
3240 /* fw doesn't implement vdev stats */
3241
3242 for (i = 0; i < num_peer_stats; i++) {
3243 const struct wmi_10_2_4_ext_peer_stats *src;
3244 struct ath10k_fw_stats_peer *dst;
3245 int stats_len;
3246
3247 if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
3248 stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats);
3249 else
3250 stats_len = sizeof(struct wmi_10_2_4_peer_stats);
3251
3252 src = (void *)skb->data;
3253 if (!skb_pull(skb, stats_len))
3254 return -EPROTO;
3255
3256 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3257 if (!dst)
3258 continue;
3259
3260 ath10k_wmi_pull_peer_stats(&src->common.old, dst);
3261
3262 dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
3263
3264 if (ath10k_peer_stats_enabled(ar))
3265 dst->rx_duration = __le32_to_cpu(src->rx_duration);
3266 /* FIXME: expose 10.2 specific values */
3267
3268 list_add_tail(&dst->list, &stats->peers);
3269 }
3270
3271 return 0;
3272 }
3273
ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3274 static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar,
3275 struct sk_buff *skb,
3276 struct ath10k_fw_stats *stats)
3277 {
3278 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
3279 u32 num_pdev_stats;
3280 u32 num_pdev_ext_stats;
3281 u32 num_vdev_stats;
3282 u32 num_peer_stats;
3283 u32 num_bcnflt_stats;
3284 u32 stats_id;
3285 int i;
3286
3287 if (!skb_pull(skb, sizeof(*ev)))
3288 return -EPROTO;
3289
3290 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3291 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
3292 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
3293 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3294 num_bcnflt_stats = __le32_to_cpu(ev->num_bcnflt_stats);
3295 stats_id = __le32_to_cpu(ev->stats_id);
3296
3297 for (i = 0; i < num_pdev_stats; i++) {
3298 const struct wmi_10_4_pdev_stats *src;
3299 struct ath10k_fw_stats_pdev *dst;
3300
3301 src = (void *)skb->data;
3302 if (!skb_pull(skb, sizeof(*src)))
3303 return -EPROTO;
3304
3305 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3306 if (!dst)
3307 continue;
3308
3309 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3310 ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst);
3311 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3312 dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs);
3313 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3314
3315 list_add_tail(&dst->list, &stats->pdevs);
3316 }
3317
3318 for (i = 0; i < num_pdev_ext_stats; i++) {
3319 const struct wmi_10_2_pdev_ext_stats *src;
3320
3321 src = (void *)skb->data;
3322 if (!skb_pull(skb, sizeof(*src)))
3323 return -EPROTO;
3324
3325 /* FIXME: expose values to userspace
3326 *
3327 * Note: Even though this loop seems to do nothing it is
3328 * required to parse following sub-structures properly.
3329 */
3330 }
3331
3332 for (i = 0; i < num_vdev_stats; i++) {
3333 const struct wmi_vdev_stats *src;
3334
3335 /* Ignore vdev stats here as it has only vdev id. Actual vdev
3336 * stats will be retrieved from vdev extended stats.
3337 */
3338 src = (void *)skb->data;
3339 if (!skb_pull(skb, sizeof(*src)))
3340 return -EPROTO;
3341 }
3342
3343 for (i = 0; i < num_peer_stats; i++) {
3344 const struct wmi_10_4_peer_stats *src;
3345 struct ath10k_fw_stats_peer *dst;
3346
3347 src = (void *)skb->data;
3348 if (!skb_pull(skb, sizeof(*src)))
3349 return -EPROTO;
3350
3351 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3352 if (!dst)
3353 continue;
3354
3355 ath10k_wmi_10_4_pull_peer_stats(src, dst);
3356 list_add_tail(&dst->list, &stats->peers);
3357 }
3358
3359 for (i = 0; i < num_bcnflt_stats; i++) {
3360 const struct wmi_10_4_bss_bcn_filter_stats *src;
3361
3362 src = (void *)skb->data;
3363 if (!skb_pull(skb, sizeof(*src)))
3364 return -EPROTO;
3365
3366 /* FIXME: expose values to userspace
3367 *
3368 * Note: Even though this loop seems to do nothing it is
3369 * required to parse following sub-structures properly.
3370 */
3371 }
3372
3373 if (stats_id & WMI_10_4_STAT_PEER_EXTD) {
3374 stats->extended = true;
3375
3376 for (i = 0; i < num_peer_stats; i++) {
3377 const struct wmi_10_4_peer_extd_stats *src;
3378 struct ath10k_fw_extd_stats_peer *dst;
3379
3380 src = (void *)skb->data;
3381 if (!skb_pull(skb, sizeof(*src)))
3382 return -EPROTO;
3383
3384 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3385 if (!dst)
3386 continue;
3387
3388 ether_addr_copy(dst->peer_macaddr,
3389 src->peer_macaddr.addr);
3390 dst->rx_duration = __le32_to_cpu(src->rx_duration);
3391 list_add_tail(&dst->list, &stats->peers_extd);
3392 }
3393 }
3394
3395 if (stats_id & WMI_10_4_STAT_VDEV_EXTD) {
3396 for (i = 0; i < num_vdev_stats; i++) {
3397 const struct wmi_vdev_stats_extd *src;
3398 struct ath10k_fw_stats_vdev_extd *dst;
3399
3400 src = (void *)skb->data;
3401 if (!skb_pull(skb, sizeof(*src)))
3402 return -EPROTO;
3403
3404 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3405 if (!dst)
3406 continue;
3407 ath10k_wmi_10_4_pull_vdev_stats(src, dst);
3408 list_add_tail(&dst->list, &stats->vdevs);
3409 }
3410 }
3411
3412 return 0;
3413 }
3414
ath10k_wmi_event_update_stats(struct ath10k * ar,struct sk_buff * skb)3415 void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
3416 {
3417 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
3418 ath10k_debug_fw_stats_process(ar, skb);
3419 }
3420
3421 static int
ath10k_wmi_op_pull_vdev_start_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_vdev_start_ev_arg * arg)3422 ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
3423 struct wmi_vdev_start_ev_arg *arg)
3424 {
3425 struct wmi_vdev_start_response_event *ev = (void *)skb->data;
3426
3427 if (skb->len < sizeof(*ev))
3428 return -EPROTO;
3429
3430 skb_pull(skb, sizeof(*ev));
3431 arg->vdev_id = ev->vdev_id;
3432 arg->req_id = ev->req_id;
3433 arg->resp_type = ev->resp_type;
3434 arg->status = ev->status;
3435
3436 return 0;
3437 }
3438
ath10k_wmi_event_vdev_start_resp(struct ath10k * ar,struct sk_buff * skb)3439 void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
3440 {
3441 struct wmi_vdev_start_ev_arg arg = {};
3442 int ret;
3443 u32 status;
3444
3445 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
3446
3447 ar->last_wmi_vdev_start_status = 0;
3448
3449 ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
3450 if (ret) {
3451 ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
3452 ar->last_wmi_vdev_start_status = ret;
3453 goto out;
3454 }
3455
3456 status = __le32_to_cpu(arg.status);
3457 if (WARN_ON_ONCE(status)) {
3458 ath10k_warn(ar, "vdev-start-response reports status error: %d (%s)\n",
3459 status, (status == WMI_VDEV_START_CHAN_INVALID) ?
3460 "chan-invalid" : "unknown");
3461 /* Setup is done one way or another though, so we should still
3462 * do the completion, so don't return here.
3463 */
3464 ar->last_wmi_vdev_start_status = -EINVAL;
3465 }
3466
3467 out:
3468 complete(&ar->vdev_setup_done);
3469 }
3470
ath10k_wmi_event_vdev_stopped(struct ath10k * ar,struct sk_buff * skb)3471 void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
3472 {
3473 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
3474 complete(&ar->vdev_setup_done);
3475 }
3476
3477 static int
ath10k_wmi_op_pull_peer_kick_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_peer_kick_ev_arg * arg)3478 ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
3479 struct wmi_peer_kick_ev_arg *arg)
3480 {
3481 struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
3482
3483 if (skb->len < sizeof(*ev))
3484 return -EPROTO;
3485
3486 skb_pull(skb, sizeof(*ev));
3487 arg->mac_addr = ev->peer_macaddr.addr;
3488
3489 return 0;
3490 }
3491
ath10k_wmi_event_peer_sta_kickout(struct ath10k * ar,struct sk_buff * skb)3492 void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
3493 {
3494 struct wmi_peer_kick_ev_arg arg = {};
3495 struct ieee80211_sta *sta;
3496 int ret;
3497
3498 ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
3499 if (ret) {
3500 ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
3501 ret);
3502 return;
3503 }
3504
3505 ath10k_dbg(ar, ATH10K_DBG_STA, "wmi event peer sta kickout %pM\n",
3506 arg.mac_addr);
3507
3508 rcu_read_lock();
3509
3510 sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
3511 if (!sta) {
3512 ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
3513 arg.mac_addr);
3514 goto exit;
3515 }
3516
3517 ieee80211_report_low_ack(sta, 10);
3518
3519 exit:
3520 rcu_read_unlock();
3521 }
3522
3523 /*
3524 * FIXME
3525 *
3526 * We don't report to mac80211 sleep state of connected
3527 * stations. Due to this mac80211 can't fill in TIM IE
3528 * correctly.
3529 *
3530 * I know of no way of getting nullfunc frames that contain
3531 * sleep transition from connected stations - these do not
3532 * seem to be sent from the target to the host. There also
3533 * doesn't seem to be a dedicated event for that. So the
3534 * only way left to do this would be to read tim_bitmap
3535 * during SWBA.
3536 *
3537 * We could probably try using tim_bitmap from SWBA to tell
3538 * mac80211 which stations are asleep and which are not. The
3539 * problem here is calling mac80211 functions so many times
3540 * could take too long and make us miss the time to submit
3541 * the beacon to the target.
3542 *
3543 * So as a workaround we try to extend the TIM IE if there
3544 * is unicast buffered for stations with aid > 7 and fill it
3545 * in ourselves.
3546 */
ath10k_wmi_update_tim(struct ath10k * ar,struct ath10k_vif * arvif,struct sk_buff * bcn,const struct wmi_tim_info_arg * tim_info)3547 static void ath10k_wmi_update_tim(struct ath10k *ar,
3548 struct ath10k_vif *arvif,
3549 struct sk_buff *bcn,
3550 const struct wmi_tim_info_arg *tim_info)
3551 {
3552 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
3553 struct ieee80211_tim_ie *tim;
3554 u8 *ies, *ie;
3555 u8 ie_len, pvm_len;
3556 __le32 t;
3557 u32 v, tim_len;
3558
3559 /* When FW reports 0 in tim_len, ensure at least first byte
3560 * in tim_bitmap is considered for pvm calculation.
3561 */
3562 tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1;
3563
3564 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
3565 * we must copy the bitmap upon change and reuse it later
3566 */
3567 if (__le32_to_cpu(tim_info->tim_changed)) {
3568 int i;
3569
3570 if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) {
3571 ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu",
3572 tim_len, sizeof(arvif->u.ap.tim_bitmap));
3573 tim_len = sizeof(arvif->u.ap.tim_bitmap);
3574 }
3575
3576 for (i = 0; i < tim_len; i++) {
3577 t = tim_info->tim_bitmap[i / 4];
3578 v = __le32_to_cpu(t);
3579 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
3580 }
3581
3582 /* FW reports either length 0 or length based on max supported
3583 * station. so we calculate this on our own
3584 */
3585 arvif->u.ap.tim_len = 0;
3586 for (i = 0; i < tim_len; i++)
3587 if (arvif->u.ap.tim_bitmap[i])
3588 arvif->u.ap.tim_len = i;
3589
3590 arvif->u.ap.tim_len++;
3591 }
3592
3593 ies = bcn->data;
3594 ies += ieee80211_hdrlen(hdr->frame_control);
3595 ies += 12; /* fixed parameters */
3596
3597 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
3598 (u8 *)skb_tail_pointer(bcn) - ies);
3599 if (!ie) {
3600 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
3601 ath10k_warn(ar, "no tim ie found;\n");
3602 return;
3603 }
3604
3605 tim = (void *)ie + 2;
3606 ie_len = ie[1];
3607 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
3608
3609 if (pvm_len < arvif->u.ap.tim_len) {
3610 int expand_size = tim_len - pvm_len;
3611 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
3612 void *next_ie = ie + 2 + ie_len;
3613
3614 if (skb_put(bcn, expand_size)) {
3615 memmove(next_ie + expand_size, next_ie, move_size);
3616
3617 ie[1] += expand_size;
3618 ie_len += expand_size;
3619 pvm_len += expand_size;
3620 } else {
3621 ath10k_warn(ar, "tim expansion failed\n");
3622 }
3623 }
3624
3625 if (pvm_len > tim_len) {
3626 ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
3627 return;
3628 }
3629
3630 tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
3631 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
3632
3633 if (tim->dtim_count == 0) {
3634 ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO;
3635
3636 if (__le32_to_cpu(tim_info->tim_mcast) == 1)
3637 ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB;
3638 }
3639
3640 ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
3641 tim->dtim_count, tim->dtim_period,
3642 tim->bitmap_ctrl, pvm_len);
3643 }
3644
ath10k_wmi_update_noa(struct ath10k * ar,struct ath10k_vif * arvif,struct sk_buff * bcn,const struct wmi_p2p_noa_info * noa)3645 static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
3646 struct sk_buff *bcn,
3647 const struct wmi_p2p_noa_info *noa)
3648 {
3649 if (!arvif->vif->p2p)
3650 return;
3651
3652 ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
3653
3654 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
3655 ath10k_p2p_noa_update(arvif, noa);
3656
3657 if (arvif->u.ap.noa_data)
3658 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
3659 skb_put_data(bcn, arvif->u.ap.noa_data,
3660 arvif->u.ap.noa_len);
3661 }
3662
ath10k_wmi_op_pull_swba_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_swba_ev_arg * arg)3663 static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
3664 struct wmi_swba_ev_arg *arg)
3665 {
3666 struct wmi_host_swba_event *ev = (void *)skb->data;
3667 u32 map;
3668 size_t i;
3669
3670 if (skb->len < sizeof(*ev))
3671 return -EPROTO;
3672
3673 skb_pull(skb, sizeof(*ev));
3674 arg->vdev_map = ev->vdev_map;
3675
3676 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3677 if (!(map & BIT(0)))
3678 continue;
3679
3680 /* If this happens there were some changes in firmware and
3681 * ath10k should update the max size of tim_info array.
3682 */
3683 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3684 break;
3685
3686 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3687 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3688 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3689 return -EPROTO;
3690 }
3691
3692 arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
3693 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3694 arg->tim_info[i].tim_bitmap =
3695 ev->bcn_info[i].tim_info.tim_bitmap;
3696 arg->tim_info[i].tim_changed =
3697 ev->bcn_info[i].tim_info.tim_changed;
3698 arg->tim_info[i].tim_num_ps_pending =
3699 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3700
3701 arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
3702 i++;
3703 }
3704
3705 return 0;
3706 }
3707
ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_swba_ev_arg * arg)3708 static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar,
3709 struct sk_buff *skb,
3710 struct wmi_swba_ev_arg *arg)
3711 {
3712 struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data;
3713 u32 map;
3714 size_t i;
3715
3716 if (skb->len < sizeof(*ev))
3717 return -EPROTO;
3718
3719 skb_pull(skb, sizeof(*ev));
3720 arg->vdev_map = ev->vdev_map;
3721
3722 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3723 if (!(map & BIT(0)))
3724 continue;
3725
3726 /* If this happens there were some changes in firmware and
3727 * ath10k should update the max size of tim_info array.
3728 */
3729 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3730 break;
3731
3732 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3733 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3734 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3735 return -EPROTO;
3736 }
3737
3738 arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
3739 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3740 arg->tim_info[i].tim_bitmap =
3741 ev->bcn_info[i].tim_info.tim_bitmap;
3742 arg->tim_info[i].tim_changed =
3743 ev->bcn_info[i].tim_info.tim_changed;
3744 arg->tim_info[i].tim_num_ps_pending =
3745 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3746 i++;
3747 }
3748
3749 return 0;
3750 }
3751
ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_swba_ev_arg * arg)3752 static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar,
3753 struct sk_buff *skb,
3754 struct wmi_swba_ev_arg *arg)
3755 {
3756 struct wmi_10_4_host_swba_event *ev = (void *)skb->data;
3757 u32 map, tim_len;
3758 size_t i;
3759
3760 if (skb->len < sizeof(*ev))
3761 return -EPROTO;
3762
3763 skb_pull(skb, sizeof(*ev));
3764 arg->vdev_map = ev->vdev_map;
3765
3766 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3767 if (!(map & BIT(0)))
3768 continue;
3769
3770 /* If this happens there were some changes in firmware and
3771 * ath10k should update the max size of tim_info array.
3772 */
3773 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3774 break;
3775
3776 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3777 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3778 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3779 return -EPROTO;
3780 }
3781
3782 tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len);
3783 if (tim_len) {
3784 /* Exclude 4 byte guard length */
3785 tim_len -= 4;
3786 arg->tim_info[i].tim_len = __cpu_to_le32(tim_len);
3787 } else {
3788 arg->tim_info[i].tim_len = 0;
3789 }
3790
3791 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3792 arg->tim_info[i].tim_bitmap =
3793 ev->bcn_info[i].tim_info.tim_bitmap;
3794 arg->tim_info[i].tim_changed =
3795 ev->bcn_info[i].tim_info.tim_changed;
3796 arg->tim_info[i].tim_num_ps_pending =
3797 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3798
3799 /* 10.4 firmware doesn't have p2p support. notice of absence
3800 * info can be ignored for now.
3801 */
3802
3803 i++;
3804 }
3805
3806 return 0;
3807 }
3808
ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k * ar)3809 static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar)
3810 {
3811 return WMI_TXBF_CONF_BEFORE_ASSOC;
3812 }
3813
ath10k_wmi_event_host_swba(struct ath10k * ar,struct sk_buff * skb)3814 void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
3815 {
3816 struct wmi_swba_ev_arg arg = {};
3817 u32 map;
3818 int i = -1;
3819 const struct wmi_tim_info_arg *tim_info;
3820 const struct wmi_p2p_noa_info *noa_info;
3821 struct ath10k_vif *arvif;
3822 struct sk_buff *bcn;
3823 dma_addr_t paddr;
3824 int ret, vdev_id = 0;
3825
3826 ret = ath10k_wmi_pull_swba(ar, skb, &arg);
3827 if (ret) {
3828 ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
3829 return;
3830 }
3831
3832 map = __le32_to_cpu(arg.vdev_map);
3833
3834 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
3835 map);
3836
3837 for (; map; map >>= 1, vdev_id++) {
3838 if (!(map & 0x1))
3839 continue;
3840
3841 i++;
3842
3843 if (i >= WMI_MAX_AP_VDEV) {
3844 ath10k_warn(ar, "swba has corrupted vdev map\n");
3845 break;
3846 }
3847
3848 tim_info = &arg.tim_info[i];
3849 noa_info = arg.noa_info[i];
3850
3851 ath10k_dbg(ar, ATH10K_DBG_MGMT,
3852 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
3853 i,
3854 __le32_to_cpu(tim_info->tim_len),
3855 __le32_to_cpu(tim_info->tim_mcast),
3856 __le32_to_cpu(tim_info->tim_changed),
3857 __le32_to_cpu(tim_info->tim_num_ps_pending),
3858 __le32_to_cpu(tim_info->tim_bitmap[3]),
3859 __le32_to_cpu(tim_info->tim_bitmap[2]),
3860 __le32_to_cpu(tim_info->tim_bitmap[1]),
3861 __le32_to_cpu(tim_info->tim_bitmap[0]));
3862
3863 /* TODO: Only first 4 word from tim_bitmap is dumped.
3864 * Extend debug code to dump full tim_bitmap.
3865 */
3866
3867 arvif = ath10k_get_arvif(ar, vdev_id);
3868 if (arvif == NULL) {
3869 ath10k_warn(ar, "no vif for vdev_id %d found\n",
3870 vdev_id);
3871 continue;
3872 }
3873
3874 /* mac80211 would have already asked us to stop beaconing and
3875 * bring the vdev down, so continue in that case
3876 */
3877 if (!arvif->is_up)
3878 continue;
3879
3880 /* There are no completions for beacons so wait for next SWBA
3881 * before telling mac80211 to decrement CSA counter
3882 *
3883 * Once CSA counter is completed stop sending beacons until
3884 * actual channel switch is done
3885 */
3886 if (arvif->vif->bss_conf.csa_active &&
3887 ieee80211_beacon_cntdwn_is_complete(arvif->vif)) {
3888 ieee80211_csa_finish(arvif->vif);
3889 continue;
3890 }
3891
3892 bcn = ieee80211_beacon_get(ar->hw, arvif->vif, 0);
3893 if (!bcn) {
3894 ath10k_warn(ar, "could not get mac80211 beacon\n");
3895 continue;
3896 }
3897
3898 ath10k_tx_h_seq_no(arvif->vif, bcn);
3899 ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
3900 ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
3901
3902 spin_lock_bh(&ar->data_lock);
3903
3904 if (arvif->beacon) {
3905 switch (arvif->beacon_state) {
3906 case ATH10K_BEACON_SENT:
3907 break;
3908 case ATH10K_BEACON_SCHEDULED:
3909 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
3910 arvif->vdev_id);
3911 break;
3912 case ATH10K_BEACON_SENDING:
3913 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
3914 arvif->vdev_id);
3915 dev_kfree_skb(bcn);
3916 goto skip;
3917 }
3918
3919 ath10k_mac_vif_beacon_free(arvif);
3920 }
3921
3922 if (!arvif->beacon_buf) {
3923 paddr = dma_map_single(arvif->ar->dev, bcn->data,
3924 bcn->len, DMA_TO_DEVICE);
3925 ret = dma_mapping_error(arvif->ar->dev, paddr);
3926 if (ret) {
3927 ath10k_warn(ar, "failed to map beacon: %d\n",
3928 ret);
3929 dev_kfree_skb_any(bcn);
3930 goto skip;
3931 }
3932
3933 ATH10K_SKB_CB(bcn)->paddr = paddr;
3934 } else {
3935 if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
3936 ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
3937 bcn->len, IEEE80211_MAX_FRAME_LEN);
3938 skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
3939 }
3940 memcpy(arvif->beacon_buf, bcn->data, bcn->len);
3941 ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
3942 }
3943
3944 arvif->beacon = bcn;
3945 arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
3946
3947 trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
3948 trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
3949
3950 skip:
3951 spin_unlock_bh(&ar->data_lock);
3952 }
3953
3954 ath10k_wmi_tx_beacons_nowait(ar);
3955 }
3956
ath10k_wmi_event_tbttoffset_update(struct ath10k * ar,struct sk_buff * skb)3957 void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
3958 {
3959 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
3960 }
3961
ath10k_radar_detected(struct ath10k * ar)3962 static void ath10k_radar_detected(struct ath10k *ar)
3963 {
3964 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
3965 ATH10K_DFS_STAT_INC(ar, radar_detected);
3966
3967 /* Control radar events reporting in debugfs file
3968 * dfs_block_radar_events
3969 */
3970 if (ar->dfs_block_radar_events)
3971 ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
3972 else
3973 ieee80211_radar_detected(ar->hw);
3974 }
3975
ath10k_radar_confirmation_work(struct work_struct * work)3976 static void ath10k_radar_confirmation_work(struct work_struct *work)
3977 {
3978 struct ath10k *ar = container_of(work, struct ath10k,
3979 radar_confirmation_work);
3980 struct ath10k_radar_found_info radar_info;
3981 int ret, time_left;
3982
3983 reinit_completion(&ar->wmi.radar_confirm);
3984
3985 spin_lock_bh(&ar->data_lock);
3986 memcpy(&radar_info, &ar->last_radar_info, sizeof(radar_info));
3987 spin_unlock_bh(&ar->data_lock);
3988
3989 ret = ath10k_wmi_report_radar_found(ar, &radar_info);
3990 if (ret) {
3991 ath10k_warn(ar, "failed to send radar found %d\n", ret);
3992 goto wait_complete;
3993 }
3994
3995 time_left = wait_for_completion_timeout(&ar->wmi.radar_confirm,
3996 ATH10K_WMI_DFS_CONF_TIMEOUT_HZ);
3997 if (time_left) {
3998 /* DFS Confirmation status event received and
3999 * necessary action completed.
4000 */
4001 goto wait_complete;
4002 } else {
4003 /* DFS Confirmation event not received from FW.Considering this
4004 * as real radar.
4005 */
4006 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4007 "dfs confirmation not received from fw, considering as radar\n");
4008 goto radar_detected;
4009 }
4010
4011 radar_detected:
4012 ath10k_radar_detected(ar);
4013
4014 /* Reset state to allow sending confirmation on consecutive radar
4015 * detections, unless radar confirmation is disabled/stopped.
4016 */
4017 wait_complete:
4018 spin_lock_bh(&ar->data_lock);
4019 if (ar->radar_conf_state != ATH10K_RADAR_CONFIRMATION_STOPPED)
4020 ar->radar_conf_state = ATH10K_RADAR_CONFIRMATION_IDLE;
4021 spin_unlock_bh(&ar->data_lock);
4022 }
4023
ath10k_dfs_radar_report(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,const struct phyerr_radar_report * rr,u64 tsf)4024 static void ath10k_dfs_radar_report(struct ath10k *ar,
4025 struct wmi_phyerr_ev_arg *phyerr,
4026 const struct phyerr_radar_report *rr,
4027 u64 tsf)
4028 {
4029 u32 reg0, reg1, tsf32l;
4030 struct ieee80211_channel *ch;
4031 struct pulse_event pe;
4032 struct radar_detector_specs rs;
4033 u64 tsf64;
4034 u8 rssi, width;
4035 struct ath10k_radar_found_info *radar_info;
4036
4037 reg0 = __le32_to_cpu(rr->reg0);
4038 reg1 = __le32_to_cpu(rr->reg1);
4039
4040 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4041 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
4042 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
4043 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
4044 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
4045 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
4046 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4047 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
4048 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
4049 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
4050 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
4051 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
4052 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
4053 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4054 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
4055 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
4056 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
4057
4058 if (!ar->dfs_detector)
4059 return;
4060
4061 spin_lock_bh(&ar->data_lock);
4062 ch = ar->rx_channel;
4063
4064 /* fetch target operating channel during channel change */
4065 if (!ch)
4066 ch = ar->tgt_oper_chan;
4067
4068 spin_unlock_bh(&ar->data_lock);
4069
4070 if (!ch) {
4071 ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n");
4072 goto radar_detected;
4073 }
4074
4075 /* report event to DFS pattern detector */
4076 tsf32l = phyerr->tsf_timestamp;
4077 tsf64 = tsf & (~0xFFFFFFFFULL);
4078 tsf64 |= tsf32l;
4079
4080 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
4081 rssi = phyerr->rssi_combined;
4082
4083 /* hardware store this as 8 bit signed value,
4084 * set to zero if negative number
4085 */
4086 if (rssi & 0x80)
4087 rssi = 0;
4088
4089 pe.ts = tsf64;
4090 pe.freq = ch->center_freq;
4091 pe.width = width;
4092 pe.rssi = rssi;
4093 pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
4094 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4095 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
4096 pe.freq, pe.width, pe.rssi, pe.ts);
4097
4098 ATH10K_DFS_STAT_INC(ar, pulses_detected);
4099
4100 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe, &rs)) {
4101 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4102 "dfs no pulse pattern detected, yet\n");
4103 return;
4104 }
4105
4106 if ((test_bit(WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, ar->wmi.svc_map)) &&
4107 ar->dfs_detector->region == NL80211_DFS_FCC) {
4108 /* Consecutive radar indications need not be
4109 * sent to the firmware until we get confirmation
4110 * for the previous detected radar.
4111 */
4112 spin_lock_bh(&ar->data_lock);
4113 if (ar->radar_conf_state != ATH10K_RADAR_CONFIRMATION_IDLE) {
4114 spin_unlock_bh(&ar->data_lock);
4115 return;
4116 }
4117 ar->radar_conf_state = ATH10K_RADAR_CONFIRMATION_INPROGRESS;
4118 radar_info = &ar->last_radar_info;
4119
4120 radar_info->pri_min = rs.pri_min;
4121 radar_info->pri_max = rs.pri_max;
4122 radar_info->width_min = rs.width_min;
4123 radar_info->width_max = rs.width_max;
4124 /*TODO Find sidx_min and sidx_max */
4125 radar_info->sidx_min = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX);
4126 radar_info->sidx_max = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX);
4127
4128 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4129 "sending wmi radar found cmd pri_min %d pri_max %d width_min %d width_max %d sidx_min %d sidx_max %d\n",
4130 radar_info->pri_min, radar_info->pri_max,
4131 radar_info->width_min, radar_info->width_max,
4132 radar_info->sidx_min, radar_info->sidx_max);
4133 ieee80211_queue_work(ar->hw, &ar->radar_confirmation_work);
4134 spin_unlock_bh(&ar->data_lock);
4135 return;
4136 }
4137
4138 radar_detected:
4139 ath10k_radar_detected(ar);
4140 }
4141
ath10k_dfs_fft_report(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,const struct phyerr_fft_report * fftr,u64 tsf)4142 static int ath10k_dfs_fft_report(struct ath10k *ar,
4143 struct wmi_phyerr_ev_arg *phyerr,
4144 const struct phyerr_fft_report *fftr,
4145 u64 tsf)
4146 {
4147 u32 reg0, reg1;
4148 u8 rssi, peak_mag;
4149
4150 reg0 = __le32_to_cpu(fftr->reg0);
4151 reg1 = __le32_to_cpu(fftr->reg1);
4152 rssi = phyerr->rssi_combined;
4153
4154 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4155 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
4156 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
4157 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
4158 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
4159 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
4160 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4161 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
4162 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
4163 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
4164 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
4165 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
4166
4167 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
4168
4169 /* false event detection */
4170 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
4171 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
4172 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
4173 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
4174 return -EINVAL;
4175 }
4176
4177 return 0;
4178 }
4179
ath10k_wmi_event_dfs(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,u64 tsf)4180 void ath10k_wmi_event_dfs(struct ath10k *ar,
4181 struct wmi_phyerr_ev_arg *phyerr,
4182 u64 tsf)
4183 {
4184 int buf_len, tlv_len, res, i = 0;
4185 const struct phyerr_tlv *tlv;
4186 const struct phyerr_radar_report *rr;
4187 const struct phyerr_fft_report *fftr;
4188 const u8 *tlv_buf;
4189
4190 buf_len = phyerr->buf_len;
4191 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4192 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
4193 phyerr->phy_err_code, phyerr->rssi_combined,
4194 phyerr->tsf_timestamp, tsf, buf_len);
4195
4196 /* Skip event if DFS disabled */
4197 if (!IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED))
4198 return;
4199
4200 ATH10K_DFS_STAT_INC(ar, pulses_total);
4201
4202 while (i < buf_len) {
4203 if (i + sizeof(*tlv) > buf_len) {
4204 ath10k_warn(ar, "too short buf for tlv header (%d)\n",
4205 i);
4206 return;
4207 }
4208
4209 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
4210 tlv_len = __le16_to_cpu(tlv->len);
4211 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
4212 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4213 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
4214 tlv_len, tlv->tag, tlv->sig);
4215
4216 switch (tlv->tag) {
4217 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
4218 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
4219 ath10k_warn(ar, "too short radar pulse summary (%d)\n",
4220 i);
4221 return;
4222 }
4223
4224 rr = (struct phyerr_radar_report *)tlv_buf;
4225 ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
4226 break;
4227 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
4228 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
4229 ath10k_warn(ar, "too short fft report (%d)\n",
4230 i);
4231 return;
4232 }
4233
4234 fftr = (struct phyerr_fft_report *)tlv_buf;
4235 res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
4236 if (res)
4237 return;
4238 break;
4239 }
4240
4241 i += sizeof(*tlv) + tlv_len;
4242 }
4243 }
4244
ath10k_wmi_event_spectral_scan(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,u64 tsf)4245 void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
4246 struct wmi_phyerr_ev_arg *phyerr,
4247 u64 tsf)
4248 {
4249 int buf_len, tlv_len, res, i = 0;
4250 struct phyerr_tlv *tlv;
4251 const void *tlv_buf;
4252 const struct phyerr_fft_report *fftr;
4253 size_t fftr_len;
4254
4255 buf_len = phyerr->buf_len;
4256
4257 while (i < buf_len) {
4258 if (i + sizeof(*tlv) > buf_len) {
4259 ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
4260 i);
4261 return;
4262 }
4263
4264 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
4265 tlv_len = __le16_to_cpu(tlv->len);
4266 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
4267
4268 if (i + sizeof(*tlv) + tlv_len > buf_len) {
4269 ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
4270 i);
4271 return;
4272 }
4273
4274 switch (tlv->tag) {
4275 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
4276 if (sizeof(*fftr) > tlv_len) {
4277 ath10k_warn(ar, "failed to parse fft report at byte %d\n",
4278 i);
4279 return;
4280 }
4281
4282 fftr_len = tlv_len - sizeof(*fftr);
4283 fftr = tlv_buf;
4284 res = ath10k_spectral_process_fft(ar, phyerr,
4285 fftr, fftr_len,
4286 tsf);
4287 if (res < 0) {
4288 ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n",
4289 res);
4290 return;
4291 }
4292 break;
4293 }
4294
4295 i += sizeof(*tlv) + tlv_len;
4296 }
4297 }
4298
ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k * ar,struct sk_buff * skb,struct wmi_phyerr_hdr_arg * arg)4299 static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
4300 struct sk_buff *skb,
4301 struct wmi_phyerr_hdr_arg *arg)
4302 {
4303 struct wmi_phyerr_event *ev = (void *)skb->data;
4304
4305 if (skb->len < sizeof(*ev))
4306 return -EPROTO;
4307
4308 arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
4309 arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
4310 arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
4311 arg->buf_len = skb->len - sizeof(*ev);
4312 arg->phyerrs = ev->phyerrs;
4313
4314 return 0;
4315 }
4316
ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k * ar,struct sk_buff * skb,struct wmi_phyerr_hdr_arg * arg)4317 static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
4318 struct sk_buff *skb,
4319 struct wmi_phyerr_hdr_arg *arg)
4320 {
4321 struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
4322
4323 if (skb->len < sizeof(*ev))
4324 return -EPROTO;
4325
4326 /* 10.4 firmware always reports only one phyerr */
4327 arg->num_phyerrs = 1;
4328
4329 arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
4330 arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
4331 arg->buf_len = skb->len;
4332 arg->phyerrs = skb->data;
4333
4334 return 0;
4335 }
4336
ath10k_wmi_op_pull_phyerr_ev(struct ath10k * ar,const void * phyerr_buf,int left_len,struct wmi_phyerr_ev_arg * arg)4337 int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
4338 const void *phyerr_buf,
4339 int left_len,
4340 struct wmi_phyerr_ev_arg *arg)
4341 {
4342 const struct wmi_phyerr *phyerr = phyerr_buf;
4343 int i;
4344
4345 if (left_len < sizeof(*phyerr)) {
4346 ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
4347 left_len, sizeof(*phyerr));
4348 return -EINVAL;
4349 }
4350
4351 arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
4352 arg->freq1 = __le16_to_cpu(phyerr->freq1);
4353 arg->freq2 = __le16_to_cpu(phyerr->freq2);
4354 arg->rssi_combined = phyerr->rssi_combined;
4355 arg->chan_width_mhz = phyerr->chan_width_mhz;
4356 arg->buf_len = __le32_to_cpu(phyerr->buf_len);
4357 arg->buf = phyerr->buf;
4358 arg->hdr_len = sizeof(*phyerr);
4359
4360 for (i = 0; i < 4; i++)
4361 arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
4362
4363 switch (phyerr->phy_err_code) {
4364 case PHY_ERROR_GEN_SPECTRAL_SCAN:
4365 arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
4366 break;
4367 case PHY_ERROR_GEN_FALSE_RADAR_EXT:
4368 arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
4369 break;
4370 case PHY_ERROR_GEN_RADAR:
4371 arg->phy_err_code = PHY_ERROR_RADAR;
4372 break;
4373 default:
4374 arg->phy_err_code = PHY_ERROR_UNKNOWN;
4375 break;
4376 }
4377
4378 return 0;
4379 }
4380
ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k * ar,const void * phyerr_buf,int left_len,struct wmi_phyerr_ev_arg * arg)4381 static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
4382 const void *phyerr_buf,
4383 int left_len,
4384 struct wmi_phyerr_ev_arg *arg)
4385 {
4386 const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
4387 u32 phy_err_mask;
4388 int i;
4389
4390 if (left_len < sizeof(*phyerr)) {
4391 ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
4392 left_len, sizeof(*phyerr));
4393 return -EINVAL;
4394 }
4395
4396 arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
4397 arg->freq1 = __le16_to_cpu(phyerr->freq1);
4398 arg->freq2 = __le16_to_cpu(phyerr->freq2);
4399 arg->rssi_combined = phyerr->rssi_combined;
4400 arg->chan_width_mhz = phyerr->chan_width_mhz;
4401 arg->buf_len = __le32_to_cpu(phyerr->buf_len);
4402 arg->buf = phyerr->buf;
4403 arg->hdr_len = sizeof(*phyerr);
4404
4405 for (i = 0; i < 4; i++)
4406 arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
4407
4408 phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
4409
4410 if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
4411 arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
4412 else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
4413 arg->phy_err_code = PHY_ERROR_RADAR;
4414 else
4415 arg->phy_err_code = PHY_ERROR_UNKNOWN;
4416
4417 return 0;
4418 }
4419
ath10k_wmi_event_phyerr(struct ath10k * ar,struct sk_buff * skb)4420 void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
4421 {
4422 struct wmi_phyerr_hdr_arg hdr_arg = {};
4423 struct wmi_phyerr_ev_arg phyerr_arg = {};
4424 const void *phyerr;
4425 u32 count, i, buf_len, phy_err_code;
4426 u64 tsf;
4427 int left_len, ret;
4428
4429 ATH10K_DFS_STAT_INC(ar, phy_errors);
4430
4431 ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
4432 if (ret) {
4433 ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
4434 return;
4435 }
4436
4437 /* Check number of included events */
4438 count = hdr_arg.num_phyerrs;
4439
4440 left_len = hdr_arg.buf_len;
4441
4442 tsf = hdr_arg.tsf_u32;
4443 tsf <<= 32;
4444 tsf |= hdr_arg.tsf_l32;
4445
4446 ath10k_dbg(ar, ATH10K_DBG_WMI,
4447 "wmi event phyerr count %d tsf64 0x%llX\n",
4448 count, tsf);
4449
4450 phyerr = hdr_arg.phyerrs;
4451 for (i = 0; i < count; i++) {
4452 ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
4453 if (ret) {
4454 ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
4455 i);
4456 return;
4457 }
4458
4459 left_len -= phyerr_arg.hdr_len;
4460 buf_len = phyerr_arg.buf_len;
4461 phy_err_code = phyerr_arg.phy_err_code;
4462
4463 if (left_len < buf_len) {
4464 ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
4465 return;
4466 }
4467
4468 left_len -= buf_len;
4469
4470 switch (phy_err_code) {
4471 case PHY_ERROR_RADAR:
4472 ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
4473 break;
4474 case PHY_ERROR_SPECTRAL_SCAN:
4475 ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
4476 break;
4477 case PHY_ERROR_FALSE_RADAR_EXT:
4478 ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
4479 ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
4480 break;
4481 default:
4482 break;
4483 }
4484
4485 phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
4486 }
4487 }
4488
4489 static int
ath10k_wmi_10_4_op_pull_dfs_status_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_dfs_status_ev_arg * arg)4490 ath10k_wmi_10_4_op_pull_dfs_status_ev(struct ath10k *ar, struct sk_buff *skb,
4491 struct wmi_dfs_status_ev_arg *arg)
4492 {
4493 struct wmi_dfs_status_ev_arg *ev = (void *)skb->data;
4494
4495 if (skb->len < sizeof(*ev))
4496 return -EPROTO;
4497
4498 arg->status = ev->status;
4499
4500 return 0;
4501 }
4502
4503 static void
ath10k_wmi_event_dfs_status_check(struct ath10k * ar,struct sk_buff * skb)4504 ath10k_wmi_event_dfs_status_check(struct ath10k *ar, struct sk_buff *skb)
4505 {
4506 struct wmi_dfs_status_ev_arg status_arg = {};
4507 int ret;
4508
4509 ret = ath10k_wmi_pull_dfs_status(ar, skb, &status_arg);
4510
4511 if (ret) {
4512 ath10k_warn(ar, "failed to parse dfs status event: %d\n", ret);
4513 return;
4514 }
4515
4516 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4517 "dfs status event received from fw: %d\n",
4518 status_arg.status);
4519
4520 /* Even in case of radar detection failure we follow the same
4521 * behaviour as if radar is detected i.e to switch to a different
4522 * channel.
4523 */
4524 if (status_arg.status == WMI_HW_RADAR_DETECTED ||
4525 status_arg.status == WMI_RADAR_DETECTION_FAIL)
4526 ath10k_radar_detected(ar);
4527 complete(&ar->wmi.radar_confirm);
4528 }
4529
ath10k_wmi_event_roam(struct ath10k * ar,struct sk_buff * skb)4530 void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
4531 {
4532 struct wmi_roam_ev_arg arg = {};
4533 int ret;
4534 u32 vdev_id;
4535 u32 reason;
4536 s32 rssi;
4537
4538 ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg);
4539 if (ret) {
4540 ath10k_warn(ar, "failed to parse roam event: %d\n", ret);
4541 return;
4542 }
4543
4544 vdev_id = __le32_to_cpu(arg.vdev_id);
4545 reason = __le32_to_cpu(arg.reason);
4546 rssi = __le32_to_cpu(arg.rssi);
4547 rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT;
4548
4549 ath10k_dbg(ar, ATH10K_DBG_WMI,
4550 "wmi roam event vdev %u reason 0x%08x rssi %d\n",
4551 vdev_id, reason, rssi);
4552
4553 if (reason >= WMI_ROAM_REASON_MAX)
4554 ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n",
4555 reason, vdev_id);
4556
4557 switch (reason) {
4558 case WMI_ROAM_REASON_BEACON_MISS:
4559 ath10k_mac_handle_beacon_miss(ar, vdev_id);
4560 break;
4561 case WMI_ROAM_REASON_BETTER_AP:
4562 case WMI_ROAM_REASON_LOW_RSSI:
4563 case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
4564 case WMI_ROAM_REASON_HO_FAILED:
4565 ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n",
4566 reason, vdev_id);
4567 break;
4568 }
4569 }
4570
ath10k_wmi_event_profile_match(struct ath10k * ar,struct sk_buff * skb)4571 void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
4572 {
4573 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
4574 }
4575
ath10k_wmi_event_debug_print(struct ath10k * ar,struct sk_buff * skb)4576 void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
4577 {
4578 char buf[101], c;
4579 int i;
4580
4581 for (i = 0; i < sizeof(buf) - 1; i++) {
4582 if (i >= skb->len)
4583 break;
4584
4585 c = skb->data[i];
4586
4587 if (c == '\0')
4588 break;
4589
4590 if (isascii(c) && isprint(c))
4591 buf[i] = c;
4592 else
4593 buf[i] = '.';
4594 }
4595
4596 if (i == sizeof(buf) - 1)
4597 ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
4598
4599 /* for some reason the debug prints end with \n, remove that */
4600 if (skb->data[i - 1] == '\n')
4601 i--;
4602
4603 /* the last byte is always reserved for the null character */
4604 buf[i] = '\0';
4605
4606 ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
4607 }
4608
ath10k_wmi_event_pdev_qvit(struct ath10k * ar,struct sk_buff * skb)4609 void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
4610 {
4611 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
4612 }
4613
ath10k_wmi_event_wlan_profile_data(struct ath10k * ar,struct sk_buff * skb)4614 void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
4615 {
4616 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
4617 }
4618
ath10k_wmi_event_rtt_measurement_report(struct ath10k * ar,struct sk_buff * skb)4619 void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
4620 struct sk_buff *skb)
4621 {
4622 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
4623 }
4624
ath10k_wmi_event_tsf_measurement_report(struct ath10k * ar,struct sk_buff * skb)4625 void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
4626 struct sk_buff *skb)
4627 {
4628 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
4629 }
4630
ath10k_wmi_event_rtt_error_report(struct ath10k * ar,struct sk_buff * skb)4631 void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
4632 {
4633 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
4634 }
4635
ath10k_wmi_event_wow_wakeup_host(struct ath10k * ar,struct sk_buff * skb)4636 void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
4637 {
4638 struct wmi_wow_ev_arg ev = {};
4639 int ret;
4640
4641 complete(&ar->wow.wakeup_completed);
4642
4643 ret = ath10k_wmi_pull_wow_event(ar, skb, &ev);
4644 if (ret) {
4645 ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret);
4646 return;
4647 }
4648
4649 ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n",
4650 wow_reason(ev.wake_reason));
4651 }
4652
ath10k_wmi_event_dcs_interference(struct ath10k * ar,struct sk_buff * skb)4653 void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
4654 {
4655 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
4656 }
4657
ath10k_tpc_config_get_rate(struct ath10k * ar,struct wmi_pdev_tpc_config_event * ev,u32 rate_idx,u32 num_chains,u32 rate_code,u8 type)4658 static u8 ath10k_tpc_config_get_rate(struct ath10k *ar,
4659 struct wmi_pdev_tpc_config_event *ev,
4660 u32 rate_idx, u32 num_chains,
4661 u32 rate_code, u8 type)
4662 {
4663 u8 tpc, num_streams, preamble, ch, stm_idx;
4664
4665 num_streams = ATH10K_HW_NSS(rate_code);
4666 preamble = ATH10K_HW_PREAMBLE(rate_code);
4667 ch = num_chains - 1;
4668
4669 tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]);
4670
4671 if (__le32_to_cpu(ev->num_tx_chain) <= 1)
4672 goto out;
4673
4674 if (preamble == WMI_RATE_PREAMBLE_CCK)
4675 goto out;
4676
4677 stm_idx = num_streams - 1;
4678 if (num_chains <= num_streams)
4679 goto out;
4680
4681 switch (type) {
4682 case WMI_TPC_TABLE_TYPE_STBC:
4683 tpc = min_t(u8, tpc,
4684 ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]);
4685 break;
4686 case WMI_TPC_TABLE_TYPE_TXBF:
4687 tpc = min_t(u8, tpc,
4688 ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]);
4689 break;
4690 case WMI_TPC_TABLE_TYPE_CDD:
4691 tpc = min_t(u8, tpc,
4692 ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]);
4693 break;
4694 default:
4695 ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type);
4696 tpc = 0;
4697 break;
4698 }
4699
4700 out:
4701 return tpc;
4702 }
4703
ath10k_tpc_config_disp_tables(struct ath10k * ar,struct wmi_pdev_tpc_config_event * ev,struct ath10k_tpc_stats * tpc_stats,u8 * rate_code,u16 * pream_table,u8 type)4704 static void ath10k_tpc_config_disp_tables(struct ath10k *ar,
4705 struct wmi_pdev_tpc_config_event *ev,
4706 struct ath10k_tpc_stats *tpc_stats,
4707 u8 *rate_code, u16 *pream_table, u8 type)
4708 {
4709 u32 i, j, pream_idx, flags;
4710 u8 tpc[WMI_TPC_TX_N_CHAIN];
4711 char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
4712 char buff[WMI_TPC_BUF_SIZE];
4713
4714 flags = __le32_to_cpu(ev->flags);
4715
4716 switch (type) {
4717 case WMI_TPC_TABLE_TYPE_CDD:
4718 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
4719 ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
4720 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4721 return;
4722 }
4723 break;
4724 case WMI_TPC_TABLE_TYPE_STBC:
4725 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
4726 ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
4727 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4728 return;
4729 }
4730 break;
4731 case WMI_TPC_TABLE_TYPE_TXBF:
4732 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
4733 ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
4734 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4735 return;
4736 }
4737 break;
4738 default:
4739 ath10k_dbg(ar, ATH10K_DBG_WMI,
4740 "invalid table type in wmi tpc event: %d\n", type);
4741 return;
4742 }
4743
4744 pream_idx = 0;
4745 for (i = 0; i < tpc_stats->rate_max; i++) {
4746 memset(tpc_value, 0, sizeof(tpc_value));
4747 memset(buff, 0, sizeof(buff));
4748 if (i == pream_table[pream_idx])
4749 pream_idx++;
4750
4751 for (j = 0; j < tpc_stats->num_tx_chain; j++) {
4752 tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1,
4753 rate_code[i],
4754 type);
4755 snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
4756 strlcat(tpc_value, buff, sizeof(tpc_value));
4757 }
4758 tpc_stats->tpc_table[type].pream_idx[i] = pream_idx;
4759 tpc_stats->tpc_table[type].rate_code[i] = rate_code[i];
4760 memcpy(tpc_stats->tpc_table[type].tpc_value[i],
4761 tpc_value, sizeof(tpc_value));
4762 }
4763 }
4764
ath10k_wmi_tpc_config_get_rate_code(u8 * rate_code,u16 * pream_table,u32 num_tx_chain)4765 void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table,
4766 u32 num_tx_chain)
4767 {
4768 u32 i, j, pream_idx;
4769 u8 rate_idx;
4770
4771 /* Create the rate code table based on the chains supported */
4772 rate_idx = 0;
4773 pream_idx = 0;
4774
4775 /* Fill CCK rate code */
4776 for (i = 0; i < 4; i++) {
4777 rate_code[rate_idx] =
4778 ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK);
4779 rate_idx++;
4780 }
4781 pream_table[pream_idx] = rate_idx;
4782 pream_idx++;
4783
4784 /* Fill OFDM rate code */
4785 for (i = 0; i < 8; i++) {
4786 rate_code[rate_idx] =
4787 ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM);
4788 rate_idx++;
4789 }
4790 pream_table[pream_idx] = rate_idx;
4791 pream_idx++;
4792
4793 /* Fill HT20 rate code */
4794 for (i = 0; i < num_tx_chain; i++) {
4795 for (j = 0; j < 8; j++) {
4796 rate_code[rate_idx] =
4797 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
4798 rate_idx++;
4799 }
4800 }
4801 pream_table[pream_idx] = rate_idx;
4802 pream_idx++;
4803
4804 /* Fill HT40 rate code */
4805 for (i = 0; i < num_tx_chain; i++) {
4806 for (j = 0; j < 8; j++) {
4807 rate_code[rate_idx] =
4808 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
4809 rate_idx++;
4810 }
4811 }
4812 pream_table[pream_idx] = rate_idx;
4813 pream_idx++;
4814
4815 /* Fill VHT20 rate code */
4816 for (i = 0; i < num_tx_chain; i++) {
4817 for (j = 0; j < 10; j++) {
4818 rate_code[rate_idx] =
4819 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4820 rate_idx++;
4821 }
4822 }
4823 pream_table[pream_idx] = rate_idx;
4824 pream_idx++;
4825
4826 /* Fill VHT40 rate code */
4827 for (i = 0; i < num_tx_chain; i++) {
4828 for (j = 0; j < 10; j++) {
4829 rate_code[rate_idx] =
4830 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4831 rate_idx++;
4832 }
4833 }
4834 pream_table[pream_idx] = rate_idx;
4835 pream_idx++;
4836
4837 /* Fill VHT80 rate code */
4838 for (i = 0; i < num_tx_chain; i++) {
4839 for (j = 0; j < 10; j++) {
4840 rate_code[rate_idx] =
4841 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4842 rate_idx++;
4843 }
4844 }
4845 pream_table[pream_idx] = rate_idx;
4846 pream_idx++;
4847
4848 rate_code[rate_idx++] =
4849 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
4850 rate_code[rate_idx++] =
4851 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4852 rate_code[rate_idx++] =
4853 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
4854 rate_code[rate_idx++] =
4855 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4856 rate_code[rate_idx++] =
4857 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4858
4859 pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END;
4860 }
4861
ath10k_wmi_event_pdev_tpc_config(struct ath10k * ar,struct sk_buff * skb)4862 void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
4863 {
4864 u32 num_tx_chain, rate_max;
4865 u8 rate_code[WMI_TPC_RATE_MAX];
4866 u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
4867 struct wmi_pdev_tpc_config_event *ev;
4868 struct ath10k_tpc_stats *tpc_stats;
4869
4870 ev = (struct wmi_pdev_tpc_config_event *)skb->data;
4871
4872 num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
4873
4874 if (num_tx_chain > WMI_TPC_TX_N_CHAIN) {
4875 ath10k_warn(ar, "number of tx chain is %d greater than TPC configured tx chain %d\n",
4876 num_tx_chain, WMI_TPC_TX_N_CHAIN);
4877 return;
4878 }
4879
4880 rate_max = __le32_to_cpu(ev->rate_max);
4881 if (rate_max > WMI_TPC_RATE_MAX) {
4882 ath10k_warn(ar, "number of rate is %d greater than TPC configured rate %d\n",
4883 rate_max, WMI_TPC_RATE_MAX);
4884 rate_max = WMI_TPC_RATE_MAX;
4885 }
4886
4887 tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
4888 if (!tpc_stats)
4889 return;
4890
4891 ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table,
4892 num_tx_chain);
4893
4894 tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
4895 tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
4896 tpc_stats->ctl = __le32_to_cpu(ev->ctl);
4897 tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
4898 tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
4899 tpc_stats->twice_antenna_reduction =
4900 __le32_to_cpu(ev->twice_antenna_reduction);
4901 tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
4902 tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
4903 tpc_stats->num_tx_chain = num_tx_chain;
4904 tpc_stats->rate_max = rate_max;
4905
4906 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4907 rate_code, pream_table,
4908 WMI_TPC_TABLE_TYPE_CDD);
4909 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4910 rate_code, pream_table,
4911 WMI_TPC_TABLE_TYPE_STBC);
4912 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4913 rate_code, pream_table,
4914 WMI_TPC_TABLE_TYPE_TXBF);
4915
4916 ath10k_debug_tpc_stats_process(ar, tpc_stats);
4917
4918 ath10k_dbg(ar, ATH10K_DBG_WMI,
4919 "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
4920 __le32_to_cpu(ev->chan_freq),
4921 __le32_to_cpu(ev->phy_mode),
4922 __le32_to_cpu(ev->ctl),
4923 __le32_to_cpu(ev->reg_domain),
4924 a_sle32_to_cpu(ev->twice_antenna_gain),
4925 __le32_to_cpu(ev->twice_antenna_reduction),
4926 __le32_to_cpu(ev->power_limit),
4927 __le32_to_cpu(ev->twice_max_rd_power) / 2,
4928 __le32_to_cpu(ev->num_tx_chain),
4929 __le32_to_cpu(ev->rate_max));
4930 }
4931
4932 static u8
ath10k_wmi_tpc_final_get_rate(struct ath10k * ar,struct wmi_pdev_tpc_final_table_event * ev,u32 rate_idx,u32 num_chains,u32 rate_code,u8 type,u32 pream_idx)4933 ath10k_wmi_tpc_final_get_rate(struct ath10k *ar,
4934 struct wmi_pdev_tpc_final_table_event *ev,
4935 u32 rate_idx, u32 num_chains,
4936 u32 rate_code, u8 type, u32 pream_idx)
4937 {
4938 u8 tpc, num_streams, preamble, ch, stm_idx;
4939 s8 pow_agcdd, pow_agstbc, pow_agtxbf;
4940 int pream;
4941
4942 num_streams = ATH10K_HW_NSS(rate_code);
4943 preamble = ATH10K_HW_PREAMBLE(rate_code);
4944 ch = num_chains - 1;
4945 stm_idx = num_streams - 1;
4946 pream = -1;
4947
4948 if (__le32_to_cpu(ev->chan_freq) <= 2483) {
4949 switch (pream_idx) {
4950 case WMI_TPC_PREAM_2GHZ_CCK:
4951 pream = 0;
4952 break;
4953 case WMI_TPC_PREAM_2GHZ_OFDM:
4954 pream = 1;
4955 break;
4956 case WMI_TPC_PREAM_2GHZ_HT20:
4957 case WMI_TPC_PREAM_2GHZ_VHT20:
4958 pream = 2;
4959 break;
4960 case WMI_TPC_PREAM_2GHZ_HT40:
4961 case WMI_TPC_PREAM_2GHZ_VHT40:
4962 pream = 3;
4963 break;
4964 case WMI_TPC_PREAM_2GHZ_VHT80:
4965 pream = 4;
4966 break;
4967 default:
4968 pream = -1;
4969 break;
4970 }
4971 }
4972
4973 if (__le32_to_cpu(ev->chan_freq) >= 5180) {
4974 switch (pream_idx) {
4975 case WMI_TPC_PREAM_5GHZ_OFDM:
4976 pream = 0;
4977 break;
4978 case WMI_TPC_PREAM_5GHZ_HT20:
4979 case WMI_TPC_PREAM_5GHZ_VHT20:
4980 pream = 1;
4981 break;
4982 case WMI_TPC_PREAM_5GHZ_HT40:
4983 case WMI_TPC_PREAM_5GHZ_VHT40:
4984 pream = 2;
4985 break;
4986 case WMI_TPC_PREAM_5GHZ_VHT80:
4987 pream = 3;
4988 break;
4989 case WMI_TPC_PREAM_5GHZ_HTCUP:
4990 pream = 4;
4991 break;
4992 default:
4993 pream = -1;
4994 break;
4995 }
4996 }
4997
4998 if (pream == -1) {
4999 ath10k_warn(ar, "unknown wmi tpc final index and frequency: %u, %u\n",
5000 pream_idx, __le32_to_cpu(ev->chan_freq));
5001 tpc = 0;
5002 goto out;
5003 }
5004
5005 if (pream == 4)
5006 tpc = min_t(u8, ev->rates_array[rate_idx],
5007 ev->max_reg_allow_pow[ch]);
5008 else
5009 tpc = min_t(u8, min_t(u8, ev->rates_array[rate_idx],
5010 ev->max_reg_allow_pow[ch]),
5011 ev->ctl_power_table[0][pream][stm_idx]);
5012
5013 if (__le32_to_cpu(ev->num_tx_chain) <= 1)
5014 goto out;
5015
5016 if (preamble == WMI_RATE_PREAMBLE_CCK)
5017 goto out;
5018
5019 if (num_chains <= num_streams)
5020 goto out;
5021
5022 switch (type) {
5023 case WMI_TPC_TABLE_TYPE_STBC:
5024 pow_agstbc = ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx];
5025 if (pream == 4)
5026 tpc = min_t(u8, tpc, pow_agstbc);
5027 else
5028 tpc = min_t(u8, min_t(u8, tpc, pow_agstbc),
5029 ev->ctl_power_table[0][pream][stm_idx]);
5030 break;
5031 case WMI_TPC_TABLE_TYPE_TXBF:
5032 pow_agtxbf = ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx];
5033 if (pream == 4)
5034 tpc = min_t(u8, tpc, pow_agtxbf);
5035 else
5036 tpc = min_t(u8, min_t(u8, tpc, pow_agtxbf),
5037 ev->ctl_power_table[1][pream][stm_idx]);
5038 break;
5039 case WMI_TPC_TABLE_TYPE_CDD:
5040 pow_agcdd = ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx];
5041 if (pream == 4)
5042 tpc = min_t(u8, tpc, pow_agcdd);
5043 else
5044 tpc = min_t(u8, min_t(u8, tpc, pow_agcdd),
5045 ev->ctl_power_table[0][pream][stm_idx]);
5046 break;
5047 default:
5048 ath10k_warn(ar, "unknown wmi tpc final table type: %d\n", type);
5049 tpc = 0;
5050 break;
5051 }
5052
5053 out:
5054 return tpc;
5055 }
5056
5057 static void
ath10k_wmi_tpc_stats_final_disp_tables(struct ath10k * ar,struct wmi_pdev_tpc_final_table_event * ev,struct ath10k_tpc_stats_final * tpc_stats,u8 * rate_code,u16 * pream_table,u8 type)5058 ath10k_wmi_tpc_stats_final_disp_tables(struct ath10k *ar,
5059 struct wmi_pdev_tpc_final_table_event *ev,
5060 struct ath10k_tpc_stats_final *tpc_stats,
5061 u8 *rate_code, u16 *pream_table, u8 type)
5062 {
5063 u32 i, j, pream_idx, flags;
5064 u8 tpc[WMI_TPC_TX_N_CHAIN];
5065 char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
5066 char buff[WMI_TPC_BUF_SIZE];
5067
5068 flags = __le32_to_cpu(ev->flags);
5069
5070 switch (type) {
5071 case WMI_TPC_TABLE_TYPE_CDD:
5072 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
5073 ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
5074 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
5075 return;
5076 }
5077 break;
5078 case WMI_TPC_TABLE_TYPE_STBC:
5079 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
5080 ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
5081 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
5082 return;
5083 }
5084 break;
5085 case WMI_TPC_TABLE_TYPE_TXBF:
5086 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
5087 ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
5088 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
5089 return;
5090 }
5091 break;
5092 default:
5093 ath10k_dbg(ar, ATH10K_DBG_WMI,
5094 "invalid table type in wmi tpc event: %d\n", type);
5095 return;
5096 }
5097
5098 pream_idx = 0;
5099 for (i = 0; i < tpc_stats->rate_max; i++) {
5100 memset(tpc_value, 0, sizeof(tpc_value));
5101 memset(buff, 0, sizeof(buff));
5102 if (i == pream_table[pream_idx])
5103 pream_idx++;
5104
5105 for (j = 0; j < tpc_stats->num_tx_chain; j++) {
5106 tpc[j] = ath10k_wmi_tpc_final_get_rate(ar, ev, i, j + 1,
5107 rate_code[i],
5108 type, pream_idx);
5109 snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
5110 strlcat(tpc_value, buff, sizeof(tpc_value));
5111 }
5112 tpc_stats->tpc_table_final[type].pream_idx[i] = pream_idx;
5113 tpc_stats->tpc_table_final[type].rate_code[i] = rate_code[i];
5114 memcpy(tpc_stats->tpc_table_final[type].tpc_value[i],
5115 tpc_value, sizeof(tpc_value));
5116 }
5117 }
5118
ath10k_wmi_event_tpc_final_table(struct ath10k * ar,struct sk_buff * skb)5119 void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb)
5120 {
5121 u32 num_tx_chain, rate_max;
5122 u8 rate_code[WMI_TPC_FINAL_RATE_MAX];
5123 u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
5124 struct wmi_pdev_tpc_final_table_event *ev;
5125 struct ath10k_tpc_stats_final *tpc_stats;
5126
5127 ev = (struct wmi_pdev_tpc_final_table_event *)skb->data;
5128
5129 num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
5130 if (num_tx_chain > WMI_TPC_TX_N_CHAIN) {
5131 ath10k_warn(ar, "number of tx chain is %d greater than TPC final configured tx chain %d\n",
5132 num_tx_chain, WMI_TPC_TX_N_CHAIN);
5133 return;
5134 }
5135
5136 rate_max = __le32_to_cpu(ev->rate_max);
5137 if (rate_max > WMI_TPC_FINAL_RATE_MAX) {
5138 ath10k_warn(ar, "number of rate is %d greater than TPC final configured rate %d\n",
5139 rate_max, WMI_TPC_FINAL_RATE_MAX);
5140 rate_max = WMI_TPC_FINAL_RATE_MAX;
5141 }
5142
5143 tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
5144 if (!tpc_stats)
5145 return;
5146
5147 ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table,
5148 num_tx_chain);
5149
5150 tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
5151 tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
5152 tpc_stats->ctl = __le32_to_cpu(ev->ctl);
5153 tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
5154 tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
5155 tpc_stats->twice_antenna_reduction =
5156 __le32_to_cpu(ev->twice_antenna_reduction);
5157 tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
5158 tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
5159 tpc_stats->num_tx_chain = num_tx_chain;
5160 tpc_stats->rate_max = rate_max;
5161
5162 ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
5163 rate_code, pream_table,
5164 WMI_TPC_TABLE_TYPE_CDD);
5165 ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
5166 rate_code, pream_table,
5167 WMI_TPC_TABLE_TYPE_STBC);
5168 ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
5169 rate_code, pream_table,
5170 WMI_TPC_TABLE_TYPE_TXBF);
5171
5172 ath10k_debug_tpc_stats_final_process(ar, tpc_stats);
5173
5174 ath10k_dbg(ar, ATH10K_DBG_WMI,
5175 "wmi event tpc final table channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
5176 __le32_to_cpu(ev->chan_freq),
5177 __le32_to_cpu(ev->phy_mode),
5178 __le32_to_cpu(ev->ctl),
5179 __le32_to_cpu(ev->reg_domain),
5180 a_sle32_to_cpu(ev->twice_antenna_gain),
5181 __le32_to_cpu(ev->twice_antenna_reduction),
5182 __le32_to_cpu(ev->power_limit),
5183 __le32_to_cpu(ev->twice_max_rd_power) / 2,
5184 __le32_to_cpu(ev->num_tx_chain),
5185 __le32_to_cpu(ev->rate_max));
5186 }
5187
5188 static void
ath10k_wmi_handle_tdls_peer_event(struct ath10k * ar,struct sk_buff * skb)5189 ath10k_wmi_handle_tdls_peer_event(struct ath10k *ar, struct sk_buff *skb)
5190 {
5191 struct wmi_tdls_peer_event *ev;
5192 struct ath10k_peer *peer;
5193 struct ath10k_vif *arvif;
5194 int vdev_id;
5195 int peer_status;
5196 int peer_reason;
5197 u8 reason;
5198
5199 if (skb->len < sizeof(*ev)) {
5200 ath10k_err(ar, "received tdls peer event with invalid size (%d bytes)\n",
5201 skb->len);
5202 return;
5203 }
5204
5205 ev = (struct wmi_tdls_peer_event *)skb->data;
5206 vdev_id = __le32_to_cpu(ev->vdev_id);
5207 peer_status = __le32_to_cpu(ev->peer_status);
5208 peer_reason = __le32_to_cpu(ev->peer_reason);
5209
5210 spin_lock_bh(&ar->data_lock);
5211 peer = ath10k_peer_find(ar, vdev_id, ev->peer_macaddr.addr);
5212 spin_unlock_bh(&ar->data_lock);
5213
5214 if (!peer) {
5215 ath10k_warn(ar, "failed to find peer entry for %pM\n",
5216 ev->peer_macaddr.addr);
5217 return;
5218 }
5219
5220 switch (peer_status) {
5221 case WMI_TDLS_SHOULD_TEARDOWN:
5222 switch (peer_reason) {
5223 case WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT:
5224 case WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE:
5225 case WMI_TDLS_TEARDOWN_REASON_RSSI:
5226 reason = WLAN_REASON_TDLS_TEARDOWN_UNREACHABLE;
5227 break;
5228 default:
5229 reason = WLAN_REASON_TDLS_TEARDOWN_UNSPECIFIED;
5230 break;
5231 }
5232
5233 arvif = ath10k_get_arvif(ar, vdev_id);
5234 if (!arvif) {
5235 ath10k_warn(ar, "received tdls peer event for invalid vdev id %u\n",
5236 vdev_id);
5237 return;
5238 }
5239
5240 ieee80211_tdls_oper_request(arvif->vif, ev->peer_macaddr.addr,
5241 NL80211_TDLS_TEARDOWN, reason,
5242 GFP_ATOMIC);
5243
5244 ath10k_dbg(ar, ATH10K_DBG_WMI,
5245 "received tdls teardown event for peer %pM reason %u\n",
5246 ev->peer_macaddr.addr, peer_reason);
5247 break;
5248 default:
5249 ath10k_dbg(ar, ATH10K_DBG_WMI,
5250 "received unknown tdls peer event %u\n",
5251 peer_status);
5252 break;
5253 }
5254 }
5255
5256 static void
ath10k_wmi_event_peer_sta_ps_state_chg(struct ath10k * ar,struct sk_buff * skb)5257 ath10k_wmi_event_peer_sta_ps_state_chg(struct ath10k *ar, struct sk_buff *skb)
5258 {
5259 struct wmi_peer_sta_ps_state_chg_event *ev;
5260 struct ieee80211_sta *sta;
5261 struct ath10k_sta *arsta;
5262 u8 peer_addr[ETH_ALEN];
5263
5264 lockdep_assert_held(&ar->data_lock);
5265
5266 ev = (struct wmi_peer_sta_ps_state_chg_event *)skb->data;
5267 ether_addr_copy(peer_addr, ev->peer_macaddr.addr);
5268
5269 rcu_read_lock();
5270
5271 sta = ieee80211_find_sta_by_ifaddr(ar->hw, peer_addr, NULL);
5272
5273 if (!sta) {
5274 ath10k_warn(ar, "failed to find station entry %pM\n",
5275 peer_addr);
5276 goto exit;
5277 }
5278
5279 arsta = (struct ath10k_sta *)sta->drv_priv;
5280 arsta->peer_ps_state = __le32_to_cpu(ev->peer_ps_state);
5281
5282 exit:
5283 rcu_read_unlock();
5284 }
5285
ath10k_wmi_event_pdev_ftm_intg(struct ath10k * ar,struct sk_buff * skb)5286 void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
5287 {
5288 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
5289 }
5290
ath10k_wmi_event_gtk_offload_status(struct ath10k * ar,struct sk_buff * skb)5291 void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
5292 {
5293 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
5294 }
5295
ath10k_wmi_event_gtk_rekey_fail(struct ath10k * ar,struct sk_buff * skb)5296 void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
5297 {
5298 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
5299 }
5300
ath10k_wmi_event_delba_complete(struct ath10k * ar,struct sk_buff * skb)5301 void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
5302 {
5303 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
5304 }
5305
ath10k_wmi_event_addba_complete(struct ath10k * ar,struct sk_buff * skb)5306 void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
5307 {
5308 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
5309 }
5310
ath10k_wmi_event_vdev_install_key_complete(struct ath10k * ar,struct sk_buff * skb)5311 void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
5312 struct sk_buff *skb)
5313 {
5314 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
5315 }
5316
ath10k_wmi_event_inst_rssi_stats(struct ath10k * ar,struct sk_buff * skb)5317 void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
5318 {
5319 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
5320 }
5321
ath10k_wmi_event_vdev_standby_req(struct ath10k * ar,struct sk_buff * skb)5322 void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
5323 {
5324 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
5325 }
5326
ath10k_wmi_event_vdev_resume_req(struct ath10k * ar,struct sk_buff * skb)5327 void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
5328 {
5329 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
5330 }
5331
ath10k_wmi_alloc_chunk(struct ath10k * ar,u32 req_id,u32 num_units,u32 unit_len)5332 static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id,
5333 u32 num_units, u32 unit_len)
5334 {
5335 dma_addr_t paddr;
5336 u32 pool_size;
5337 int idx = ar->wmi.num_mem_chunks;
5338 void *vaddr;
5339
5340 pool_size = num_units * round_up(unit_len, 4);
5341 vaddr = dma_alloc_coherent(ar->dev, pool_size, &paddr, GFP_KERNEL);
5342
5343 if (!vaddr)
5344 return -ENOMEM;
5345
5346 ar->wmi.mem_chunks[idx].vaddr = vaddr;
5347 ar->wmi.mem_chunks[idx].paddr = paddr;
5348 ar->wmi.mem_chunks[idx].len = pool_size;
5349 ar->wmi.mem_chunks[idx].req_id = req_id;
5350 ar->wmi.num_mem_chunks++;
5351
5352 return num_units;
5353 }
5354
ath10k_wmi_alloc_host_mem(struct ath10k * ar,u32 req_id,u32 num_units,u32 unit_len)5355 static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
5356 u32 num_units, u32 unit_len)
5357 {
5358 int ret;
5359
5360 while (num_units) {
5361 ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len);
5362 if (ret < 0)
5363 return ret;
5364
5365 num_units -= ret;
5366 }
5367
5368 return 0;
5369 }
5370
5371 static bool
ath10k_wmi_is_host_mem_allocated(struct ath10k * ar,const struct wlan_host_mem_req ** mem_reqs,u32 num_mem_reqs)5372 ath10k_wmi_is_host_mem_allocated(struct ath10k *ar,
5373 const struct wlan_host_mem_req **mem_reqs,
5374 u32 num_mem_reqs)
5375 {
5376 u32 req_id, num_units, unit_size, num_unit_info;
5377 u32 pool_size;
5378 int i, j;
5379 bool found;
5380
5381 if (ar->wmi.num_mem_chunks != num_mem_reqs)
5382 return false;
5383
5384 for (i = 0; i < num_mem_reqs; ++i) {
5385 req_id = __le32_to_cpu(mem_reqs[i]->req_id);
5386 num_units = __le32_to_cpu(mem_reqs[i]->num_units);
5387 unit_size = __le32_to_cpu(mem_reqs[i]->unit_size);
5388 num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info);
5389
5390 if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
5391 if (ar->num_active_peers)
5392 num_units = ar->num_active_peers + 1;
5393 else
5394 num_units = ar->max_num_peers + 1;
5395 } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
5396 num_units = ar->max_num_peers + 1;
5397 } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
5398 num_units = ar->max_num_vdevs + 1;
5399 }
5400
5401 found = false;
5402 for (j = 0; j < ar->wmi.num_mem_chunks; j++) {
5403 if (ar->wmi.mem_chunks[j].req_id == req_id) {
5404 pool_size = num_units * round_up(unit_size, 4);
5405 if (ar->wmi.mem_chunks[j].len == pool_size) {
5406 found = true;
5407 break;
5408 }
5409 }
5410 }
5411 if (!found)
5412 return false;
5413 }
5414
5415 return true;
5416 }
5417
5418 static int
ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_svc_rdy_ev_arg * arg)5419 ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
5420 struct wmi_svc_rdy_ev_arg *arg)
5421 {
5422 struct wmi_service_ready_event *ev;
5423 size_t i, n;
5424
5425 if (skb->len < sizeof(*ev))
5426 return -EPROTO;
5427
5428 ev = (void *)skb->data;
5429 skb_pull(skb, sizeof(*ev));
5430 arg->min_tx_power = ev->hw_min_tx_power;
5431 arg->max_tx_power = ev->hw_max_tx_power;
5432 arg->ht_cap = ev->ht_cap_info;
5433 arg->vht_cap = ev->vht_cap_info;
5434 arg->vht_supp_mcs = ev->vht_supp_mcs;
5435 arg->sw_ver0 = ev->sw_version;
5436 arg->sw_ver1 = ev->sw_version_1;
5437 arg->phy_capab = ev->phy_capability;
5438 arg->num_rf_chains = ev->num_rf_chains;
5439 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
5440 arg->low_2ghz_chan = ev->hal_reg_capabilities.low_2ghz_chan;
5441 arg->high_2ghz_chan = ev->hal_reg_capabilities.high_2ghz_chan;
5442 arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
5443 arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
5444 arg->num_mem_reqs = ev->num_mem_reqs;
5445 arg->service_map = ev->wmi_service_bitmap;
5446 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5447
5448 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
5449 ARRAY_SIZE(arg->mem_reqs));
5450 for (i = 0; i < n; i++)
5451 arg->mem_reqs[i] = &ev->mem_reqs[i];
5452
5453 if (skb->len <
5454 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
5455 return -EPROTO;
5456
5457 return 0;
5458 }
5459
5460 static int
ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_svc_rdy_ev_arg * arg)5461 ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
5462 struct wmi_svc_rdy_ev_arg *arg)
5463 {
5464 struct wmi_10x_service_ready_event *ev;
5465 int i, n;
5466
5467 if (skb->len < sizeof(*ev))
5468 return -EPROTO;
5469
5470 ev = (void *)skb->data;
5471 skb_pull(skb, sizeof(*ev));
5472 arg->min_tx_power = ev->hw_min_tx_power;
5473 arg->max_tx_power = ev->hw_max_tx_power;
5474 arg->ht_cap = ev->ht_cap_info;
5475 arg->vht_cap = ev->vht_cap_info;
5476 arg->vht_supp_mcs = ev->vht_supp_mcs;
5477 arg->sw_ver0 = ev->sw_version;
5478 arg->phy_capab = ev->phy_capability;
5479 arg->num_rf_chains = ev->num_rf_chains;
5480 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
5481 arg->low_2ghz_chan = ev->hal_reg_capabilities.low_2ghz_chan;
5482 arg->high_2ghz_chan = ev->hal_reg_capabilities.high_2ghz_chan;
5483 arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
5484 arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
5485 arg->num_mem_reqs = ev->num_mem_reqs;
5486 arg->service_map = ev->wmi_service_bitmap;
5487 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5488
5489 /* Deliberately skipping ev->sys_cap_info as WMI and WMI-TLV have
5490 * different values. We would need a translation to handle that,
5491 * but as we don't currently need anything from sys_cap_info from
5492 * WMI interface (only from WMI-TLV) safest it to skip it.
5493 */
5494
5495 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
5496 ARRAY_SIZE(arg->mem_reqs));
5497 for (i = 0; i < n; i++)
5498 arg->mem_reqs[i] = &ev->mem_reqs[i];
5499
5500 if (skb->len <
5501 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
5502 return -EPROTO;
5503
5504 return 0;
5505 }
5506
ath10k_wmi_event_service_ready_work(struct work_struct * work)5507 static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
5508 {
5509 struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work);
5510 struct sk_buff *skb = ar->svc_rdy_skb;
5511 struct wmi_svc_rdy_ev_arg arg = {};
5512 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
5513 int ret;
5514 bool allocated;
5515
5516 if (!skb) {
5517 ath10k_warn(ar, "invalid service ready event skb\n");
5518 return;
5519 }
5520
5521 ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
5522 if (ret) {
5523 ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
5524 return;
5525 }
5526
5527 ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
5528 arg.service_map_len);
5529
5530 ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
5531 ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
5532 ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
5533 ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
5534 ar->vht_supp_mcs = __le32_to_cpu(arg.vht_supp_mcs);
5535 ar->fw_version_major =
5536 (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
5537 ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
5538 ar->fw_version_release =
5539 (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
5540 ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
5541 ar->phy_capability = __le32_to_cpu(arg.phy_capab);
5542 ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
5543 ar->hw_eeprom_rd = __le32_to_cpu(arg.eeprom_rd);
5544 ar->low_2ghz_chan = __le32_to_cpu(arg.low_2ghz_chan);
5545 ar->high_2ghz_chan = __le32_to_cpu(arg.high_2ghz_chan);
5546 ar->low_5ghz_chan = __le32_to_cpu(arg.low_5ghz_chan);
5547 ar->high_5ghz_chan = __le32_to_cpu(arg.high_5ghz_chan);
5548 ar->sys_cap_info = __le32_to_cpu(arg.sys_cap_info);
5549
5550 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
5551 arg.service_map, arg.service_map_len);
5552 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi sys_cap_info 0x%x\n",
5553 ar->sys_cap_info);
5554
5555 if (ar->num_rf_chains > ar->max_spatial_stream) {
5556 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
5557 ar->num_rf_chains, ar->max_spatial_stream);
5558 ar->num_rf_chains = ar->max_spatial_stream;
5559 }
5560
5561 if (!ar->cfg_tx_chainmask) {
5562 ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1;
5563 ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1;
5564 }
5565
5566 if (strlen(ar->hw->wiphy->fw_version) == 0) {
5567 snprintf(ar->hw->wiphy->fw_version,
5568 sizeof(ar->hw->wiphy->fw_version),
5569 "%u.%u.%u.%u",
5570 ar->fw_version_major,
5571 ar->fw_version_minor,
5572 ar->fw_version_release,
5573 ar->fw_version_build);
5574 }
5575
5576 num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
5577 if (num_mem_reqs > WMI_MAX_MEM_REQS) {
5578 ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
5579 num_mem_reqs);
5580 return;
5581 }
5582
5583 if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) {
5584 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
5585 ar->running_fw->fw_file.fw_features))
5586 ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC +
5587 ar->max_num_vdevs;
5588 else
5589 ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS +
5590 ar->max_num_vdevs;
5591
5592 ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX +
5593 ar->max_num_vdevs;
5594 ar->num_tids = ar->num_active_peers * 2;
5595 ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX;
5596 }
5597
5598 /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE
5599 * and WMI_SERVICE_IRAM_TIDS, etc.
5600 */
5601
5602 allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs,
5603 num_mem_reqs);
5604 if (allocated)
5605 goto skip_mem_alloc;
5606
5607 /* Either this event is received during boot time or there is a change
5608 * in memory requirement from firmware when compared to last request.
5609 * Free any old memory and do a fresh allocation based on the current
5610 * memory requirement.
5611 */
5612 ath10k_wmi_free_host_mem(ar);
5613
5614 for (i = 0; i < num_mem_reqs; ++i) {
5615 req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
5616 num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
5617 unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
5618 num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
5619
5620 if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
5621 if (ar->num_active_peers)
5622 num_units = ar->num_active_peers + 1;
5623 else
5624 num_units = ar->max_num_peers + 1;
5625 } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
5626 /* number of units to allocate is number of
5627 * peers, 1 extra for self peer on target
5628 * this needs to be tied, host and target
5629 * can get out of sync
5630 */
5631 num_units = ar->max_num_peers + 1;
5632 } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
5633 num_units = ar->max_num_vdevs + 1;
5634 }
5635
5636 ath10k_dbg(ar, ATH10K_DBG_WMI,
5637 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
5638 req_id,
5639 __le32_to_cpu(arg.mem_reqs[i]->num_units),
5640 num_unit_info,
5641 unit_size,
5642 num_units);
5643
5644 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
5645 unit_size);
5646 if (ret)
5647 return;
5648 }
5649
5650 skip_mem_alloc:
5651 ath10k_dbg(ar, ATH10K_DBG_WMI,
5652 "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_mcs 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x low_2ghz_chan %d high_2ghz_chan %d low_5ghz_chan %d high_5ghz_chan %d num_mem_reqs 0x%08x\n",
5653 __le32_to_cpu(arg.min_tx_power),
5654 __le32_to_cpu(arg.max_tx_power),
5655 __le32_to_cpu(arg.ht_cap),
5656 __le32_to_cpu(arg.vht_cap),
5657 __le32_to_cpu(arg.vht_supp_mcs),
5658 __le32_to_cpu(arg.sw_ver0),
5659 __le32_to_cpu(arg.sw_ver1),
5660 __le32_to_cpu(arg.fw_build),
5661 __le32_to_cpu(arg.phy_capab),
5662 __le32_to_cpu(arg.num_rf_chains),
5663 __le32_to_cpu(arg.eeprom_rd),
5664 __le32_to_cpu(arg.low_2ghz_chan),
5665 __le32_to_cpu(arg.high_2ghz_chan),
5666 __le32_to_cpu(arg.low_5ghz_chan),
5667 __le32_to_cpu(arg.high_5ghz_chan),
5668 __le32_to_cpu(arg.num_mem_reqs));
5669
5670 dev_kfree_skb(skb);
5671 ar->svc_rdy_skb = NULL;
5672 complete(&ar->wmi.service_ready);
5673 }
5674
ath10k_wmi_event_service_ready(struct ath10k * ar,struct sk_buff * skb)5675 void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
5676 {
5677 ar->svc_rdy_skb = skb;
5678 queue_work(ar->workqueue_aux, &ar->svc_rdy_work);
5679 }
5680
ath10k_wmi_op_pull_rdy_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_rdy_ev_arg * arg)5681 static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
5682 struct wmi_rdy_ev_arg *arg)
5683 {
5684 struct wmi_ready_event *ev = (void *)skb->data;
5685
5686 if (skb->len < sizeof(*ev))
5687 return -EPROTO;
5688
5689 skb_pull(skb, sizeof(*ev));
5690 arg->sw_version = ev->sw_version;
5691 arg->abi_version = ev->abi_version;
5692 arg->status = ev->status;
5693 arg->mac_addr = ev->mac_addr.addr;
5694
5695 return 0;
5696 }
5697
ath10k_wmi_op_pull_roam_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_roam_ev_arg * arg)5698 static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb,
5699 struct wmi_roam_ev_arg *arg)
5700 {
5701 struct wmi_roam_ev *ev = (void *)skb->data;
5702
5703 if (skb->len < sizeof(*ev))
5704 return -EPROTO;
5705
5706 skb_pull(skb, sizeof(*ev));
5707 arg->vdev_id = ev->vdev_id;
5708 arg->reason = ev->reason;
5709
5710 return 0;
5711 }
5712
ath10k_wmi_op_pull_echo_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_echo_ev_arg * arg)5713 static int ath10k_wmi_op_pull_echo_ev(struct ath10k *ar,
5714 struct sk_buff *skb,
5715 struct wmi_echo_ev_arg *arg)
5716 {
5717 struct wmi_echo_event *ev = (void *)skb->data;
5718
5719 arg->value = ev->value;
5720
5721 return 0;
5722 }
5723
ath10k_wmi_event_ready(struct ath10k * ar,struct sk_buff * skb)5724 int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
5725 {
5726 struct wmi_rdy_ev_arg arg = {};
5727 int ret;
5728
5729 ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
5730 if (ret) {
5731 ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
5732 return ret;
5733 }
5734
5735 ath10k_dbg(ar, ATH10K_DBG_WMI,
5736 "wmi event ready sw_version 0x%08x abi_version %u mac_addr %pM status %d\n",
5737 __le32_to_cpu(arg.sw_version),
5738 __le32_to_cpu(arg.abi_version),
5739 arg.mac_addr,
5740 __le32_to_cpu(arg.status));
5741
5742 if (is_zero_ether_addr(ar->mac_addr))
5743 ether_addr_copy(ar->mac_addr, arg.mac_addr);
5744 complete(&ar->wmi.unified_ready);
5745 return 0;
5746 }
5747
ath10k_wmi_event_service_available(struct ath10k * ar,struct sk_buff * skb)5748 void ath10k_wmi_event_service_available(struct ath10k *ar, struct sk_buff *skb)
5749 {
5750 int ret;
5751 struct wmi_svc_avail_ev_arg arg = {};
5752
5753 ret = ath10k_wmi_pull_svc_avail(ar, skb, &arg);
5754 if (ret) {
5755 ath10k_warn(ar, "failed to parse service available event: %d\n",
5756 ret);
5757 }
5758
5759 /*
5760 * Initialization of "arg.service_map_ext_valid" to ZERO is necessary
5761 * for the below logic to work.
5762 */
5763 if (arg.service_map_ext_valid)
5764 ath10k_wmi_map_svc_ext(ar, arg.service_map_ext, ar->wmi.svc_map,
5765 __le32_to_cpu(arg.service_map_ext_len));
5766 }
5767
ath10k_wmi_event_temperature(struct ath10k * ar,struct sk_buff * skb)5768 static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
5769 {
5770 const struct wmi_pdev_temperature_event *ev;
5771
5772 ev = (struct wmi_pdev_temperature_event *)skb->data;
5773 if (WARN_ON(skb->len < sizeof(*ev)))
5774 return -EPROTO;
5775
5776 ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
5777 return 0;
5778 }
5779
ath10k_wmi_event_pdev_bss_chan_info(struct ath10k * ar,struct sk_buff * skb)5780 static int ath10k_wmi_event_pdev_bss_chan_info(struct ath10k *ar,
5781 struct sk_buff *skb)
5782 {
5783 struct wmi_pdev_bss_chan_info_event *ev;
5784 struct survey_info *survey;
5785 u64 busy, total, tx, rx, rx_bss;
5786 u32 freq, noise_floor;
5787 u32 cc_freq_hz = ar->hw_params.channel_counters_freq_hz;
5788 int idx;
5789
5790 ev = (struct wmi_pdev_bss_chan_info_event *)skb->data;
5791 if (WARN_ON(skb->len < sizeof(*ev)))
5792 return -EPROTO;
5793
5794 freq = __le32_to_cpu(ev->freq);
5795 noise_floor = __le32_to_cpu(ev->noise_floor);
5796 busy = __le64_to_cpu(ev->cycle_busy);
5797 total = __le64_to_cpu(ev->cycle_total);
5798 tx = __le64_to_cpu(ev->cycle_tx);
5799 rx = __le64_to_cpu(ev->cycle_rx);
5800 rx_bss = __le64_to_cpu(ev->cycle_rx_bss);
5801
5802 ath10k_dbg(ar, ATH10K_DBG_WMI,
5803 "wmi event pdev bss chan info:\n freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
5804 freq, noise_floor, busy, total, tx, rx, rx_bss);
5805
5806 spin_lock_bh(&ar->data_lock);
5807 idx = freq_to_idx(ar, freq);
5808 if (idx >= ARRAY_SIZE(ar->survey)) {
5809 ath10k_warn(ar, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
5810 freq, idx);
5811 goto exit;
5812 }
5813
5814 survey = &ar->survey[idx];
5815
5816 survey->noise = noise_floor;
5817 survey->time = div_u64(total, cc_freq_hz);
5818 survey->time_busy = div_u64(busy, cc_freq_hz);
5819 survey->time_rx = div_u64(rx_bss, cc_freq_hz);
5820 survey->time_tx = div_u64(tx, cc_freq_hz);
5821 survey->filled |= (SURVEY_INFO_NOISE_DBM |
5822 SURVEY_INFO_TIME |
5823 SURVEY_INFO_TIME_BUSY |
5824 SURVEY_INFO_TIME_RX |
5825 SURVEY_INFO_TIME_TX);
5826 exit:
5827 spin_unlock_bh(&ar->data_lock);
5828 complete(&ar->bss_survey_done);
5829 return 0;
5830 }
5831
ath10k_wmi_queue_set_coverage_class_work(struct ath10k * ar)5832 static inline void ath10k_wmi_queue_set_coverage_class_work(struct ath10k *ar)
5833 {
5834 if (ar->hw_params.hw_ops->set_coverage_class) {
5835 spin_lock_bh(&ar->data_lock);
5836
5837 /* This call only ensures that the modified coverage class
5838 * persists in case the firmware sets the registers back to
5839 * their default value. So calling it is only necessary if the
5840 * coverage class has a non-zero value.
5841 */
5842 if (ar->fw_coverage.coverage_class)
5843 queue_work(ar->workqueue, &ar->set_coverage_class_work);
5844
5845 spin_unlock_bh(&ar->data_lock);
5846 }
5847 }
5848
ath10k_wmi_op_rx(struct ath10k * ar,struct sk_buff * skb)5849 static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
5850 {
5851 struct wmi_cmd_hdr *cmd_hdr;
5852 enum wmi_event_id id;
5853
5854 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
5855 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
5856
5857 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
5858 goto out;
5859
5860 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5861
5862 switch (id) {
5863 case WMI_MGMT_RX_EVENTID:
5864 ath10k_wmi_event_mgmt_rx(ar, skb);
5865 /* mgmt_rx() owns the skb now! */
5866 return;
5867 case WMI_SCAN_EVENTID:
5868 ath10k_wmi_event_scan(ar, skb);
5869 ath10k_wmi_queue_set_coverage_class_work(ar);
5870 break;
5871 case WMI_CHAN_INFO_EVENTID:
5872 ath10k_wmi_event_chan_info(ar, skb);
5873 break;
5874 case WMI_ECHO_EVENTID:
5875 ath10k_wmi_event_echo(ar, skb);
5876 break;
5877 case WMI_DEBUG_MESG_EVENTID:
5878 ath10k_wmi_event_debug_mesg(ar, skb);
5879 ath10k_wmi_queue_set_coverage_class_work(ar);
5880 break;
5881 case WMI_UPDATE_STATS_EVENTID:
5882 ath10k_wmi_event_update_stats(ar, skb);
5883 break;
5884 case WMI_VDEV_START_RESP_EVENTID:
5885 ath10k_wmi_event_vdev_start_resp(ar, skb);
5886 ath10k_wmi_queue_set_coverage_class_work(ar);
5887 break;
5888 case WMI_VDEV_STOPPED_EVENTID:
5889 ath10k_wmi_event_vdev_stopped(ar, skb);
5890 ath10k_wmi_queue_set_coverage_class_work(ar);
5891 break;
5892 case WMI_PEER_STA_KICKOUT_EVENTID:
5893 ath10k_wmi_event_peer_sta_kickout(ar, skb);
5894 break;
5895 case WMI_HOST_SWBA_EVENTID:
5896 ath10k_wmi_event_host_swba(ar, skb);
5897 break;
5898 case WMI_TBTTOFFSET_UPDATE_EVENTID:
5899 ath10k_wmi_event_tbttoffset_update(ar, skb);
5900 break;
5901 case WMI_PHYERR_EVENTID:
5902 ath10k_wmi_event_phyerr(ar, skb);
5903 break;
5904 case WMI_ROAM_EVENTID:
5905 ath10k_wmi_event_roam(ar, skb);
5906 ath10k_wmi_queue_set_coverage_class_work(ar);
5907 break;
5908 case WMI_PROFILE_MATCH:
5909 ath10k_wmi_event_profile_match(ar, skb);
5910 break;
5911 case WMI_DEBUG_PRINT_EVENTID:
5912 ath10k_wmi_event_debug_print(ar, skb);
5913 ath10k_wmi_queue_set_coverage_class_work(ar);
5914 break;
5915 case WMI_PDEV_QVIT_EVENTID:
5916 ath10k_wmi_event_pdev_qvit(ar, skb);
5917 break;
5918 case WMI_WLAN_PROFILE_DATA_EVENTID:
5919 ath10k_wmi_event_wlan_profile_data(ar, skb);
5920 break;
5921 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
5922 ath10k_wmi_event_rtt_measurement_report(ar, skb);
5923 break;
5924 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
5925 ath10k_wmi_event_tsf_measurement_report(ar, skb);
5926 break;
5927 case WMI_RTT_ERROR_REPORT_EVENTID:
5928 ath10k_wmi_event_rtt_error_report(ar, skb);
5929 break;
5930 case WMI_WOW_WAKEUP_HOST_EVENTID:
5931 ath10k_wmi_event_wow_wakeup_host(ar, skb);
5932 break;
5933 case WMI_DCS_INTERFERENCE_EVENTID:
5934 ath10k_wmi_event_dcs_interference(ar, skb);
5935 break;
5936 case WMI_PDEV_TPC_CONFIG_EVENTID:
5937 ath10k_wmi_event_pdev_tpc_config(ar, skb);
5938 break;
5939 case WMI_PDEV_FTM_INTG_EVENTID:
5940 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
5941 break;
5942 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
5943 ath10k_wmi_event_gtk_offload_status(ar, skb);
5944 break;
5945 case WMI_GTK_REKEY_FAIL_EVENTID:
5946 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
5947 break;
5948 case WMI_TX_DELBA_COMPLETE_EVENTID:
5949 ath10k_wmi_event_delba_complete(ar, skb);
5950 break;
5951 case WMI_TX_ADDBA_COMPLETE_EVENTID:
5952 ath10k_wmi_event_addba_complete(ar, skb);
5953 break;
5954 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
5955 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
5956 break;
5957 case WMI_SERVICE_READY_EVENTID:
5958 ath10k_wmi_event_service_ready(ar, skb);
5959 return;
5960 case WMI_READY_EVENTID:
5961 ath10k_wmi_event_ready(ar, skb);
5962 ath10k_wmi_queue_set_coverage_class_work(ar);
5963 break;
5964 case WMI_SERVICE_AVAILABLE_EVENTID:
5965 ath10k_wmi_event_service_available(ar, skb);
5966 break;
5967 default:
5968 ath10k_warn(ar, "Unknown eventid: %d\n", id);
5969 break;
5970 }
5971
5972 out:
5973 dev_kfree_skb(skb);
5974 }
5975
ath10k_wmi_10_1_op_rx(struct ath10k * ar,struct sk_buff * skb)5976 static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
5977 {
5978 struct wmi_cmd_hdr *cmd_hdr;
5979 enum wmi_10x_event_id id;
5980 bool consumed;
5981
5982 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
5983 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
5984
5985 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
5986 goto out;
5987
5988 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5989
5990 consumed = ath10k_tm_event_wmi(ar, id, skb);
5991
5992 /* Ready event must be handled normally also in UTF mode so that we
5993 * know the UTF firmware has booted, others we are just bypass WMI
5994 * events to testmode.
5995 */
5996 if (consumed && id != WMI_10X_READY_EVENTID) {
5997 ath10k_dbg(ar, ATH10K_DBG_WMI,
5998 "wmi testmode consumed 0x%x\n", id);
5999 goto out;
6000 }
6001
6002 switch (id) {
6003 case WMI_10X_MGMT_RX_EVENTID:
6004 ath10k_wmi_event_mgmt_rx(ar, skb);
6005 /* mgmt_rx() owns the skb now! */
6006 return;
6007 case WMI_10X_SCAN_EVENTID:
6008 ath10k_wmi_event_scan(ar, skb);
6009 ath10k_wmi_queue_set_coverage_class_work(ar);
6010 break;
6011 case WMI_10X_CHAN_INFO_EVENTID:
6012 ath10k_wmi_event_chan_info(ar, skb);
6013 break;
6014 case WMI_10X_ECHO_EVENTID:
6015 ath10k_wmi_event_echo(ar, skb);
6016 break;
6017 case WMI_10X_DEBUG_MESG_EVENTID:
6018 ath10k_wmi_event_debug_mesg(ar, skb);
6019 ath10k_wmi_queue_set_coverage_class_work(ar);
6020 break;
6021 case WMI_10X_UPDATE_STATS_EVENTID:
6022 ath10k_wmi_event_update_stats(ar, skb);
6023 break;
6024 case WMI_10X_VDEV_START_RESP_EVENTID:
6025 ath10k_wmi_event_vdev_start_resp(ar, skb);
6026 ath10k_wmi_queue_set_coverage_class_work(ar);
6027 break;
6028 case WMI_10X_VDEV_STOPPED_EVENTID:
6029 ath10k_wmi_event_vdev_stopped(ar, skb);
6030 ath10k_wmi_queue_set_coverage_class_work(ar);
6031 break;
6032 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
6033 ath10k_wmi_event_peer_sta_kickout(ar, skb);
6034 break;
6035 case WMI_10X_HOST_SWBA_EVENTID:
6036 ath10k_wmi_event_host_swba(ar, skb);
6037 break;
6038 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
6039 ath10k_wmi_event_tbttoffset_update(ar, skb);
6040 break;
6041 case WMI_10X_PHYERR_EVENTID:
6042 ath10k_wmi_event_phyerr(ar, skb);
6043 break;
6044 case WMI_10X_ROAM_EVENTID:
6045 ath10k_wmi_event_roam(ar, skb);
6046 ath10k_wmi_queue_set_coverage_class_work(ar);
6047 break;
6048 case WMI_10X_PROFILE_MATCH:
6049 ath10k_wmi_event_profile_match(ar, skb);
6050 break;
6051 case WMI_10X_DEBUG_PRINT_EVENTID:
6052 ath10k_wmi_event_debug_print(ar, skb);
6053 ath10k_wmi_queue_set_coverage_class_work(ar);
6054 break;
6055 case WMI_10X_PDEV_QVIT_EVENTID:
6056 ath10k_wmi_event_pdev_qvit(ar, skb);
6057 break;
6058 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
6059 ath10k_wmi_event_wlan_profile_data(ar, skb);
6060 break;
6061 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
6062 ath10k_wmi_event_rtt_measurement_report(ar, skb);
6063 break;
6064 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
6065 ath10k_wmi_event_tsf_measurement_report(ar, skb);
6066 break;
6067 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
6068 ath10k_wmi_event_rtt_error_report(ar, skb);
6069 break;
6070 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
6071 ath10k_wmi_event_wow_wakeup_host(ar, skb);
6072 break;
6073 case WMI_10X_DCS_INTERFERENCE_EVENTID:
6074 ath10k_wmi_event_dcs_interference(ar, skb);
6075 break;
6076 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
6077 ath10k_wmi_event_pdev_tpc_config(ar, skb);
6078 break;
6079 case WMI_10X_INST_RSSI_STATS_EVENTID:
6080 ath10k_wmi_event_inst_rssi_stats(ar, skb);
6081 break;
6082 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
6083 ath10k_wmi_event_vdev_standby_req(ar, skb);
6084 break;
6085 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
6086 ath10k_wmi_event_vdev_resume_req(ar, skb);
6087 break;
6088 case WMI_10X_SERVICE_READY_EVENTID:
6089 ath10k_wmi_event_service_ready(ar, skb);
6090 return;
6091 case WMI_10X_READY_EVENTID:
6092 ath10k_wmi_event_ready(ar, skb);
6093 ath10k_wmi_queue_set_coverage_class_work(ar);
6094 break;
6095 case WMI_10X_PDEV_UTF_EVENTID:
6096 /* ignore utf events */
6097 break;
6098 default:
6099 ath10k_warn(ar, "Unknown eventid: %d\n", id);
6100 break;
6101 }
6102
6103 out:
6104 dev_kfree_skb(skb);
6105 }
6106
ath10k_wmi_10_2_op_rx(struct ath10k * ar,struct sk_buff * skb)6107 static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
6108 {
6109 struct wmi_cmd_hdr *cmd_hdr;
6110 enum wmi_10_2_event_id id;
6111 bool consumed;
6112
6113 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
6114 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
6115
6116 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
6117 goto out;
6118
6119 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
6120
6121 consumed = ath10k_tm_event_wmi(ar, id, skb);
6122
6123 /* Ready event must be handled normally also in UTF mode so that we
6124 * know the UTF firmware has booted, others we are just bypass WMI
6125 * events to testmode.
6126 */
6127 if (consumed && id != WMI_10_2_READY_EVENTID) {
6128 ath10k_dbg(ar, ATH10K_DBG_WMI,
6129 "wmi testmode consumed 0x%x\n", id);
6130 goto out;
6131 }
6132
6133 switch (id) {
6134 case WMI_10_2_MGMT_RX_EVENTID:
6135 ath10k_wmi_event_mgmt_rx(ar, skb);
6136 /* mgmt_rx() owns the skb now! */
6137 return;
6138 case WMI_10_2_SCAN_EVENTID:
6139 ath10k_wmi_event_scan(ar, skb);
6140 ath10k_wmi_queue_set_coverage_class_work(ar);
6141 break;
6142 case WMI_10_2_CHAN_INFO_EVENTID:
6143 ath10k_wmi_event_chan_info(ar, skb);
6144 break;
6145 case WMI_10_2_ECHO_EVENTID:
6146 ath10k_wmi_event_echo(ar, skb);
6147 break;
6148 case WMI_10_2_DEBUG_MESG_EVENTID:
6149 ath10k_wmi_event_debug_mesg(ar, skb);
6150 ath10k_wmi_queue_set_coverage_class_work(ar);
6151 break;
6152 case WMI_10_2_UPDATE_STATS_EVENTID:
6153 ath10k_wmi_event_update_stats(ar, skb);
6154 break;
6155 case WMI_10_2_VDEV_START_RESP_EVENTID:
6156 ath10k_wmi_event_vdev_start_resp(ar, skb);
6157 ath10k_wmi_queue_set_coverage_class_work(ar);
6158 break;
6159 case WMI_10_2_VDEV_STOPPED_EVENTID:
6160 ath10k_wmi_event_vdev_stopped(ar, skb);
6161 ath10k_wmi_queue_set_coverage_class_work(ar);
6162 break;
6163 case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
6164 ath10k_wmi_event_peer_sta_kickout(ar, skb);
6165 break;
6166 case WMI_10_2_HOST_SWBA_EVENTID:
6167 ath10k_wmi_event_host_swba(ar, skb);
6168 break;
6169 case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
6170 ath10k_wmi_event_tbttoffset_update(ar, skb);
6171 break;
6172 case WMI_10_2_PHYERR_EVENTID:
6173 ath10k_wmi_event_phyerr(ar, skb);
6174 break;
6175 case WMI_10_2_ROAM_EVENTID:
6176 ath10k_wmi_event_roam(ar, skb);
6177 ath10k_wmi_queue_set_coverage_class_work(ar);
6178 break;
6179 case WMI_10_2_PROFILE_MATCH:
6180 ath10k_wmi_event_profile_match(ar, skb);
6181 break;
6182 case WMI_10_2_DEBUG_PRINT_EVENTID:
6183 ath10k_wmi_event_debug_print(ar, skb);
6184 ath10k_wmi_queue_set_coverage_class_work(ar);
6185 break;
6186 case WMI_10_2_PDEV_QVIT_EVENTID:
6187 ath10k_wmi_event_pdev_qvit(ar, skb);
6188 break;
6189 case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
6190 ath10k_wmi_event_wlan_profile_data(ar, skb);
6191 break;
6192 case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
6193 ath10k_wmi_event_rtt_measurement_report(ar, skb);
6194 break;
6195 case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
6196 ath10k_wmi_event_tsf_measurement_report(ar, skb);
6197 break;
6198 case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
6199 ath10k_wmi_event_rtt_error_report(ar, skb);
6200 break;
6201 case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
6202 ath10k_wmi_event_wow_wakeup_host(ar, skb);
6203 break;
6204 case WMI_10_2_DCS_INTERFERENCE_EVENTID:
6205 ath10k_wmi_event_dcs_interference(ar, skb);
6206 break;
6207 case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
6208 ath10k_wmi_event_pdev_tpc_config(ar, skb);
6209 break;
6210 case WMI_10_2_INST_RSSI_STATS_EVENTID:
6211 ath10k_wmi_event_inst_rssi_stats(ar, skb);
6212 break;
6213 case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
6214 ath10k_wmi_event_vdev_standby_req(ar, skb);
6215 ath10k_wmi_queue_set_coverage_class_work(ar);
6216 break;
6217 case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
6218 ath10k_wmi_event_vdev_resume_req(ar, skb);
6219 ath10k_wmi_queue_set_coverage_class_work(ar);
6220 break;
6221 case WMI_10_2_SERVICE_READY_EVENTID:
6222 ath10k_wmi_event_service_ready(ar, skb);
6223 return;
6224 case WMI_10_2_READY_EVENTID:
6225 ath10k_wmi_event_ready(ar, skb);
6226 ath10k_wmi_queue_set_coverage_class_work(ar);
6227 break;
6228 case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
6229 ath10k_wmi_event_temperature(ar, skb);
6230 break;
6231 case WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID:
6232 ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
6233 break;
6234 case WMI_10_2_RTT_KEEPALIVE_EVENTID:
6235 case WMI_10_2_GPIO_INPUT_EVENTID:
6236 case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
6237 case WMI_10_2_GENERIC_BUFFER_EVENTID:
6238 case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
6239 case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
6240 case WMI_10_2_WDS_PEER_EVENTID:
6241 ath10k_dbg(ar, ATH10K_DBG_WMI,
6242 "received event id %d not implemented\n", id);
6243 break;
6244 case WMI_10_2_PEER_STA_PS_STATECHG_EVENTID:
6245 ath10k_wmi_event_peer_sta_ps_state_chg(ar, skb);
6246 break;
6247 default:
6248 ath10k_warn(ar, "Unknown eventid: %d\n", id);
6249 break;
6250 }
6251
6252 out:
6253 dev_kfree_skb(skb);
6254 }
6255
ath10k_wmi_10_4_op_rx(struct ath10k * ar,struct sk_buff * skb)6256 static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
6257 {
6258 struct wmi_cmd_hdr *cmd_hdr;
6259 enum wmi_10_4_event_id id;
6260 bool consumed;
6261
6262 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
6263 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
6264
6265 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
6266 goto out;
6267
6268 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
6269
6270 consumed = ath10k_tm_event_wmi(ar, id, skb);
6271
6272 /* Ready event must be handled normally also in UTF mode so that we
6273 * know the UTF firmware has booted, others we are just bypass WMI
6274 * events to testmode.
6275 */
6276 if (consumed && id != WMI_10_4_READY_EVENTID) {
6277 ath10k_dbg(ar, ATH10K_DBG_WMI,
6278 "wmi testmode consumed 0x%x\n", id);
6279 goto out;
6280 }
6281
6282 switch (id) {
6283 case WMI_10_4_MGMT_RX_EVENTID:
6284 ath10k_wmi_event_mgmt_rx(ar, skb);
6285 /* mgmt_rx() owns the skb now! */
6286 return;
6287 case WMI_10_4_ECHO_EVENTID:
6288 ath10k_wmi_event_echo(ar, skb);
6289 break;
6290 case WMI_10_4_DEBUG_MESG_EVENTID:
6291 ath10k_wmi_event_debug_mesg(ar, skb);
6292 ath10k_wmi_queue_set_coverage_class_work(ar);
6293 break;
6294 case WMI_10_4_SERVICE_READY_EVENTID:
6295 ath10k_wmi_event_service_ready(ar, skb);
6296 return;
6297 case WMI_10_4_SCAN_EVENTID:
6298 ath10k_wmi_event_scan(ar, skb);
6299 ath10k_wmi_queue_set_coverage_class_work(ar);
6300 break;
6301 case WMI_10_4_CHAN_INFO_EVENTID:
6302 ath10k_wmi_event_chan_info(ar, skb);
6303 break;
6304 case WMI_10_4_PHYERR_EVENTID:
6305 ath10k_wmi_event_phyerr(ar, skb);
6306 break;
6307 case WMI_10_4_READY_EVENTID:
6308 ath10k_wmi_event_ready(ar, skb);
6309 ath10k_wmi_queue_set_coverage_class_work(ar);
6310 break;
6311 case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
6312 ath10k_wmi_event_peer_sta_kickout(ar, skb);
6313 break;
6314 case WMI_10_4_ROAM_EVENTID:
6315 ath10k_wmi_event_roam(ar, skb);
6316 ath10k_wmi_queue_set_coverage_class_work(ar);
6317 break;
6318 case WMI_10_4_HOST_SWBA_EVENTID:
6319 ath10k_wmi_event_host_swba(ar, skb);
6320 break;
6321 case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID:
6322 ath10k_wmi_event_tbttoffset_update(ar, skb);
6323 break;
6324 case WMI_10_4_DEBUG_PRINT_EVENTID:
6325 ath10k_wmi_event_debug_print(ar, skb);
6326 ath10k_wmi_queue_set_coverage_class_work(ar);
6327 break;
6328 case WMI_10_4_VDEV_START_RESP_EVENTID:
6329 ath10k_wmi_event_vdev_start_resp(ar, skb);
6330 ath10k_wmi_queue_set_coverage_class_work(ar);
6331 break;
6332 case WMI_10_4_VDEV_STOPPED_EVENTID:
6333 ath10k_wmi_event_vdev_stopped(ar, skb);
6334 ath10k_wmi_queue_set_coverage_class_work(ar);
6335 break;
6336 case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
6337 case WMI_10_4_PEER_RATECODE_LIST_EVENTID:
6338 case WMI_10_4_WDS_PEER_EVENTID:
6339 case WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID:
6340 ath10k_dbg(ar, ATH10K_DBG_WMI,
6341 "received event id %d not implemented\n", id);
6342 break;
6343 case WMI_10_4_UPDATE_STATS_EVENTID:
6344 ath10k_wmi_event_update_stats(ar, skb);
6345 break;
6346 case WMI_10_4_PDEV_TEMPERATURE_EVENTID:
6347 ath10k_wmi_event_temperature(ar, skb);
6348 break;
6349 case WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID:
6350 ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
6351 break;
6352 case WMI_10_4_PDEV_TPC_CONFIG_EVENTID:
6353 ath10k_wmi_event_pdev_tpc_config(ar, skb);
6354 break;
6355 case WMI_10_4_TDLS_PEER_EVENTID:
6356 ath10k_wmi_handle_tdls_peer_event(ar, skb);
6357 break;
6358 case WMI_10_4_PDEV_TPC_TABLE_EVENTID:
6359 ath10k_wmi_event_tpc_final_table(ar, skb);
6360 break;
6361 case WMI_10_4_DFS_STATUS_CHECK_EVENTID:
6362 ath10k_wmi_event_dfs_status_check(ar, skb);
6363 break;
6364 case WMI_10_4_PEER_STA_PS_STATECHG_EVENTID:
6365 ath10k_wmi_event_peer_sta_ps_state_chg(ar, skb);
6366 break;
6367 default:
6368 ath10k_warn(ar, "Unknown eventid: %d\n", id);
6369 break;
6370 }
6371
6372 out:
6373 dev_kfree_skb(skb);
6374 }
6375
ath10k_wmi_process_rx(struct ath10k * ar,struct sk_buff * skb)6376 static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
6377 {
6378 int ret;
6379
6380 ret = ath10k_wmi_rx(ar, skb);
6381 if (ret)
6382 ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
6383 }
6384
ath10k_wmi_connect(struct ath10k * ar)6385 int ath10k_wmi_connect(struct ath10k *ar)
6386 {
6387 int status;
6388 struct ath10k_htc_svc_conn_req conn_req;
6389 struct ath10k_htc_svc_conn_resp conn_resp;
6390
6391 memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
6392
6393 memset(&conn_req, 0, sizeof(conn_req));
6394 memset(&conn_resp, 0, sizeof(conn_resp));
6395
6396 /* these fields are the same for all service endpoints */
6397 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
6398 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
6399 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
6400
6401 /* connect to control service */
6402 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
6403
6404 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
6405 if (status) {
6406 ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
6407 status);
6408 return status;
6409 }
6410
6411 ar->wmi.eid = conn_resp.eid;
6412 return 0;
6413 }
6414
6415 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_base_macaddr(struct ath10k * ar,const u8 macaddr[ETH_ALEN])6416 ath10k_wmi_op_gen_pdev_set_base_macaddr(struct ath10k *ar,
6417 const u8 macaddr[ETH_ALEN])
6418 {
6419 struct wmi_pdev_set_base_macaddr_cmd *cmd;
6420 struct sk_buff *skb;
6421
6422 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6423 if (!skb)
6424 return ERR_PTR(-ENOMEM);
6425
6426 cmd = (struct wmi_pdev_set_base_macaddr_cmd *)skb->data;
6427 ether_addr_copy(cmd->mac_addr.addr, macaddr);
6428
6429 ath10k_dbg(ar, ATH10K_DBG_WMI,
6430 "wmi pdev basemac %pM\n", macaddr);
6431 return skb;
6432 }
6433
6434 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_rd(struct ath10k * ar,u16 rd,u16 rd2g,u16 rd5g,u16 ctl2g,u16 ctl5g,enum wmi_dfs_region dfs_reg)6435 ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
6436 u16 ctl2g, u16 ctl5g,
6437 enum wmi_dfs_region dfs_reg)
6438 {
6439 struct wmi_pdev_set_regdomain_cmd *cmd;
6440 struct sk_buff *skb;
6441
6442 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6443 if (!skb)
6444 return ERR_PTR(-ENOMEM);
6445
6446 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
6447 cmd->reg_domain = __cpu_to_le32(rd);
6448 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
6449 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
6450 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
6451 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
6452
6453 ath10k_dbg(ar, ATH10K_DBG_WMI,
6454 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
6455 rd, rd2g, rd5g, ctl2g, ctl5g);
6456 return skb;
6457 }
6458
6459 static struct sk_buff *
ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k * ar,u16 rd,u16 rd2g,u16 rd5g,u16 ctl2g,u16 ctl5g,enum wmi_dfs_region dfs_reg)6460 ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
6461 rd5g, u16 ctl2g, u16 ctl5g,
6462 enum wmi_dfs_region dfs_reg)
6463 {
6464 struct wmi_pdev_set_regdomain_cmd_10x *cmd;
6465 struct sk_buff *skb;
6466
6467 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6468 if (!skb)
6469 return ERR_PTR(-ENOMEM);
6470
6471 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
6472 cmd->reg_domain = __cpu_to_le32(rd);
6473 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
6474 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
6475 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
6476 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
6477 cmd->dfs_domain = __cpu_to_le32(dfs_reg);
6478
6479 ath10k_dbg(ar, ATH10K_DBG_WMI,
6480 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
6481 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
6482 return skb;
6483 }
6484
6485 static struct sk_buff *
ath10k_wmi_op_gen_pdev_suspend(struct ath10k * ar,u32 suspend_opt)6486 ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
6487 {
6488 struct wmi_pdev_suspend_cmd *cmd;
6489 struct sk_buff *skb;
6490
6491 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6492 if (!skb)
6493 return ERR_PTR(-ENOMEM);
6494
6495 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
6496 cmd->suspend_opt = __cpu_to_le32(suspend_opt);
6497
6498 return skb;
6499 }
6500
6501 static struct sk_buff *
ath10k_wmi_op_gen_pdev_resume(struct ath10k * ar)6502 ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
6503 {
6504 struct sk_buff *skb;
6505
6506 skb = ath10k_wmi_alloc_skb(ar, 0);
6507 if (!skb)
6508 return ERR_PTR(-ENOMEM);
6509
6510 return skb;
6511 }
6512
6513 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_param(struct ath10k * ar,u32 id,u32 value)6514 ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
6515 {
6516 struct wmi_pdev_set_param_cmd *cmd;
6517 struct sk_buff *skb;
6518
6519 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
6520 ath10k_warn(ar, "pdev param %d not supported by firmware\n",
6521 id);
6522 return ERR_PTR(-EOPNOTSUPP);
6523 }
6524
6525 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6526 if (!skb)
6527 return ERR_PTR(-ENOMEM);
6528
6529 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
6530 cmd->param_id = __cpu_to_le32(id);
6531 cmd->param_value = __cpu_to_le32(value);
6532
6533 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
6534 id, value);
6535 return skb;
6536 }
6537
ath10k_wmi_put_host_mem_chunks(struct ath10k * ar,struct wmi_host_mem_chunks * chunks)6538 void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
6539 struct wmi_host_mem_chunks *chunks)
6540 {
6541 struct host_memory_chunk *chunk;
6542 int i;
6543
6544 chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
6545
6546 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
6547 chunk = &chunks->items[i];
6548 chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
6549 chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
6550 chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
6551
6552 ath10k_dbg(ar, ATH10K_DBG_WMI,
6553 "wmi chunk %d len %d requested, addr 0x%llx\n",
6554 i,
6555 ar->wmi.mem_chunks[i].len,
6556 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
6557 }
6558 }
6559
ath10k_wmi_op_gen_init(struct ath10k * ar)6560 static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
6561 {
6562 struct wmi_init_cmd *cmd;
6563 struct sk_buff *buf;
6564 struct wmi_resource_config config = {};
6565 u32 val;
6566
6567 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
6568 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
6569 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
6570
6571 config.num_offload_reorder_bufs =
6572 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
6573
6574 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
6575 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
6576 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
6577 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
6578 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
6579 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
6580 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
6581 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
6582 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
6583 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6584 config.scan_max_pending_reqs =
6585 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
6586
6587 config.bmiss_offload_max_vdev =
6588 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
6589
6590 config.roam_offload_max_vdev =
6591 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
6592
6593 config.roam_offload_max_ap_profiles =
6594 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
6595
6596 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
6597 config.num_mcast_table_elems =
6598 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
6599
6600 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
6601 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
6602 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
6603 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
6604 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
6605
6606 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
6607 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
6608
6609 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
6610
6611 config.gtk_offload_max_vdev =
6612 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
6613
6614 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
6615 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
6616
6617 buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6618 ar->wmi.num_mem_chunks));
6619 if (!buf)
6620 return ERR_PTR(-ENOMEM);
6621
6622 cmd = (struct wmi_init_cmd *)buf->data;
6623
6624 memcpy(&cmd->resource_config, &config, sizeof(config));
6625 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6626
6627 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
6628 return buf;
6629 }
6630
ath10k_wmi_10_1_op_gen_init(struct ath10k * ar)6631 static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
6632 {
6633 struct wmi_init_cmd_10x *cmd;
6634 struct sk_buff *buf;
6635 struct wmi_resource_config_10x config = {};
6636 u32 val;
6637
6638 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
6639 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
6640 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
6641 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
6642 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
6643 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
6644 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
6645 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6646 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6647 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6648 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
6649 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6650 config.scan_max_pending_reqs =
6651 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
6652
6653 config.bmiss_offload_max_vdev =
6654 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
6655
6656 config.roam_offload_max_vdev =
6657 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
6658
6659 config.roam_offload_max_ap_profiles =
6660 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
6661
6662 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
6663 config.num_mcast_table_elems =
6664 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
6665
6666 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
6667 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
6668 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
6669 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
6670 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
6671
6672 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
6673 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
6674
6675 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
6676
6677 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
6678 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
6679
6680 buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6681 ar->wmi.num_mem_chunks));
6682 if (!buf)
6683 return ERR_PTR(-ENOMEM);
6684
6685 cmd = (struct wmi_init_cmd_10x *)buf->data;
6686
6687 memcpy(&cmd->resource_config, &config, sizeof(config));
6688 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6689
6690 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
6691 return buf;
6692 }
6693
ath10k_wmi_10_2_op_gen_init(struct ath10k * ar)6694 static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
6695 {
6696 struct wmi_init_cmd_10_2 *cmd;
6697 struct sk_buff *buf;
6698 struct wmi_resource_config_10x config = {};
6699 u32 val, features;
6700
6701 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
6702 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
6703
6704 if (ath10k_peer_stats_enabled(ar)) {
6705 config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS);
6706 config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS);
6707 } else {
6708 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
6709 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
6710 }
6711
6712 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
6713 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
6714 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
6715 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6716 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6717 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6718 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
6719 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6720
6721 config.scan_max_pending_reqs =
6722 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
6723
6724 config.bmiss_offload_max_vdev =
6725 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
6726
6727 config.roam_offload_max_vdev =
6728 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
6729
6730 config.roam_offload_max_ap_profiles =
6731 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
6732
6733 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
6734 config.num_mcast_table_elems =
6735 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
6736
6737 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
6738 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
6739 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
6740 config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
6741 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
6742
6743 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
6744 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
6745
6746 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
6747
6748 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
6749 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
6750
6751 buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6752 ar->wmi.num_mem_chunks));
6753 if (!buf)
6754 return ERR_PTR(-ENOMEM);
6755
6756 cmd = (struct wmi_init_cmd_10_2 *)buf->data;
6757
6758 features = WMI_10_2_RX_BATCH_MODE;
6759
6760 if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) &&
6761 test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map))
6762 features |= WMI_10_2_COEX_GPIO;
6763
6764 if (ath10k_peer_stats_enabled(ar))
6765 features |= WMI_10_2_PEER_STATS;
6766
6767 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
6768 features |= WMI_10_2_BSS_CHAN_INFO;
6769
6770 cmd->resource_config.feature_mask = __cpu_to_le32(features);
6771
6772 memcpy(&cmd->resource_config.common, &config, sizeof(config));
6773 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6774
6775 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
6776 return buf;
6777 }
6778
ath10k_wmi_10_4_op_gen_init(struct ath10k * ar)6779 static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar)
6780 {
6781 struct wmi_init_cmd_10_4 *cmd;
6782 struct sk_buff *buf;
6783 struct wmi_resource_config_10_4 config = {};
6784
6785 config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs);
6786 config.num_peers = __cpu_to_le32(ar->max_num_peers);
6787 config.num_active_peers = __cpu_to_le32(ar->num_active_peers);
6788 config.num_tids = __cpu_to_le32(ar->num_tids);
6789
6790 config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS);
6791 config.num_offload_reorder_buffs =
6792 __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS);
6793 config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS);
6794 config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT);
6795 config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask);
6796 config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask);
6797
6798 config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
6799 config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
6800 config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
6801 config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI);
6802
6803 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6804 config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS);
6805 config.bmiss_offload_max_vdev =
6806 __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV);
6807 config.roam_offload_max_vdev =
6808 __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV);
6809 config.roam_offload_max_ap_profiles =
6810 __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES);
6811 config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS);
6812 config.num_mcast_table_elems =
6813 __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS);
6814
6815 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE);
6816 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE);
6817 config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES);
6818 config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE);
6819 config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM);
6820
6821 config.rx_skip_defrag_timeout_dup_detection_check =
6822 __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK);
6823
6824 config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG);
6825 config.gtk_offload_max_vdev =
6826 __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV);
6827 config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx);
6828 config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS);
6829 config.max_peer_ext_stats =
6830 __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS);
6831 config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP);
6832
6833 config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE);
6834 config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE);
6835 config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE);
6836 config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE);
6837
6838 config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE);
6839 config.tt_support =
6840 __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG);
6841 config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG);
6842 config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG);
6843 config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG);
6844
6845 buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6846 ar->wmi.num_mem_chunks));
6847 if (!buf)
6848 return ERR_PTR(-ENOMEM);
6849
6850 cmd = (struct wmi_init_cmd_10_4 *)buf->data;
6851 memcpy(&cmd->resource_config, &config, sizeof(config));
6852 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6853
6854 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n");
6855 return buf;
6856 }
6857
ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg * arg)6858 int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
6859 {
6860 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
6861 return -EINVAL;
6862 if (arg->n_channels > ARRAY_SIZE(arg->channels))
6863 return -EINVAL;
6864 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
6865 return -EINVAL;
6866 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
6867 return -EINVAL;
6868
6869 return 0;
6870 }
6871
6872 static size_t
ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg * arg)6873 ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
6874 {
6875 int len = 0;
6876
6877 if (arg->ie_len) {
6878 len += sizeof(struct wmi_ie_data);
6879 len += roundup(arg->ie_len, 4);
6880 }
6881
6882 if (arg->n_channels) {
6883 len += sizeof(struct wmi_chan_list);
6884 len += sizeof(__le32) * arg->n_channels;
6885 }
6886
6887 if (arg->n_ssids) {
6888 len += sizeof(struct wmi_ssid_list);
6889 len += sizeof(struct wmi_ssid) * arg->n_ssids;
6890 }
6891
6892 if (arg->n_bssids) {
6893 len += sizeof(struct wmi_bssid_list);
6894 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
6895 }
6896
6897 return len;
6898 }
6899
ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common * cmn,const struct wmi_start_scan_arg * arg)6900 void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
6901 const struct wmi_start_scan_arg *arg)
6902 {
6903 u32 scan_id;
6904 u32 scan_req_id;
6905
6906 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
6907 scan_id |= arg->scan_id;
6908
6909 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
6910 scan_req_id |= arg->scan_req_id;
6911
6912 cmn->scan_id = __cpu_to_le32(scan_id);
6913 cmn->scan_req_id = __cpu_to_le32(scan_req_id);
6914 cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
6915 cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
6916 cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
6917 cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
6918 cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
6919 cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
6920 cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
6921 cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
6922 cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
6923 cmn->idle_time = __cpu_to_le32(arg->idle_time);
6924 cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
6925 cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
6926 cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
6927 }
6928
6929 static void
ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs * tlvs,const struct wmi_start_scan_arg * arg)6930 ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
6931 const struct wmi_start_scan_arg *arg)
6932 {
6933 struct wmi_ie_data *ie;
6934 struct wmi_chan_list *channels;
6935 struct wmi_ssid_list *ssids;
6936 struct wmi_bssid_list *bssids;
6937 void *ptr = tlvs->tlvs;
6938 int i;
6939
6940 if (arg->n_channels) {
6941 channels = ptr;
6942 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
6943 channels->num_chan = __cpu_to_le32(arg->n_channels);
6944
6945 for (i = 0; i < arg->n_channels; i++)
6946 channels->channel_list[i].freq =
6947 __cpu_to_le16(arg->channels[i]);
6948
6949 ptr += sizeof(*channels);
6950 ptr += sizeof(__le32) * arg->n_channels;
6951 }
6952
6953 if (arg->n_ssids) {
6954 ssids = ptr;
6955 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
6956 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
6957
6958 for (i = 0; i < arg->n_ssids; i++) {
6959 ssids->ssids[i].ssid_len =
6960 __cpu_to_le32(arg->ssids[i].len);
6961 memcpy(&ssids->ssids[i].ssid,
6962 arg->ssids[i].ssid,
6963 arg->ssids[i].len);
6964 }
6965
6966 ptr += sizeof(*ssids);
6967 ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
6968 }
6969
6970 if (arg->n_bssids) {
6971 bssids = ptr;
6972 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
6973 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
6974
6975 for (i = 0; i < arg->n_bssids; i++)
6976 ether_addr_copy(bssids->bssid_list[i].addr,
6977 arg->bssids[i].bssid);
6978
6979 ptr += sizeof(*bssids);
6980 ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
6981 }
6982
6983 if (arg->ie_len) {
6984 ie = ptr;
6985 ie->tag = __cpu_to_le32(WMI_IE_TAG);
6986 ie->ie_len = __cpu_to_le32(arg->ie_len);
6987 memcpy(ie->ie_data, arg->ie, arg->ie_len);
6988
6989 ptr += sizeof(*ie);
6990 ptr += roundup(arg->ie_len, 4);
6991 }
6992 }
6993
6994 static struct sk_buff *
ath10k_wmi_op_gen_start_scan(struct ath10k * ar,const struct wmi_start_scan_arg * arg)6995 ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
6996 const struct wmi_start_scan_arg *arg)
6997 {
6998 struct wmi_start_scan_cmd *cmd;
6999 struct sk_buff *skb;
7000 size_t len;
7001 int ret;
7002
7003 ret = ath10k_wmi_start_scan_verify(arg);
7004 if (ret)
7005 return ERR_PTR(ret);
7006
7007 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
7008 skb = ath10k_wmi_alloc_skb(ar, len);
7009 if (!skb)
7010 return ERR_PTR(-ENOMEM);
7011
7012 cmd = (struct wmi_start_scan_cmd *)skb->data;
7013
7014 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
7015 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
7016
7017 cmd->burst_duration_ms = __cpu_to_le32(0);
7018
7019 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
7020 return skb;
7021 }
7022
7023 static struct sk_buff *
ath10k_wmi_10x_op_gen_start_scan(struct ath10k * ar,const struct wmi_start_scan_arg * arg)7024 ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
7025 const struct wmi_start_scan_arg *arg)
7026 {
7027 struct wmi_10x_start_scan_cmd *cmd;
7028 struct sk_buff *skb;
7029 size_t len;
7030 int ret;
7031
7032 ret = ath10k_wmi_start_scan_verify(arg);
7033 if (ret)
7034 return ERR_PTR(ret);
7035
7036 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
7037 skb = ath10k_wmi_alloc_skb(ar, len);
7038 if (!skb)
7039 return ERR_PTR(-ENOMEM);
7040
7041 cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
7042
7043 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
7044 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
7045
7046 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
7047 return skb;
7048 }
7049
ath10k_wmi_start_scan_init(struct ath10k * ar,struct wmi_start_scan_arg * arg)7050 void ath10k_wmi_start_scan_init(struct ath10k *ar,
7051 struct wmi_start_scan_arg *arg)
7052 {
7053 /* setup commonly used values */
7054 arg->scan_req_id = 1;
7055 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
7056 arg->dwell_time_active = 50;
7057 arg->dwell_time_passive = 150;
7058 arg->min_rest_time = 50;
7059 arg->max_rest_time = 500;
7060 arg->repeat_probe_time = 0;
7061 arg->probe_spacing_time = 0;
7062 arg->idle_time = 0;
7063 arg->max_scan_time = 20000;
7064 arg->probe_delay = 5;
7065 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
7066 | WMI_SCAN_EVENT_COMPLETED
7067 | WMI_SCAN_EVENT_BSS_CHANNEL
7068 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
7069 | WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT
7070 | WMI_SCAN_EVENT_DEQUEUED;
7071 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
7072 arg->n_bssids = 1;
7073 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
7074 }
7075
7076 static struct sk_buff *
ath10k_wmi_op_gen_stop_scan(struct ath10k * ar,const struct wmi_stop_scan_arg * arg)7077 ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
7078 const struct wmi_stop_scan_arg *arg)
7079 {
7080 struct wmi_stop_scan_cmd *cmd;
7081 struct sk_buff *skb;
7082 u32 scan_id;
7083 u32 req_id;
7084
7085 if (arg->req_id > 0xFFF)
7086 return ERR_PTR(-EINVAL);
7087 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
7088 return ERR_PTR(-EINVAL);
7089
7090 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7091 if (!skb)
7092 return ERR_PTR(-ENOMEM);
7093
7094 scan_id = arg->u.scan_id;
7095 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
7096
7097 req_id = arg->req_id;
7098 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
7099
7100 cmd = (struct wmi_stop_scan_cmd *)skb->data;
7101 cmd->req_type = __cpu_to_le32(arg->req_type);
7102 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
7103 cmd->scan_id = __cpu_to_le32(scan_id);
7104 cmd->scan_req_id = __cpu_to_le32(req_id);
7105
7106 ath10k_dbg(ar, ATH10K_DBG_WMI,
7107 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
7108 arg->req_id, arg->req_type, arg->u.scan_id);
7109 return skb;
7110 }
7111
7112 static struct sk_buff *
ath10k_wmi_op_gen_vdev_create(struct ath10k * ar,u32 vdev_id,enum wmi_vdev_type type,enum wmi_vdev_subtype subtype,const u8 macaddr[ETH_ALEN])7113 ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
7114 enum wmi_vdev_type type,
7115 enum wmi_vdev_subtype subtype,
7116 const u8 macaddr[ETH_ALEN])
7117 {
7118 struct wmi_vdev_create_cmd *cmd;
7119 struct sk_buff *skb;
7120
7121 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7122 if (!skb)
7123 return ERR_PTR(-ENOMEM);
7124
7125 cmd = (struct wmi_vdev_create_cmd *)skb->data;
7126 cmd->vdev_id = __cpu_to_le32(vdev_id);
7127 cmd->vdev_type = __cpu_to_le32(type);
7128 cmd->vdev_subtype = __cpu_to_le32(subtype);
7129 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
7130
7131 ath10k_dbg(ar, ATH10K_DBG_WMI,
7132 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
7133 vdev_id, type, subtype, macaddr);
7134 return skb;
7135 }
7136
7137 static struct sk_buff *
ath10k_wmi_op_gen_vdev_delete(struct ath10k * ar,u32 vdev_id)7138 ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
7139 {
7140 struct wmi_vdev_delete_cmd *cmd;
7141 struct sk_buff *skb;
7142
7143 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7144 if (!skb)
7145 return ERR_PTR(-ENOMEM);
7146
7147 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
7148 cmd->vdev_id = __cpu_to_le32(vdev_id);
7149
7150 ath10k_dbg(ar, ATH10K_DBG_WMI,
7151 "WMI vdev delete id %d\n", vdev_id);
7152 return skb;
7153 }
7154
7155 static struct sk_buff *
ath10k_wmi_op_gen_vdev_start(struct ath10k * ar,const struct wmi_vdev_start_request_arg * arg,bool restart)7156 ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
7157 const struct wmi_vdev_start_request_arg *arg,
7158 bool restart)
7159 {
7160 struct wmi_vdev_start_request_cmd *cmd;
7161 struct sk_buff *skb;
7162 const char *cmdname;
7163 u32 flags = 0;
7164
7165 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
7166 return ERR_PTR(-EINVAL);
7167 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
7168 return ERR_PTR(-EINVAL);
7169
7170 if (restart)
7171 cmdname = "restart";
7172 else
7173 cmdname = "start";
7174
7175 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7176 if (!skb)
7177 return ERR_PTR(-ENOMEM);
7178
7179 if (arg->hidden_ssid)
7180 flags |= WMI_VDEV_START_HIDDEN_SSID;
7181 if (arg->pmf_enabled)
7182 flags |= WMI_VDEV_START_PMF_ENABLED;
7183
7184 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
7185 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7186 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
7187 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
7188 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
7189 cmd->flags = __cpu_to_le32(flags);
7190 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
7191 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
7192
7193 if (arg->ssid) {
7194 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
7195 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
7196 }
7197
7198 ath10k_wmi_put_wmi_channel(ar, &cmd->chan, &arg->channel);
7199
7200 ath10k_dbg(ar, ATH10K_DBG_WMI,
7201 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
7202 cmdname, arg->vdev_id,
7203 flags, arg->channel.freq, arg->channel.mode,
7204 cmd->chan.flags, arg->channel.max_power);
7205
7206 return skb;
7207 }
7208
7209 static struct sk_buff *
ath10k_wmi_op_gen_vdev_stop(struct ath10k * ar,u32 vdev_id)7210 ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
7211 {
7212 struct wmi_vdev_stop_cmd *cmd;
7213 struct sk_buff *skb;
7214
7215 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7216 if (!skb)
7217 return ERR_PTR(-ENOMEM);
7218
7219 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
7220 cmd->vdev_id = __cpu_to_le32(vdev_id);
7221
7222 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
7223 return skb;
7224 }
7225
7226 static struct sk_buff *
ath10k_wmi_op_gen_vdev_up(struct ath10k * ar,u32 vdev_id,u32 aid,const u8 * bssid)7227 ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
7228 const u8 *bssid)
7229 {
7230 struct wmi_vdev_up_cmd *cmd;
7231 struct sk_buff *skb;
7232
7233 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7234 if (!skb)
7235 return ERR_PTR(-ENOMEM);
7236
7237 cmd = (struct wmi_vdev_up_cmd *)skb->data;
7238 cmd->vdev_id = __cpu_to_le32(vdev_id);
7239 cmd->vdev_assoc_id = __cpu_to_le32(aid);
7240 ether_addr_copy(cmd->vdev_bssid.addr, bssid);
7241
7242 ath10k_dbg(ar, ATH10K_DBG_WMI,
7243 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
7244 vdev_id, aid, bssid);
7245 return skb;
7246 }
7247
7248 static struct sk_buff *
ath10k_wmi_op_gen_vdev_down(struct ath10k * ar,u32 vdev_id)7249 ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
7250 {
7251 struct wmi_vdev_down_cmd *cmd;
7252 struct sk_buff *skb;
7253
7254 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7255 if (!skb)
7256 return ERR_PTR(-ENOMEM);
7257
7258 cmd = (struct wmi_vdev_down_cmd *)skb->data;
7259 cmd->vdev_id = __cpu_to_le32(vdev_id);
7260
7261 ath10k_dbg(ar, ATH10K_DBG_WMI,
7262 "wmi mgmt vdev down id 0x%x\n", vdev_id);
7263 return skb;
7264 }
7265
7266 static struct sk_buff *
ath10k_wmi_op_gen_vdev_set_param(struct ath10k * ar,u32 vdev_id,u32 param_id,u32 param_value)7267 ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
7268 u32 param_id, u32 param_value)
7269 {
7270 struct wmi_vdev_set_param_cmd *cmd;
7271 struct sk_buff *skb;
7272
7273 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
7274 ath10k_dbg(ar, ATH10K_DBG_WMI,
7275 "vdev param %d not supported by firmware\n",
7276 param_id);
7277 return ERR_PTR(-EOPNOTSUPP);
7278 }
7279
7280 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7281 if (!skb)
7282 return ERR_PTR(-ENOMEM);
7283
7284 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
7285 cmd->vdev_id = __cpu_to_le32(vdev_id);
7286 cmd->param_id = __cpu_to_le32(param_id);
7287 cmd->param_value = __cpu_to_le32(param_value);
7288
7289 ath10k_dbg(ar, ATH10K_DBG_WMI,
7290 "wmi vdev id 0x%x set param %d value %d\n",
7291 vdev_id, param_id, param_value);
7292 return skb;
7293 }
7294
7295 static struct sk_buff *
ath10k_wmi_op_gen_vdev_install_key(struct ath10k * ar,const struct wmi_vdev_install_key_arg * arg)7296 ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
7297 const struct wmi_vdev_install_key_arg *arg)
7298 {
7299 struct wmi_vdev_install_key_cmd *cmd;
7300 struct sk_buff *skb;
7301
7302 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
7303 return ERR_PTR(-EINVAL);
7304 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
7305 return ERR_PTR(-EINVAL);
7306
7307 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
7308 if (!skb)
7309 return ERR_PTR(-ENOMEM);
7310
7311 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
7312 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7313 cmd->key_idx = __cpu_to_le32(arg->key_idx);
7314 cmd->key_flags = __cpu_to_le32(arg->key_flags);
7315 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
7316 cmd->key_len = __cpu_to_le32(arg->key_len);
7317 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
7318 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
7319
7320 if (arg->macaddr)
7321 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
7322 if (arg->key_data)
7323 memcpy(cmd->key_data, arg->key_data, arg->key_len);
7324
7325 ath10k_dbg(ar, ATH10K_DBG_WMI,
7326 "wmi vdev install key idx %d cipher %d len %d\n",
7327 arg->key_idx, arg->key_cipher, arg->key_len);
7328 return skb;
7329 }
7330
7331 static struct sk_buff *
ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k * ar,const struct wmi_vdev_spectral_conf_arg * arg)7332 ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
7333 const struct wmi_vdev_spectral_conf_arg *arg)
7334 {
7335 struct wmi_vdev_spectral_conf_cmd *cmd;
7336 struct sk_buff *skb;
7337
7338 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7339 if (!skb)
7340 return ERR_PTR(-ENOMEM);
7341
7342 cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
7343 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7344 cmd->scan_count = __cpu_to_le32(arg->scan_count);
7345 cmd->scan_period = __cpu_to_le32(arg->scan_period);
7346 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
7347 cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
7348 cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
7349 cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
7350 cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
7351 cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
7352 cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
7353 cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
7354 cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
7355 cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
7356 cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
7357 cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
7358 cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
7359 cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
7360 cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
7361 cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
7362
7363 return skb;
7364 }
7365
7366 static struct sk_buff *
ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k * ar,u32 vdev_id,u32 trigger,u32 enable)7367 ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
7368 u32 trigger, u32 enable)
7369 {
7370 struct wmi_vdev_spectral_enable_cmd *cmd;
7371 struct sk_buff *skb;
7372
7373 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7374 if (!skb)
7375 return ERR_PTR(-ENOMEM);
7376
7377 cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
7378 cmd->vdev_id = __cpu_to_le32(vdev_id);
7379 cmd->trigger_cmd = __cpu_to_le32(trigger);
7380 cmd->enable_cmd = __cpu_to_le32(enable);
7381
7382 return skb;
7383 }
7384
7385 static struct sk_buff *
ath10k_wmi_op_gen_peer_create(struct ath10k * ar,u32 vdev_id,const u8 peer_addr[ETH_ALEN],enum wmi_peer_type peer_type)7386 ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
7387 const u8 peer_addr[ETH_ALEN],
7388 enum wmi_peer_type peer_type)
7389 {
7390 struct wmi_peer_create_cmd *cmd;
7391 struct sk_buff *skb;
7392
7393 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7394 if (!skb)
7395 return ERR_PTR(-ENOMEM);
7396
7397 cmd = (struct wmi_peer_create_cmd *)skb->data;
7398 cmd->vdev_id = __cpu_to_le32(vdev_id);
7399 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7400 cmd->peer_type = __cpu_to_le32(peer_type);
7401
7402 ath10k_dbg(ar, ATH10K_DBG_WMI,
7403 "wmi peer create vdev_id %d peer_addr %pM\n",
7404 vdev_id, peer_addr);
7405 return skb;
7406 }
7407
7408 static struct sk_buff *
ath10k_wmi_op_gen_peer_delete(struct ath10k * ar,u32 vdev_id,const u8 peer_addr[ETH_ALEN])7409 ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
7410 const u8 peer_addr[ETH_ALEN])
7411 {
7412 struct wmi_peer_delete_cmd *cmd;
7413 struct sk_buff *skb;
7414
7415 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7416 if (!skb)
7417 return ERR_PTR(-ENOMEM);
7418
7419 cmd = (struct wmi_peer_delete_cmd *)skb->data;
7420 cmd->vdev_id = __cpu_to_le32(vdev_id);
7421 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7422
7423 ath10k_dbg(ar, ATH10K_DBG_WMI,
7424 "wmi peer delete vdev_id %d peer_addr %pM\n",
7425 vdev_id, peer_addr);
7426 return skb;
7427 }
7428
7429 static struct sk_buff *
ath10k_wmi_op_gen_peer_flush(struct ath10k * ar,u32 vdev_id,const u8 peer_addr[ETH_ALEN],u32 tid_bitmap)7430 ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
7431 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
7432 {
7433 struct wmi_peer_flush_tids_cmd *cmd;
7434 struct sk_buff *skb;
7435
7436 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7437 if (!skb)
7438 return ERR_PTR(-ENOMEM);
7439
7440 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
7441 cmd->vdev_id = __cpu_to_le32(vdev_id);
7442 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
7443 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7444
7445 ath10k_dbg(ar, ATH10K_DBG_WMI,
7446 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
7447 vdev_id, peer_addr, tid_bitmap);
7448 return skb;
7449 }
7450
7451 static struct sk_buff *
ath10k_wmi_op_gen_peer_set_param(struct ath10k * ar,u32 vdev_id,const u8 * peer_addr,enum wmi_peer_param param_id,u32 param_value)7452 ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
7453 const u8 *peer_addr,
7454 enum wmi_peer_param param_id,
7455 u32 param_value)
7456 {
7457 struct wmi_peer_set_param_cmd *cmd;
7458 struct sk_buff *skb;
7459
7460 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7461 if (!skb)
7462 return ERR_PTR(-ENOMEM);
7463
7464 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
7465 cmd->vdev_id = __cpu_to_le32(vdev_id);
7466 cmd->param_id = __cpu_to_le32(param_id);
7467 cmd->param_value = __cpu_to_le32(param_value);
7468 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7469
7470 ath10k_dbg(ar, ATH10K_DBG_WMI,
7471 "wmi vdev %d peer 0x%pM set param %d value %d\n",
7472 vdev_id, peer_addr, param_id, param_value);
7473 return skb;
7474 }
7475
7476 static struct sk_buff *
ath10k_wmi_op_gen_set_psmode(struct ath10k * ar,u32 vdev_id,enum wmi_sta_ps_mode psmode)7477 ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
7478 enum wmi_sta_ps_mode psmode)
7479 {
7480 struct wmi_sta_powersave_mode_cmd *cmd;
7481 struct sk_buff *skb;
7482
7483 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7484 if (!skb)
7485 return ERR_PTR(-ENOMEM);
7486
7487 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
7488 cmd->vdev_id = __cpu_to_le32(vdev_id);
7489 cmd->sta_ps_mode = __cpu_to_le32(psmode);
7490
7491 ath10k_dbg(ar, ATH10K_DBG_WMI,
7492 "wmi set powersave id 0x%x mode %d\n",
7493 vdev_id, psmode);
7494 return skb;
7495 }
7496
7497 static struct sk_buff *
ath10k_wmi_op_gen_set_sta_ps(struct ath10k * ar,u32 vdev_id,enum wmi_sta_powersave_param param_id,u32 value)7498 ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
7499 enum wmi_sta_powersave_param param_id,
7500 u32 value)
7501 {
7502 struct wmi_sta_powersave_param_cmd *cmd;
7503 struct sk_buff *skb;
7504
7505 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7506 if (!skb)
7507 return ERR_PTR(-ENOMEM);
7508
7509 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
7510 cmd->vdev_id = __cpu_to_le32(vdev_id);
7511 cmd->param_id = __cpu_to_le32(param_id);
7512 cmd->param_value = __cpu_to_le32(value);
7513
7514 ath10k_dbg(ar, ATH10K_DBG_STA,
7515 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
7516 vdev_id, param_id, value);
7517 return skb;
7518 }
7519
7520 static struct sk_buff *
ath10k_wmi_op_gen_set_ap_ps(struct ath10k * ar,u32 vdev_id,const u8 * mac,enum wmi_ap_ps_peer_param param_id,u32 value)7521 ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
7522 enum wmi_ap_ps_peer_param param_id, u32 value)
7523 {
7524 struct wmi_ap_ps_peer_cmd *cmd;
7525 struct sk_buff *skb;
7526
7527 if (!mac)
7528 return ERR_PTR(-EINVAL);
7529
7530 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7531 if (!skb)
7532 return ERR_PTR(-ENOMEM);
7533
7534 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
7535 cmd->vdev_id = __cpu_to_le32(vdev_id);
7536 cmd->param_id = __cpu_to_le32(param_id);
7537 cmd->param_value = __cpu_to_le32(value);
7538 ether_addr_copy(cmd->peer_macaddr.addr, mac);
7539
7540 ath10k_dbg(ar, ATH10K_DBG_WMI,
7541 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
7542 vdev_id, param_id, value, mac);
7543 return skb;
7544 }
7545
7546 static struct sk_buff *
ath10k_wmi_op_gen_scan_chan_list(struct ath10k * ar,const struct wmi_scan_chan_list_arg * arg)7547 ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
7548 const struct wmi_scan_chan_list_arg *arg)
7549 {
7550 struct wmi_scan_chan_list_cmd *cmd;
7551 struct sk_buff *skb;
7552 struct wmi_channel_arg *ch;
7553 struct wmi_channel *ci;
7554 int i;
7555
7556 skb = ath10k_wmi_alloc_skb(ar, struct_size(cmd, chan_info, arg->n_channels));
7557 if (!skb)
7558 return ERR_PTR(-EINVAL);
7559
7560 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
7561 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
7562
7563 for (i = 0; i < arg->n_channels; i++) {
7564 ch = &arg->channels[i];
7565 ci = &cmd->chan_info[i];
7566
7567 ath10k_wmi_put_wmi_channel(ar, ci, ch);
7568 }
7569
7570 return skb;
7571 }
7572
7573 static void
ath10k_wmi_peer_assoc_fill(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7574 ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
7575 const struct wmi_peer_assoc_complete_arg *arg)
7576 {
7577 struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
7578
7579 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7580 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
7581 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
7582 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
7583 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
7584 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
7585 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
7586 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
7587 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
7588 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
7589 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
7590 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
7591 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
7592
7593 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
7594
7595 cmd->peer_legacy_rates.num_rates =
7596 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
7597 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
7598 arg->peer_legacy_rates.num_rates);
7599
7600 cmd->peer_ht_rates.num_rates =
7601 __cpu_to_le32(arg->peer_ht_rates.num_rates);
7602 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
7603 arg->peer_ht_rates.num_rates);
7604
7605 cmd->peer_vht_rates.rx_max_rate =
7606 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
7607 cmd->peer_vht_rates.rx_mcs_set =
7608 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
7609 cmd->peer_vht_rates.tx_max_rate =
7610 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
7611 cmd->peer_vht_rates.tx_mcs_set =
7612 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
7613 }
7614
7615 static void
ath10k_wmi_peer_assoc_fill_main(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7616 ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
7617 const struct wmi_peer_assoc_complete_arg *arg)
7618 {
7619 struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
7620
7621 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
7622 memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
7623 }
7624
7625 static void
ath10k_wmi_peer_assoc_fill_10_1(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7626 ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
7627 const struct wmi_peer_assoc_complete_arg *arg)
7628 {
7629 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
7630 }
7631
7632 static void
ath10k_wmi_peer_assoc_fill_10_2(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7633 ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
7634 const struct wmi_peer_assoc_complete_arg *arg)
7635 {
7636 struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
7637 int max_mcs, max_nss;
7638 u32 info0;
7639
7640 /* TODO: Is using max values okay with firmware? */
7641 max_mcs = 0xf;
7642 max_nss = 0xf;
7643
7644 info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
7645 SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
7646
7647 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
7648 cmd->info0 = __cpu_to_le32(info0);
7649 }
7650
7651 static void
ath10k_wmi_peer_assoc_fill_10_4(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7652 ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf,
7653 const struct wmi_peer_assoc_complete_arg *arg)
7654 {
7655 struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf;
7656
7657 ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg);
7658 cmd->peer_bw_rxnss_override =
7659 __cpu_to_le32(arg->peer_bw_rxnss_override);
7660 }
7661
7662 static int
ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg * arg)7663 ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
7664 {
7665 if (arg->peer_mpdu_density > 16)
7666 return -EINVAL;
7667 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
7668 return -EINVAL;
7669 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
7670 return -EINVAL;
7671
7672 return 0;
7673 }
7674
7675 static struct sk_buff *
ath10k_wmi_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7676 ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
7677 const struct wmi_peer_assoc_complete_arg *arg)
7678 {
7679 size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
7680 struct sk_buff *skb;
7681 int ret;
7682
7683 ret = ath10k_wmi_peer_assoc_check_arg(arg);
7684 if (ret)
7685 return ERR_PTR(ret);
7686
7687 skb = ath10k_wmi_alloc_skb(ar, len);
7688 if (!skb)
7689 return ERR_PTR(-ENOMEM);
7690
7691 ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
7692
7693 ath10k_dbg(ar, ATH10K_DBG_WMI,
7694 "wmi peer assoc vdev %d addr %pM (%s)\n",
7695 arg->vdev_id, arg->addr,
7696 arg->peer_reassoc ? "reassociate" : "new");
7697 return skb;
7698 }
7699
7700 static struct sk_buff *
ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7701 ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
7702 const struct wmi_peer_assoc_complete_arg *arg)
7703 {
7704 size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
7705 struct sk_buff *skb;
7706 int ret;
7707
7708 ret = ath10k_wmi_peer_assoc_check_arg(arg);
7709 if (ret)
7710 return ERR_PTR(ret);
7711
7712 skb = ath10k_wmi_alloc_skb(ar, len);
7713 if (!skb)
7714 return ERR_PTR(-ENOMEM);
7715
7716 ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
7717
7718 ath10k_dbg(ar, ATH10K_DBG_WMI,
7719 "wmi peer assoc vdev %d addr %pM (%s)\n",
7720 arg->vdev_id, arg->addr,
7721 arg->peer_reassoc ? "reassociate" : "new");
7722 return skb;
7723 }
7724
7725 static struct sk_buff *
ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7726 ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
7727 const struct wmi_peer_assoc_complete_arg *arg)
7728 {
7729 size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
7730 struct sk_buff *skb;
7731 int ret;
7732
7733 ret = ath10k_wmi_peer_assoc_check_arg(arg);
7734 if (ret)
7735 return ERR_PTR(ret);
7736
7737 skb = ath10k_wmi_alloc_skb(ar, len);
7738 if (!skb)
7739 return ERR_PTR(-ENOMEM);
7740
7741 ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
7742
7743 ath10k_dbg(ar, ATH10K_DBG_WMI,
7744 "wmi peer assoc vdev %d addr %pM (%s)\n",
7745 arg->vdev_id, arg->addr,
7746 arg->peer_reassoc ? "reassociate" : "new");
7747 return skb;
7748 }
7749
7750 static struct sk_buff *
ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7751 ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar,
7752 const struct wmi_peer_assoc_complete_arg *arg)
7753 {
7754 size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd);
7755 struct sk_buff *skb;
7756 int ret;
7757
7758 ret = ath10k_wmi_peer_assoc_check_arg(arg);
7759 if (ret)
7760 return ERR_PTR(ret);
7761
7762 skb = ath10k_wmi_alloc_skb(ar, len);
7763 if (!skb)
7764 return ERR_PTR(-ENOMEM);
7765
7766 ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg);
7767
7768 ath10k_dbg(ar, ATH10K_DBG_WMI,
7769 "wmi peer assoc vdev %d addr %pM (%s)\n",
7770 arg->vdev_id, arg->addr,
7771 arg->peer_reassoc ? "reassociate" : "new");
7772 return skb;
7773 }
7774
7775 static struct sk_buff *
ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k * ar)7776 ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
7777 {
7778 struct sk_buff *skb;
7779
7780 skb = ath10k_wmi_alloc_skb(ar, 0);
7781 if (!skb)
7782 return ERR_PTR(-ENOMEM);
7783
7784 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
7785 return skb;
7786 }
7787
7788 static struct sk_buff *
ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k * ar,enum wmi_bss_survey_req_type type)7789 ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k *ar,
7790 enum wmi_bss_survey_req_type type)
7791 {
7792 struct wmi_pdev_chan_info_req_cmd *cmd;
7793 struct sk_buff *skb;
7794
7795 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7796 if (!skb)
7797 return ERR_PTR(-ENOMEM);
7798
7799 cmd = (struct wmi_pdev_chan_info_req_cmd *)skb->data;
7800 cmd->type = __cpu_to_le32(type);
7801
7802 ath10k_dbg(ar, ATH10K_DBG_WMI,
7803 "wmi pdev bss info request type %d\n", type);
7804
7805 return skb;
7806 }
7807
7808 /* This function assumes the beacon is already DMA mapped */
7809 static struct sk_buff *
ath10k_wmi_op_gen_beacon_dma(struct ath10k * ar,u32 vdev_id,const void * bcn,size_t bcn_len,u32 bcn_paddr,bool dtim_zero,bool deliver_cab)7810 ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
7811 size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
7812 bool deliver_cab)
7813 {
7814 struct wmi_bcn_tx_ref_cmd *cmd;
7815 struct sk_buff *skb;
7816 struct ieee80211_hdr *hdr;
7817 u16 fc;
7818
7819 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7820 if (!skb)
7821 return ERR_PTR(-ENOMEM);
7822
7823 hdr = (struct ieee80211_hdr *)bcn;
7824 fc = le16_to_cpu(hdr->frame_control);
7825
7826 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
7827 cmd->vdev_id = __cpu_to_le32(vdev_id);
7828 cmd->data_len = __cpu_to_le32(bcn_len);
7829 cmd->data_ptr = __cpu_to_le32(bcn_paddr);
7830 cmd->msdu_id = 0;
7831 cmd->frame_control = __cpu_to_le32(fc);
7832 cmd->flags = 0;
7833 cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
7834
7835 if (dtim_zero)
7836 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
7837
7838 if (deliver_cab)
7839 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
7840
7841 return skb;
7842 }
7843
ath10k_wmi_set_wmm_param(struct wmi_wmm_params * params,const struct wmi_wmm_params_arg * arg)7844 void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
7845 const struct wmi_wmm_params_arg *arg)
7846 {
7847 params->cwmin = __cpu_to_le32(arg->cwmin);
7848 params->cwmax = __cpu_to_le32(arg->cwmax);
7849 params->aifs = __cpu_to_le32(arg->aifs);
7850 params->txop = __cpu_to_le32(arg->txop);
7851 params->acm = __cpu_to_le32(arg->acm);
7852 params->no_ack = __cpu_to_le32(arg->no_ack);
7853 }
7854
7855 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k * ar,const struct wmi_wmm_params_all_arg * arg)7856 ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
7857 const struct wmi_wmm_params_all_arg *arg)
7858 {
7859 struct wmi_pdev_set_wmm_params *cmd;
7860 struct sk_buff *skb;
7861
7862 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7863 if (!skb)
7864 return ERR_PTR(-ENOMEM);
7865
7866 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
7867 ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
7868 ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
7869 ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
7870 ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
7871
7872 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
7873 return skb;
7874 }
7875
7876 static struct sk_buff *
ath10k_wmi_op_gen_request_stats(struct ath10k * ar,u32 stats_mask)7877 ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
7878 {
7879 struct wmi_request_stats_cmd *cmd;
7880 struct sk_buff *skb;
7881
7882 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7883 if (!skb)
7884 return ERR_PTR(-ENOMEM);
7885
7886 cmd = (struct wmi_request_stats_cmd *)skb->data;
7887 cmd->stats_id = __cpu_to_le32(stats_mask);
7888
7889 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
7890 stats_mask);
7891 return skb;
7892 }
7893
7894 static struct sk_buff *
ath10k_wmi_op_gen_force_fw_hang(struct ath10k * ar,enum wmi_force_fw_hang_type type,u32 delay_ms)7895 ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
7896 enum wmi_force_fw_hang_type type, u32 delay_ms)
7897 {
7898 struct wmi_force_fw_hang_cmd *cmd;
7899 struct sk_buff *skb;
7900
7901 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7902 if (!skb)
7903 return ERR_PTR(-ENOMEM);
7904
7905 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
7906 cmd->type = __cpu_to_le32(type);
7907 cmd->delay_ms = __cpu_to_le32(delay_ms);
7908
7909 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
7910 type, delay_ms);
7911 return skb;
7912 }
7913
7914 static struct sk_buff *
ath10k_wmi_op_gen_dbglog_cfg(struct ath10k * ar,u64 module_enable,u32 log_level)7915 ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
7916 u32 log_level)
7917 {
7918 struct wmi_dbglog_cfg_cmd *cmd;
7919 struct sk_buff *skb;
7920 u32 cfg;
7921
7922 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7923 if (!skb)
7924 return ERR_PTR(-ENOMEM);
7925
7926 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
7927
7928 if (module_enable) {
7929 cfg = SM(log_level,
7930 ATH10K_DBGLOG_CFG_LOG_LVL);
7931 } else {
7932 /* set back defaults, all modules with WARN level */
7933 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
7934 ATH10K_DBGLOG_CFG_LOG_LVL);
7935 module_enable = ~0;
7936 }
7937
7938 cmd->module_enable = __cpu_to_le32(module_enable);
7939 cmd->module_valid = __cpu_to_le32(~0);
7940 cmd->config_enable = __cpu_to_le32(cfg);
7941 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
7942
7943 ath10k_dbg(ar, ATH10K_DBG_WMI,
7944 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
7945 __le32_to_cpu(cmd->module_enable),
7946 __le32_to_cpu(cmd->module_valid),
7947 __le32_to_cpu(cmd->config_enable),
7948 __le32_to_cpu(cmd->config_valid));
7949 return skb;
7950 }
7951
7952 static struct sk_buff *
ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k * ar,u64 module_enable,u32 log_level)7953 ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
7954 u32 log_level)
7955 {
7956 struct wmi_10_4_dbglog_cfg_cmd *cmd;
7957 struct sk_buff *skb;
7958 u32 cfg;
7959
7960 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7961 if (!skb)
7962 return ERR_PTR(-ENOMEM);
7963
7964 cmd = (struct wmi_10_4_dbglog_cfg_cmd *)skb->data;
7965
7966 if (module_enable) {
7967 cfg = SM(log_level,
7968 ATH10K_DBGLOG_CFG_LOG_LVL);
7969 } else {
7970 /* set back defaults, all modules with WARN level */
7971 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
7972 ATH10K_DBGLOG_CFG_LOG_LVL);
7973 module_enable = ~0;
7974 }
7975
7976 cmd->module_enable = __cpu_to_le64(module_enable);
7977 cmd->module_valid = __cpu_to_le64(~0);
7978 cmd->config_enable = __cpu_to_le32(cfg);
7979 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
7980
7981 ath10k_dbg(ar, ATH10K_DBG_WMI,
7982 "wmi dbglog cfg modules 0x%016llx 0x%016llx config %08x %08x\n",
7983 __le64_to_cpu(cmd->module_enable),
7984 __le64_to_cpu(cmd->module_valid),
7985 __le32_to_cpu(cmd->config_enable),
7986 __le32_to_cpu(cmd->config_valid));
7987 return skb;
7988 }
7989
7990 static struct sk_buff *
ath10k_wmi_op_gen_pktlog_enable(struct ath10k * ar,u32 ev_bitmap)7991 ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
7992 {
7993 struct wmi_pdev_pktlog_enable_cmd *cmd;
7994 struct sk_buff *skb;
7995
7996 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7997 if (!skb)
7998 return ERR_PTR(-ENOMEM);
7999
8000 ev_bitmap &= ATH10K_PKTLOG_ANY;
8001
8002 cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
8003 cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
8004
8005 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
8006 ev_bitmap);
8007 return skb;
8008 }
8009
8010 static struct sk_buff *
ath10k_wmi_op_gen_pktlog_disable(struct ath10k * ar)8011 ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
8012 {
8013 struct sk_buff *skb;
8014
8015 skb = ath10k_wmi_alloc_skb(ar, 0);
8016 if (!skb)
8017 return ERR_PTR(-ENOMEM);
8018
8019 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
8020 return skb;
8021 }
8022
8023 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k * ar,u32 period,u32 duration,u32 next_offset,u32 enabled)8024 ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
8025 u32 duration, u32 next_offset,
8026 u32 enabled)
8027 {
8028 struct wmi_pdev_set_quiet_cmd *cmd;
8029 struct sk_buff *skb;
8030
8031 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8032 if (!skb)
8033 return ERR_PTR(-ENOMEM);
8034
8035 cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
8036 cmd->period = __cpu_to_le32(period);
8037 cmd->duration = __cpu_to_le32(duration);
8038 cmd->next_start = __cpu_to_le32(next_offset);
8039 cmd->enabled = __cpu_to_le32(enabled);
8040
8041 ath10k_dbg(ar, ATH10K_DBG_WMI,
8042 "wmi quiet param: period %u duration %u enabled %d\n",
8043 period, duration, enabled);
8044 return skb;
8045 }
8046
8047 static struct sk_buff *
ath10k_wmi_op_gen_addba_clear_resp(struct ath10k * ar,u32 vdev_id,const u8 * mac)8048 ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
8049 const u8 *mac)
8050 {
8051 struct wmi_addba_clear_resp_cmd *cmd;
8052 struct sk_buff *skb;
8053
8054 if (!mac)
8055 return ERR_PTR(-EINVAL);
8056
8057 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8058 if (!skb)
8059 return ERR_PTR(-ENOMEM);
8060
8061 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
8062 cmd->vdev_id = __cpu_to_le32(vdev_id);
8063 ether_addr_copy(cmd->peer_macaddr.addr, mac);
8064
8065 ath10k_dbg(ar, ATH10K_DBG_WMI,
8066 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
8067 vdev_id, mac);
8068 return skb;
8069 }
8070
8071 static struct sk_buff *
ath10k_wmi_op_gen_addba_send(struct ath10k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 buf_size)8072 ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
8073 u32 tid, u32 buf_size)
8074 {
8075 struct wmi_addba_send_cmd *cmd;
8076 struct sk_buff *skb;
8077
8078 if (!mac)
8079 return ERR_PTR(-EINVAL);
8080
8081 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8082 if (!skb)
8083 return ERR_PTR(-ENOMEM);
8084
8085 cmd = (struct wmi_addba_send_cmd *)skb->data;
8086 cmd->vdev_id = __cpu_to_le32(vdev_id);
8087 ether_addr_copy(cmd->peer_macaddr.addr, mac);
8088 cmd->tid = __cpu_to_le32(tid);
8089 cmd->buffersize = __cpu_to_le32(buf_size);
8090
8091 ath10k_dbg(ar, ATH10K_DBG_WMI,
8092 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
8093 vdev_id, mac, tid, buf_size);
8094 return skb;
8095 }
8096
8097 static struct sk_buff *
ath10k_wmi_op_gen_addba_set_resp(struct ath10k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 status)8098 ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
8099 u32 tid, u32 status)
8100 {
8101 struct wmi_addba_setresponse_cmd *cmd;
8102 struct sk_buff *skb;
8103
8104 if (!mac)
8105 return ERR_PTR(-EINVAL);
8106
8107 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8108 if (!skb)
8109 return ERR_PTR(-ENOMEM);
8110
8111 cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
8112 cmd->vdev_id = __cpu_to_le32(vdev_id);
8113 ether_addr_copy(cmd->peer_macaddr.addr, mac);
8114 cmd->tid = __cpu_to_le32(tid);
8115 cmd->statuscode = __cpu_to_le32(status);
8116
8117 ath10k_dbg(ar, ATH10K_DBG_WMI,
8118 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
8119 vdev_id, mac, tid, status);
8120 return skb;
8121 }
8122
8123 static struct sk_buff *
ath10k_wmi_op_gen_delba_send(struct ath10k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 initiator,u32 reason)8124 ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
8125 u32 tid, u32 initiator, u32 reason)
8126 {
8127 struct wmi_delba_send_cmd *cmd;
8128 struct sk_buff *skb;
8129
8130 if (!mac)
8131 return ERR_PTR(-EINVAL);
8132
8133 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8134 if (!skb)
8135 return ERR_PTR(-ENOMEM);
8136
8137 cmd = (struct wmi_delba_send_cmd *)skb->data;
8138 cmd->vdev_id = __cpu_to_le32(vdev_id);
8139 ether_addr_copy(cmd->peer_macaddr.addr, mac);
8140 cmd->tid = __cpu_to_le32(tid);
8141 cmd->initiator = __cpu_to_le32(initiator);
8142 cmd->reasoncode = __cpu_to_le32(reason);
8143
8144 ath10k_dbg(ar, ATH10K_DBG_WMI,
8145 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
8146 vdev_id, mac, tid, initiator, reason);
8147 return skb;
8148 }
8149
8150 static struct sk_buff *
ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k * ar,u32 param)8151 ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param)
8152 {
8153 struct wmi_pdev_get_tpc_config_cmd *cmd;
8154 struct sk_buff *skb;
8155
8156 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8157 if (!skb)
8158 return ERR_PTR(-ENOMEM);
8159
8160 cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data;
8161 cmd->param = __cpu_to_le32(param);
8162
8163 ath10k_dbg(ar, ATH10K_DBG_WMI,
8164 "wmi pdev get tpc config param %d\n", param);
8165 return skb;
8166 }
8167
8168 static void
ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8169 ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8170 char *buf, u32 *length)
8171 {
8172 u32 len = *length;
8173 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8174
8175 len += scnprintf(buf + len, buf_len - len, "\n");
8176 len += scnprintf(buf + len, buf_len - len, "%30s\n",
8177 "ath10k PDEV stats");
8178 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8179 "=================");
8180
8181 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8182 "Channel noise floor", pdev->ch_noise_floor);
8183 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8184 "Channel TX power", pdev->chan_tx_power);
8185 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8186 "TX frame count", pdev->tx_frame_count);
8187 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8188 "RX frame count", pdev->rx_frame_count);
8189 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8190 "RX clear count", pdev->rx_clear_count);
8191 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8192 "Cycle count", pdev->cycle_count);
8193 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8194 "PHY error count", pdev->phy_err_count);
8195
8196 *length = len;
8197 }
8198
8199 static void
ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8200 ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8201 char *buf, u32 *length)
8202 {
8203 u32 len = *length;
8204 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8205
8206 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8207 "RTS bad count", pdev->rts_bad);
8208 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8209 "RTS good count", pdev->rts_good);
8210 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8211 "FCS bad count", pdev->fcs_bad);
8212 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8213 "No beacon count", pdev->no_beacons);
8214 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8215 "MIB int count", pdev->mib_int_count);
8216
8217 len += scnprintf(buf + len, buf_len - len, "\n");
8218 *length = len;
8219 }
8220
8221 static void
ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8222 ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8223 char *buf, u32 *length)
8224 {
8225 u32 len = *length;
8226 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8227
8228 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
8229 "ath10k PDEV TX stats");
8230 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8231 "=================");
8232
8233 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8234 "HTT cookies queued", pdev->comp_queued);
8235 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8236 "HTT cookies disp.", pdev->comp_delivered);
8237 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8238 "MSDU queued", pdev->msdu_enqued);
8239 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8240 "MPDU queued", pdev->mpdu_enqued);
8241 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8242 "MSDUs dropped", pdev->wmm_drop);
8243 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8244 "Local enqued", pdev->local_enqued);
8245 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8246 "Local freed", pdev->local_freed);
8247 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8248 "HW queued", pdev->hw_queued);
8249 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8250 "PPDUs reaped", pdev->hw_reaped);
8251 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8252 "Num underruns", pdev->underrun);
8253 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8254 "PPDUs cleaned", pdev->tx_abort);
8255 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8256 "MPDUs requeued", pdev->mpdus_requeued);
8257 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8258 "Excessive retries", pdev->tx_ko);
8259 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8260 "HW rate", pdev->data_rc);
8261 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8262 "Sched self triggers", pdev->self_triggers);
8263 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8264 "Dropped due to SW retries",
8265 pdev->sw_retry_failure);
8266 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8267 "Illegal rate phy errors",
8268 pdev->illgl_rate_phy_err);
8269 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8270 "Pdev continuous xretry", pdev->pdev_cont_xretry);
8271 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8272 "TX timeout", pdev->pdev_tx_timeout);
8273 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8274 "PDEV resets", pdev->pdev_resets);
8275 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8276 "PHY underrun", pdev->phy_underrun);
8277 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8278 "MPDU is more than txop limit", pdev->txop_ovf);
8279 *length = len;
8280 }
8281
8282 static void
ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8283 ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8284 char *buf, u32 *length)
8285 {
8286 u32 len = *length;
8287 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8288
8289 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
8290 "ath10k PDEV RX stats");
8291 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8292 "=================");
8293
8294 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8295 "Mid PPDU route change",
8296 pdev->mid_ppdu_route_change);
8297 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8298 "Tot. number of statuses", pdev->status_rcvd);
8299 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8300 "Extra frags on rings 0", pdev->r0_frags);
8301 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8302 "Extra frags on rings 1", pdev->r1_frags);
8303 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8304 "Extra frags on rings 2", pdev->r2_frags);
8305 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8306 "Extra frags on rings 3", pdev->r3_frags);
8307 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8308 "MSDUs delivered to HTT", pdev->htt_msdus);
8309 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8310 "MPDUs delivered to HTT", pdev->htt_mpdus);
8311 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8312 "MSDUs delivered to stack", pdev->loc_msdus);
8313 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8314 "MPDUs delivered to stack", pdev->loc_mpdus);
8315 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8316 "Oversized AMSDUs", pdev->oversize_amsdu);
8317 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8318 "PHY errors", pdev->phy_errs);
8319 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8320 "PHY errors drops", pdev->phy_err_drop);
8321 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8322 "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
8323 *length = len;
8324 }
8325
8326 static void
ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev * vdev,char * buf,u32 * length)8327 ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev,
8328 char *buf, u32 *length)
8329 {
8330 u32 len = *length;
8331 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8332 int i;
8333
8334 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8335 "vdev id", vdev->vdev_id);
8336 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8337 "beacon snr", vdev->beacon_snr);
8338 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8339 "data snr", vdev->data_snr);
8340 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8341 "num rx frames", vdev->num_rx_frames);
8342 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8343 "num rts fail", vdev->num_rts_fail);
8344 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8345 "num rts success", vdev->num_rts_success);
8346 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8347 "num rx err", vdev->num_rx_err);
8348 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8349 "num rx discard", vdev->num_rx_discard);
8350 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8351 "num tx not acked", vdev->num_tx_not_acked);
8352
8353 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++)
8354 len += scnprintf(buf + len, buf_len - len,
8355 "%25s [%02d] %u\n",
8356 "num tx frames", i,
8357 vdev->num_tx_frames[i]);
8358
8359 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++)
8360 len += scnprintf(buf + len, buf_len - len,
8361 "%25s [%02d] %u\n",
8362 "num tx frames retries", i,
8363 vdev->num_tx_frames_retries[i]);
8364
8365 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++)
8366 len += scnprintf(buf + len, buf_len - len,
8367 "%25s [%02d] %u\n",
8368 "num tx frames failures", i,
8369 vdev->num_tx_frames_failures[i]);
8370
8371 for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++)
8372 len += scnprintf(buf + len, buf_len - len,
8373 "%25s [%02d] 0x%08x\n",
8374 "tx rate history", i,
8375 vdev->tx_rate_history[i]);
8376
8377 for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++)
8378 len += scnprintf(buf + len, buf_len - len,
8379 "%25s [%02d] %u\n",
8380 "beacon rssi history", i,
8381 vdev->beacon_rssi_history[i]);
8382
8383 len += scnprintf(buf + len, buf_len - len, "\n");
8384 *length = len;
8385 }
8386
8387 static void
ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer * peer,char * buf,u32 * length,bool extended_peer)8388 ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer,
8389 char *buf, u32 *length, bool extended_peer)
8390 {
8391 u32 len = *length;
8392 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8393
8394 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
8395 "Peer MAC address", peer->peer_macaddr);
8396 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8397 "Peer RSSI", peer->peer_rssi);
8398 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8399 "Peer TX rate", peer->peer_tx_rate);
8400 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8401 "Peer RX rate", peer->peer_rx_rate);
8402 if (!extended_peer)
8403 len += scnprintf(buf + len, buf_len - len, "%30s %llu\n",
8404 "Peer RX duration", peer->rx_duration);
8405
8406 len += scnprintf(buf + len, buf_len - len, "\n");
8407 *length = len;
8408 }
8409
8410 static void
ath10k_wmi_fw_extd_peer_stats_fill(const struct ath10k_fw_extd_stats_peer * peer,char * buf,u32 * length)8411 ath10k_wmi_fw_extd_peer_stats_fill(const struct ath10k_fw_extd_stats_peer *peer,
8412 char *buf, u32 *length)
8413 {
8414 u32 len = *length;
8415 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8416
8417 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
8418 "Peer MAC address", peer->peer_macaddr);
8419 len += scnprintf(buf + len, buf_len - len, "%30s %llu\n",
8420 "Peer RX duration", peer->rx_duration);
8421 }
8422
ath10k_wmi_main_op_fw_stats_fill(struct ath10k * ar,struct ath10k_fw_stats * fw_stats,char * buf)8423 void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
8424 struct ath10k_fw_stats *fw_stats,
8425 char *buf)
8426 {
8427 u32 len = 0;
8428 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8429 const struct ath10k_fw_stats_pdev *pdev;
8430 const struct ath10k_fw_stats_vdev *vdev;
8431 const struct ath10k_fw_stats_peer *peer;
8432 size_t num_peers;
8433 size_t num_vdevs;
8434
8435 spin_lock_bh(&ar->data_lock);
8436
8437 pdev = list_first_entry_or_null(&fw_stats->pdevs,
8438 struct ath10k_fw_stats_pdev, list);
8439 if (!pdev) {
8440 ath10k_warn(ar, "failed to get pdev stats\n");
8441 goto unlock;
8442 }
8443
8444 num_peers = list_count_nodes(&fw_stats->peers);
8445 num_vdevs = list_count_nodes(&fw_stats->vdevs);
8446
8447 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
8448 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
8449 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
8450
8451 len += scnprintf(buf + len, buf_len - len, "\n");
8452 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8453 "ath10k VDEV stats", num_vdevs);
8454 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8455 "=================");
8456
8457 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
8458 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
8459 }
8460
8461 len += scnprintf(buf + len, buf_len - len, "\n");
8462 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8463 "ath10k PEER stats", num_peers);
8464 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8465 "=================");
8466
8467 list_for_each_entry(peer, &fw_stats->peers, list) {
8468 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len,
8469 fw_stats->extended);
8470 }
8471
8472 unlock:
8473 spin_unlock_bh(&ar->data_lock);
8474
8475 if (len >= buf_len)
8476 buf[len - 1] = 0;
8477 else
8478 buf[len] = 0;
8479 }
8480
ath10k_wmi_10x_op_fw_stats_fill(struct ath10k * ar,struct ath10k_fw_stats * fw_stats,char * buf)8481 void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
8482 struct ath10k_fw_stats *fw_stats,
8483 char *buf)
8484 {
8485 unsigned int len = 0;
8486 unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE;
8487 const struct ath10k_fw_stats_pdev *pdev;
8488 const struct ath10k_fw_stats_vdev *vdev;
8489 const struct ath10k_fw_stats_peer *peer;
8490 size_t num_peers;
8491 size_t num_vdevs;
8492
8493 spin_lock_bh(&ar->data_lock);
8494
8495 pdev = list_first_entry_or_null(&fw_stats->pdevs,
8496 struct ath10k_fw_stats_pdev, list);
8497 if (!pdev) {
8498 ath10k_warn(ar, "failed to get pdev stats\n");
8499 goto unlock;
8500 }
8501
8502 num_peers = list_count_nodes(&fw_stats->peers);
8503 num_vdevs = list_count_nodes(&fw_stats->vdevs);
8504
8505 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
8506 ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
8507 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
8508 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
8509
8510 len += scnprintf(buf + len, buf_len - len, "\n");
8511 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8512 "ath10k VDEV stats", num_vdevs);
8513 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8514 "=================");
8515
8516 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
8517 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
8518 }
8519
8520 len += scnprintf(buf + len, buf_len - len, "\n");
8521 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8522 "ath10k PEER stats", num_peers);
8523 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8524 "=================");
8525
8526 list_for_each_entry(peer, &fw_stats->peers, list) {
8527 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len,
8528 fw_stats->extended);
8529 }
8530
8531 unlock:
8532 spin_unlock_bh(&ar->data_lock);
8533
8534 if (len >= buf_len)
8535 buf[len - 1] = 0;
8536 else
8537 buf[len] = 0;
8538 }
8539
8540 static struct sk_buff *
ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k * ar,u8 enable,u32 detect_level,u32 detect_margin)8541 ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable,
8542 u32 detect_level, u32 detect_margin)
8543 {
8544 struct wmi_pdev_set_adaptive_cca_params *cmd;
8545 struct sk_buff *skb;
8546
8547 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8548 if (!skb)
8549 return ERR_PTR(-ENOMEM);
8550
8551 cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data;
8552 cmd->enable = __cpu_to_le32(enable);
8553 cmd->cca_detect_level = __cpu_to_le32(detect_level);
8554 cmd->cca_detect_margin = __cpu_to_le32(detect_margin);
8555
8556 ath10k_dbg(ar, ATH10K_DBG_WMI,
8557 "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n",
8558 enable, detect_level, detect_margin);
8559 return skb;
8560 }
8561
8562 static void
ath10k_wmi_fw_vdev_stats_extd_fill(const struct ath10k_fw_stats_vdev_extd * vdev,char * buf,u32 * length)8563 ath10k_wmi_fw_vdev_stats_extd_fill(const struct ath10k_fw_stats_vdev_extd *vdev,
8564 char *buf, u32 *length)
8565 {
8566 u32 len = *length;
8567 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8568 u32 val;
8569
8570 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8571 "vdev id", vdev->vdev_id);
8572 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8573 "ppdu aggr count", vdev->ppdu_aggr_cnt);
8574 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8575 "ppdu noack", vdev->ppdu_noack);
8576 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8577 "mpdu queued", vdev->mpdu_queued);
8578 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8579 "ppdu nonaggr count", vdev->ppdu_nonaggr_cnt);
8580 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8581 "mpdu sw requeued", vdev->mpdu_sw_requeued);
8582 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8583 "mpdu success retry", vdev->mpdu_suc_retry);
8584 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8585 "mpdu success multitry", vdev->mpdu_suc_multitry);
8586 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8587 "mpdu fail retry", vdev->mpdu_fail_retry);
8588 val = vdev->tx_ftm_suc;
8589 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8590 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8591 "tx ftm success",
8592 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8593 val = vdev->tx_ftm_suc_retry;
8594 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8595 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8596 "tx ftm success retry",
8597 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8598 val = vdev->tx_ftm_fail;
8599 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8600 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8601 "tx ftm fail",
8602 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8603 val = vdev->rx_ftmr_cnt;
8604 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8605 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8606 "rx ftm request count",
8607 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8608 val = vdev->rx_ftmr_dup_cnt;
8609 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8610 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8611 "rx ftm request dup count",
8612 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8613 val = vdev->rx_iftmr_cnt;
8614 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8615 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8616 "rx initial ftm req count",
8617 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8618 val = vdev->rx_iftmr_dup_cnt;
8619 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8620 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8621 "rx initial ftm req dup cnt",
8622 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8623 len += scnprintf(buf + len, buf_len - len, "\n");
8624
8625 *length = len;
8626 }
8627
ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k * ar,struct ath10k_fw_stats * fw_stats,char * buf)8628 void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
8629 struct ath10k_fw_stats *fw_stats,
8630 char *buf)
8631 {
8632 u32 len = 0;
8633 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8634 const struct ath10k_fw_stats_pdev *pdev;
8635 const struct ath10k_fw_stats_vdev_extd *vdev;
8636 const struct ath10k_fw_stats_peer *peer;
8637 const struct ath10k_fw_extd_stats_peer *extd_peer;
8638 size_t num_peers;
8639 size_t num_vdevs;
8640
8641 spin_lock_bh(&ar->data_lock);
8642
8643 pdev = list_first_entry_or_null(&fw_stats->pdevs,
8644 struct ath10k_fw_stats_pdev, list);
8645 if (!pdev) {
8646 ath10k_warn(ar, "failed to get pdev stats\n");
8647 goto unlock;
8648 }
8649
8650 num_peers = list_count_nodes(&fw_stats->peers);
8651 num_vdevs = list_count_nodes(&fw_stats->vdevs);
8652
8653 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
8654 ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
8655 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
8656
8657 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8658 "HW paused", pdev->hw_paused);
8659 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8660 "Seqs posted", pdev->seq_posted);
8661 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8662 "Seqs failed queueing", pdev->seq_failed_queueing);
8663 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8664 "Seqs completed", pdev->seq_completed);
8665 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8666 "Seqs restarted", pdev->seq_restarted);
8667 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8668 "MU Seqs posted", pdev->mu_seq_posted);
8669 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8670 "MPDUs SW flushed", pdev->mpdus_sw_flush);
8671 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8672 "MPDUs HW filtered", pdev->mpdus_hw_filter);
8673 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8674 "MPDUs truncated", pdev->mpdus_truncated);
8675 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8676 "MPDUs receive no ACK", pdev->mpdus_ack_failed);
8677 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8678 "MPDUs expired", pdev->mpdus_expired);
8679
8680 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
8681 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8682 "Num Rx Overflow errors", pdev->rx_ovfl_errs);
8683
8684 len += scnprintf(buf + len, buf_len - len, "\n");
8685 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8686 "ath10k VDEV stats", num_vdevs);
8687 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8688 "=================");
8689 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
8690 ath10k_wmi_fw_vdev_stats_extd_fill(vdev, buf, &len);
8691 }
8692
8693 len += scnprintf(buf + len, buf_len - len, "\n");
8694 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8695 "ath10k PEER stats", num_peers);
8696 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8697 "=================");
8698
8699 list_for_each_entry(peer, &fw_stats->peers, list) {
8700 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len,
8701 fw_stats->extended);
8702 }
8703
8704 if (fw_stats->extended) {
8705 list_for_each_entry(extd_peer, &fw_stats->peers_extd, list) {
8706 ath10k_wmi_fw_extd_peer_stats_fill(extd_peer, buf,
8707 &len);
8708 }
8709 }
8710
8711 unlock:
8712 spin_unlock_bh(&ar->data_lock);
8713
8714 if (len >= buf_len)
8715 buf[len - 1] = 0;
8716 else
8717 buf[len] = 0;
8718 }
8719
ath10k_wmi_op_get_vdev_subtype(struct ath10k * ar,enum wmi_vdev_subtype subtype)8720 int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
8721 enum wmi_vdev_subtype subtype)
8722 {
8723 switch (subtype) {
8724 case WMI_VDEV_SUBTYPE_NONE:
8725 return WMI_VDEV_SUBTYPE_LEGACY_NONE;
8726 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
8727 return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV;
8728 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
8729 return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI;
8730 case WMI_VDEV_SUBTYPE_P2P_GO:
8731 return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO;
8732 case WMI_VDEV_SUBTYPE_PROXY_STA:
8733 return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA;
8734 case WMI_VDEV_SUBTYPE_MESH_11S:
8735 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
8736 return -ENOTSUPP;
8737 }
8738 return -ENOTSUPP;
8739 }
8740
ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k * ar,enum wmi_vdev_subtype subtype)8741 static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar,
8742 enum wmi_vdev_subtype subtype)
8743 {
8744 switch (subtype) {
8745 case WMI_VDEV_SUBTYPE_NONE:
8746 return WMI_VDEV_SUBTYPE_10_2_4_NONE;
8747 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
8748 return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV;
8749 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
8750 return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI;
8751 case WMI_VDEV_SUBTYPE_P2P_GO:
8752 return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO;
8753 case WMI_VDEV_SUBTYPE_PROXY_STA:
8754 return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA;
8755 case WMI_VDEV_SUBTYPE_MESH_11S:
8756 return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S;
8757 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
8758 return -ENOTSUPP;
8759 }
8760 return -ENOTSUPP;
8761 }
8762
ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k * ar,enum wmi_vdev_subtype subtype)8763 static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar,
8764 enum wmi_vdev_subtype subtype)
8765 {
8766 switch (subtype) {
8767 case WMI_VDEV_SUBTYPE_NONE:
8768 return WMI_VDEV_SUBTYPE_10_4_NONE;
8769 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
8770 return WMI_VDEV_SUBTYPE_10_4_P2P_DEV;
8771 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
8772 return WMI_VDEV_SUBTYPE_10_4_P2P_CLI;
8773 case WMI_VDEV_SUBTYPE_P2P_GO:
8774 return WMI_VDEV_SUBTYPE_10_4_P2P_GO;
8775 case WMI_VDEV_SUBTYPE_PROXY_STA:
8776 return WMI_VDEV_SUBTYPE_10_4_PROXY_STA;
8777 case WMI_VDEV_SUBTYPE_MESH_11S:
8778 return WMI_VDEV_SUBTYPE_10_4_MESH_11S;
8779 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
8780 return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S;
8781 }
8782 return -ENOTSUPP;
8783 }
8784
8785 static struct sk_buff *
ath10k_wmi_10_4_ext_resource_config(struct ath10k * ar,enum wmi_host_platform_type type,u32 fw_feature_bitmap)8786 ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar,
8787 enum wmi_host_platform_type type,
8788 u32 fw_feature_bitmap)
8789 {
8790 struct wmi_ext_resource_config_10_4_cmd *cmd;
8791 struct sk_buff *skb;
8792 u32 num_tdls_sleep_sta = 0;
8793
8794 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8795 if (!skb)
8796 return ERR_PTR(-ENOMEM);
8797
8798 if (test_bit(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, ar->wmi.svc_map))
8799 num_tdls_sleep_sta = TARGET_10_4_NUM_TDLS_SLEEP_STA;
8800
8801 cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data;
8802 cmd->host_platform_config = __cpu_to_le32(type);
8803 cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap);
8804 cmd->wlan_gpio_priority = __cpu_to_le32(ar->coex_gpio_pin);
8805 cmd->coex_version = __cpu_to_le32(WMI_NO_COEX_VERSION_SUPPORT);
8806 cmd->coex_gpio_pin1 = __cpu_to_le32(-1);
8807 cmd->coex_gpio_pin2 = __cpu_to_le32(-1);
8808 cmd->coex_gpio_pin3 = __cpu_to_le32(-1);
8809 cmd->num_tdls_vdevs = __cpu_to_le32(TARGET_10_4_NUM_TDLS_VDEVS);
8810 cmd->num_tdls_conn_table_entries = __cpu_to_le32(20);
8811 cmd->max_tdls_concurrent_sleep_sta = __cpu_to_le32(num_tdls_sleep_sta);
8812 cmd->max_tdls_concurrent_buffer_sta =
8813 __cpu_to_le32(TARGET_10_4_NUM_TDLS_BUFFER_STA);
8814
8815 ath10k_dbg(ar, ATH10K_DBG_WMI,
8816 "wmi ext resource config host type %d firmware feature bitmap %08x\n",
8817 type, fw_feature_bitmap);
8818 return skb;
8819 }
8820
8821 static struct sk_buff *
ath10k_wmi_10_4_gen_update_fw_tdls_state(struct ath10k * ar,u32 vdev_id,enum wmi_tdls_state state)8822 ath10k_wmi_10_4_gen_update_fw_tdls_state(struct ath10k *ar, u32 vdev_id,
8823 enum wmi_tdls_state state)
8824 {
8825 struct wmi_10_4_tdls_set_state_cmd *cmd;
8826 struct sk_buff *skb;
8827 u32 options = 0;
8828
8829 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8830 if (!skb)
8831 return ERR_PTR(-ENOMEM);
8832
8833 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, ar->wmi.svc_map) &&
8834 state == WMI_TDLS_ENABLE_ACTIVE)
8835 state = WMI_TDLS_ENABLE_PASSIVE;
8836
8837 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, ar->wmi.svc_map))
8838 options |= WMI_TDLS_BUFFER_STA_EN;
8839
8840 cmd = (struct wmi_10_4_tdls_set_state_cmd *)skb->data;
8841 cmd->vdev_id = __cpu_to_le32(vdev_id);
8842 cmd->state = __cpu_to_le32(state);
8843 cmd->notification_interval_ms = __cpu_to_le32(5000);
8844 cmd->tx_discovery_threshold = __cpu_to_le32(100);
8845 cmd->tx_teardown_threshold = __cpu_to_le32(5);
8846 cmd->rssi_teardown_threshold = __cpu_to_le32(-75);
8847 cmd->rssi_delta = __cpu_to_le32(-20);
8848 cmd->tdls_options = __cpu_to_le32(options);
8849 cmd->tdls_peer_traffic_ind_window = __cpu_to_le32(2);
8850 cmd->tdls_peer_traffic_response_timeout_ms = __cpu_to_le32(5000);
8851 cmd->tdls_puapsd_mask = __cpu_to_le32(0xf);
8852 cmd->tdls_puapsd_inactivity_time_ms = __cpu_to_le32(0);
8853 cmd->tdls_puapsd_rx_frame_threshold = __cpu_to_le32(10);
8854 cmd->teardown_notification_ms = __cpu_to_le32(10);
8855 cmd->tdls_peer_kickout_threshold = __cpu_to_le32(96);
8856
8857 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi update fw tdls state %d for vdev %i\n",
8858 state, vdev_id);
8859 return skb;
8860 }
8861
ath10k_wmi_prepare_peer_qos(u8 uapsd_queues,u8 sp)8862 static u32 ath10k_wmi_prepare_peer_qos(u8 uapsd_queues, u8 sp)
8863 {
8864 u32 peer_qos = 0;
8865
8866 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO)
8867 peer_qos |= WMI_TDLS_PEER_QOS_AC_VO;
8868 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI)
8869 peer_qos |= WMI_TDLS_PEER_QOS_AC_VI;
8870 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK)
8871 peer_qos |= WMI_TDLS_PEER_QOS_AC_BK;
8872 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE)
8873 peer_qos |= WMI_TDLS_PEER_QOS_AC_BE;
8874
8875 peer_qos |= SM(sp, WMI_TDLS_PEER_SP);
8876
8877 return peer_qos;
8878 }
8879
8880 static struct sk_buff *
ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid(struct ath10k * ar,u32 param)8881 ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid(struct ath10k *ar, u32 param)
8882 {
8883 struct wmi_pdev_get_tpc_table_cmd *cmd;
8884 struct sk_buff *skb;
8885
8886 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8887 if (!skb)
8888 return ERR_PTR(-ENOMEM);
8889
8890 cmd = (struct wmi_pdev_get_tpc_table_cmd *)skb->data;
8891 cmd->param = __cpu_to_le32(param);
8892
8893 ath10k_dbg(ar, ATH10K_DBG_WMI,
8894 "wmi pdev get tpc table param:%d\n", param);
8895 return skb;
8896 }
8897
8898 static struct sk_buff *
ath10k_wmi_10_4_gen_tdls_peer_update(struct ath10k * ar,const struct wmi_tdls_peer_update_cmd_arg * arg,const struct wmi_tdls_peer_capab_arg * cap,const struct wmi_channel_arg * chan_arg)8899 ath10k_wmi_10_4_gen_tdls_peer_update(struct ath10k *ar,
8900 const struct wmi_tdls_peer_update_cmd_arg *arg,
8901 const struct wmi_tdls_peer_capab_arg *cap,
8902 const struct wmi_channel_arg *chan_arg)
8903 {
8904 struct wmi_10_4_tdls_peer_update_cmd *cmd;
8905 struct wmi_tdls_peer_capabilities *peer_cap;
8906 struct wmi_channel *chan;
8907 struct sk_buff *skb;
8908 u32 peer_qos;
8909 int len, chan_len;
8910 int i;
8911
8912 /* tdls peer update cmd has place holder for one channel*/
8913 chan_len = cap->peer_chan_len ? (cap->peer_chan_len - 1) : 0;
8914
8915 len = sizeof(*cmd) + chan_len * sizeof(*chan);
8916
8917 skb = ath10k_wmi_alloc_skb(ar, len);
8918 if (!skb)
8919 return ERR_PTR(-ENOMEM);
8920
8921 memset(skb->data, 0, sizeof(*cmd));
8922
8923 cmd = (struct wmi_10_4_tdls_peer_update_cmd *)skb->data;
8924 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
8925 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
8926 cmd->peer_state = __cpu_to_le32(arg->peer_state);
8927
8928 peer_qos = ath10k_wmi_prepare_peer_qos(cap->peer_uapsd_queues,
8929 cap->peer_max_sp);
8930
8931 peer_cap = &cmd->peer_capab;
8932 peer_cap->peer_qos = __cpu_to_le32(peer_qos);
8933 peer_cap->buff_sta_support = __cpu_to_le32(cap->buff_sta_support);
8934 peer_cap->off_chan_support = __cpu_to_le32(cap->off_chan_support);
8935 peer_cap->peer_curr_operclass = __cpu_to_le32(cap->peer_curr_operclass);
8936 peer_cap->self_curr_operclass = __cpu_to_le32(cap->self_curr_operclass);
8937 peer_cap->peer_chan_len = __cpu_to_le32(cap->peer_chan_len);
8938 peer_cap->peer_operclass_len = __cpu_to_le32(cap->peer_operclass_len);
8939
8940 for (i = 0; i < WMI_TDLS_MAX_SUPP_OPER_CLASSES; i++)
8941 peer_cap->peer_operclass[i] = cap->peer_operclass[i];
8942
8943 peer_cap->is_peer_responder = __cpu_to_le32(cap->is_peer_responder);
8944 peer_cap->pref_offchan_num = __cpu_to_le32(cap->pref_offchan_num);
8945 peer_cap->pref_offchan_bw = __cpu_to_le32(cap->pref_offchan_bw);
8946
8947 for (i = 0; i < cap->peer_chan_len; i++) {
8948 chan = (struct wmi_channel *)&peer_cap->peer_chan_list[i];
8949 ath10k_wmi_put_wmi_channel(ar, chan, &chan_arg[i]);
8950 }
8951
8952 ath10k_dbg(ar, ATH10K_DBG_WMI,
8953 "wmi tdls peer update vdev %i state %d n_chans %u\n",
8954 arg->vdev_id, arg->peer_state, cap->peer_chan_len);
8955 return skb;
8956 }
8957
8958 static struct sk_buff *
ath10k_wmi_10_4_gen_radar_found(struct ath10k * ar,const struct ath10k_radar_found_info * arg)8959 ath10k_wmi_10_4_gen_radar_found(struct ath10k *ar,
8960 const struct ath10k_radar_found_info *arg)
8961 {
8962 struct wmi_radar_found_info *cmd;
8963 struct sk_buff *skb;
8964
8965 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8966 if (!skb)
8967 return ERR_PTR(-ENOMEM);
8968
8969 cmd = (struct wmi_radar_found_info *)skb->data;
8970 cmd->pri_min = __cpu_to_le32(arg->pri_min);
8971 cmd->pri_max = __cpu_to_le32(arg->pri_max);
8972 cmd->width_min = __cpu_to_le32(arg->width_min);
8973 cmd->width_max = __cpu_to_le32(arg->width_max);
8974 cmd->sidx_min = __cpu_to_le32(arg->sidx_min);
8975 cmd->sidx_max = __cpu_to_le32(arg->sidx_max);
8976
8977 ath10k_dbg(ar, ATH10K_DBG_WMI,
8978 "wmi radar found pri_min %d pri_max %d width_min %d width_max %d sidx_min %d sidx_max %d\n",
8979 arg->pri_min, arg->pri_max, arg->width_min,
8980 arg->width_max, arg->sidx_min, arg->sidx_max);
8981 return skb;
8982 }
8983
8984 static struct sk_buff *
ath10k_wmi_10_4_gen_per_peer_per_tid_cfg(struct ath10k * ar,const struct wmi_per_peer_per_tid_cfg_arg * arg)8985 ath10k_wmi_10_4_gen_per_peer_per_tid_cfg(struct ath10k *ar,
8986 const struct wmi_per_peer_per_tid_cfg_arg *arg)
8987 {
8988 struct wmi_peer_per_tid_cfg_cmd *cmd;
8989 struct sk_buff *skb;
8990
8991 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8992 if (!skb)
8993 return ERR_PTR(-ENOMEM);
8994
8995 memset(skb->data, 0, sizeof(*cmd));
8996
8997 cmd = (struct wmi_peer_per_tid_cfg_cmd *)skb->data;
8998 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
8999 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr.addr);
9000 cmd->tid = cpu_to_le32(arg->tid);
9001 cmd->ack_policy = cpu_to_le32(arg->ack_policy);
9002 cmd->aggr_control = cpu_to_le32(arg->aggr_control);
9003 cmd->rate_control = cpu_to_le32(arg->rate_ctrl);
9004 cmd->retry_count = cpu_to_le32(arg->retry_count);
9005 cmd->rcode_flags = cpu_to_le32(arg->rcode_flags);
9006 cmd->ext_tid_cfg_bitmap = cpu_to_le32(arg->ext_tid_cfg_bitmap);
9007 cmd->rtscts_ctrl = cpu_to_le32(arg->rtscts_ctrl);
9008
9009 ath10k_dbg(ar, ATH10K_DBG_WMI,
9010 "wmi noack tid %d vdev id %d ack_policy %d aggr %u rate_ctrl %u rcflag %u retry_count %d rtscts %d ext_tid_cfg_bitmap %d mac_addr %pM\n",
9011 arg->tid, arg->vdev_id, arg->ack_policy, arg->aggr_control,
9012 arg->rate_ctrl, arg->rcode_flags, arg->retry_count,
9013 arg->rtscts_ctrl, arg->ext_tid_cfg_bitmap, arg->peer_macaddr.addr);
9014 return skb;
9015 }
9016
9017 static struct sk_buff *
ath10k_wmi_op_gen_echo(struct ath10k * ar,u32 value)9018 ath10k_wmi_op_gen_echo(struct ath10k *ar, u32 value)
9019 {
9020 struct wmi_echo_cmd *cmd;
9021 struct sk_buff *skb;
9022
9023 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9024 if (!skb)
9025 return ERR_PTR(-ENOMEM);
9026
9027 cmd = (struct wmi_echo_cmd *)skb->data;
9028 cmd->value = cpu_to_le32(value);
9029
9030 ath10k_dbg(ar, ATH10K_DBG_WMI,
9031 "wmi echo value 0x%08x\n", value);
9032 return skb;
9033 }
9034
9035 int
ath10k_wmi_barrier(struct ath10k * ar)9036 ath10k_wmi_barrier(struct ath10k *ar)
9037 {
9038 int ret;
9039 int time_left;
9040
9041 spin_lock_bh(&ar->data_lock);
9042 reinit_completion(&ar->wmi.barrier);
9043 spin_unlock_bh(&ar->data_lock);
9044
9045 ret = ath10k_wmi_echo(ar, ATH10K_WMI_BARRIER_ECHO_ID);
9046 if (ret) {
9047 ath10k_warn(ar, "failed to submit wmi echo: %d\n", ret);
9048 return ret;
9049 }
9050
9051 time_left = wait_for_completion_timeout(&ar->wmi.barrier,
9052 ATH10K_WMI_BARRIER_TIMEOUT_HZ);
9053 if (!time_left)
9054 return -ETIMEDOUT;
9055
9056 return 0;
9057 }
9058
9059 static struct sk_buff *
ath10k_wmi_10_2_4_op_gen_bb_timing(struct ath10k * ar,const struct wmi_bb_timing_cfg_arg * arg)9060 ath10k_wmi_10_2_4_op_gen_bb_timing(struct ath10k *ar,
9061 const struct wmi_bb_timing_cfg_arg *arg)
9062 {
9063 struct wmi_pdev_bb_timing_cfg_cmd *cmd;
9064 struct sk_buff *skb;
9065
9066 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9067 if (!skb)
9068 return ERR_PTR(-ENOMEM);
9069
9070 cmd = (struct wmi_pdev_bb_timing_cfg_cmd *)skb->data;
9071 cmd->bb_tx_timing = __cpu_to_le32(arg->bb_tx_timing);
9072 cmd->bb_xpa_timing = __cpu_to_le32(arg->bb_xpa_timing);
9073
9074 ath10k_dbg(ar, ATH10K_DBG_WMI,
9075 "wmi pdev bb_tx_timing 0x%x bb_xpa_timing 0x%x\n",
9076 arg->bb_tx_timing, arg->bb_xpa_timing);
9077 return skb;
9078 }
9079
9080 static const struct wmi_ops wmi_ops = {
9081 .rx = ath10k_wmi_op_rx,
9082 .map_svc = wmi_main_svc_map,
9083
9084 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9085 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9086 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9087 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9088 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9089 .pull_swba = ath10k_wmi_op_pull_swba_ev,
9090 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9091 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9092 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
9093 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9094 .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
9095 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9096 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9097
9098 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9099 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9100 .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
9101 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9102 .gen_init = ath10k_wmi_op_gen_init,
9103 .gen_start_scan = ath10k_wmi_op_gen_start_scan,
9104 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9105 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9106 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9107 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9108 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9109 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9110 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9111 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9112 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9113 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9114 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9115 /* .gen_vdev_wmm_conf not implemented */
9116 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9117 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9118 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9119 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9120 .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
9121 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9122 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9123 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9124 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9125 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9126 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9127 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9128 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9129 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9130 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9131 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9132 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9133 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9134 /* .gen_pdev_get_temperature not implemented */
9135 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9136 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9137 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9138 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9139 .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
9140 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
9141 .gen_echo = ath10k_wmi_op_gen_echo,
9142 /* .gen_bcn_tmpl not implemented */
9143 /* .gen_prb_tmpl not implemented */
9144 /* .gen_p2p_go_bcn_ie not implemented */
9145 /* .gen_adaptive_qcs not implemented */
9146 /* .gen_pdev_enable_adaptive_cca not implemented */
9147 };
9148
9149 static const struct wmi_ops wmi_10_1_ops = {
9150 .rx = ath10k_wmi_10_1_op_rx,
9151 .map_svc = wmi_10x_svc_map,
9152 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
9153 .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
9154 .gen_init = ath10k_wmi_10_1_op_gen_init,
9155 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9156 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
9157 .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
9158 /* .gen_pdev_get_temperature not implemented */
9159
9160 /* shared with main branch */
9161 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9162 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9163 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9164 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9165 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9166 .pull_swba = ath10k_wmi_op_pull_swba_ev,
9167 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9168 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9169 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9170 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9171 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9172
9173 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9174 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9175 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9176 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9177 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9178 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9179 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9180 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9181 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9182 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9183 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9184 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9185 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9186 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9187 /* .gen_vdev_wmm_conf not implemented */
9188 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9189 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9190 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9191 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9192 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9193 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9194 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9195 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9196 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9197 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9198 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9199 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9200 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9201 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9202 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9203 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9204 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9205 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9206 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9207 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9208 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9209 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
9210 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
9211 .gen_echo = ath10k_wmi_op_gen_echo,
9212 /* .gen_bcn_tmpl not implemented */
9213 /* .gen_prb_tmpl not implemented */
9214 /* .gen_p2p_go_bcn_ie not implemented */
9215 /* .gen_adaptive_qcs not implemented */
9216 /* .gen_pdev_enable_adaptive_cca not implemented */
9217 };
9218
9219 static const struct wmi_ops wmi_10_2_ops = {
9220 .rx = ath10k_wmi_10_2_op_rx,
9221 .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
9222 .gen_init = ath10k_wmi_10_2_op_gen_init,
9223 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
9224 /* .gen_pdev_get_temperature not implemented */
9225
9226 /* shared with 10.1 */
9227 .map_svc = wmi_10x_svc_map,
9228 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
9229 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9230 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
9231 .gen_echo = ath10k_wmi_op_gen_echo,
9232
9233 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9234 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9235 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9236 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9237 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9238 .pull_swba = ath10k_wmi_op_pull_swba_ev,
9239 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9240 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9241 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9242 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9243 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9244
9245 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9246 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9247 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9248 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9249 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9250 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9251 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9252 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9253 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9254 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9255 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9256 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9257 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9258 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9259 /* .gen_vdev_wmm_conf not implemented */
9260 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9261 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9262 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9263 .gen_pdev_set_base_macaddr = ath10k_wmi_op_gen_pdev_set_base_macaddr,
9264 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9265 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9266 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9267 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9268 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9269 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9270 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9271 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9272 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9273 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9274 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9275 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9276 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9277 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9278 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9279 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9280 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9281 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9282 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
9283 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
9284 /* .gen_pdev_enable_adaptive_cca not implemented */
9285 };
9286
9287 static const struct wmi_ops wmi_10_2_4_ops = {
9288 .rx = ath10k_wmi_10_2_op_rx,
9289 .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
9290 .gen_init = ath10k_wmi_10_2_op_gen_init,
9291 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
9292 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
9293 .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
9294
9295 /* shared with 10.1 */
9296 .map_svc = wmi_10x_svc_map,
9297 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
9298 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9299 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
9300 .gen_echo = ath10k_wmi_op_gen_echo,
9301
9302 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9303 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9304 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9305 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9306 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9307 .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev,
9308 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9309 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9310 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9311 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9312 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9313
9314 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9315 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9316 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9317 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9318 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9319 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9320 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9321 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9322 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9323 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9324 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9325 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9326 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9327 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9328 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9329 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9330 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9331 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9332 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9333 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9334 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9335 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9336 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9337 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9338 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9339 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9340 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9341 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9342 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9343 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9344 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9345 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9346 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9347 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9348 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9349 .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
9350 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
9351 .gen_pdev_enable_adaptive_cca =
9352 ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
9353 .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
9354 .gen_bb_timing = ath10k_wmi_10_2_4_op_gen_bb_timing,
9355 /* .gen_bcn_tmpl not implemented */
9356 /* .gen_prb_tmpl not implemented */
9357 /* .gen_p2p_go_bcn_ie not implemented */
9358 /* .gen_adaptive_qcs not implemented */
9359 };
9360
9361 static const struct wmi_ops wmi_10_4_ops = {
9362 .rx = ath10k_wmi_10_4_op_rx,
9363 .map_svc = wmi_10_4_svc_map,
9364
9365 .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats,
9366 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9367 .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev,
9368 .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev,
9369 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9370 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9371 .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
9372 .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
9373 .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
9374 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
9375 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9376 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9377 .pull_dfs_status_ev = ath10k_wmi_10_4_op_pull_dfs_status_ev,
9378 .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
9379
9380 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9381 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9382 .gen_pdev_set_base_macaddr = ath10k_wmi_op_gen_pdev_set_base_macaddr,
9383 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9384 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9385 .gen_init = ath10k_wmi_10_4_op_gen_init,
9386 .gen_start_scan = ath10k_wmi_op_gen_start_scan,
9387 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9388 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9389 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9390 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9391 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9392 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9393 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9394 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9395 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9396 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9397 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9398 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9399 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9400 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9401 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9402 .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc,
9403 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9404 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9405 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9406 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9407 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9408 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9409 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9410 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9411 .gen_dbglog_cfg = ath10k_wmi_10_4_op_gen_dbglog_cfg,
9412 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9413 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9414 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9415 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9416 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9417 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9418 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9419 .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill,
9420 .ext_resource_config = ath10k_wmi_10_4_ext_resource_config,
9421 .gen_update_fw_tdls_state = ath10k_wmi_10_4_gen_update_fw_tdls_state,
9422 .gen_tdls_peer_update = ath10k_wmi_10_4_gen_tdls_peer_update,
9423 .gen_pdev_get_tpc_table_cmdid =
9424 ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid,
9425 .gen_radar_found = ath10k_wmi_10_4_gen_radar_found,
9426 .gen_per_peer_per_tid_cfg = ath10k_wmi_10_4_gen_per_peer_per_tid_cfg,
9427
9428 /* shared with 10.2 */
9429 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9430 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9431 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
9432 .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype,
9433 .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
9434 .gen_echo = ath10k_wmi_op_gen_echo,
9435 .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
9436 };
9437
ath10k_wmi_attach(struct ath10k * ar)9438 int ath10k_wmi_attach(struct ath10k *ar)
9439 {
9440 switch (ar->running_fw->fw_file.wmi_op_version) {
9441 case ATH10K_FW_WMI_OP_VERSION_10_4:
9442 ar->wmi.ops = &wmi_10_4_ops;
9443 ar->wmi.cmd = &wmi_10_4_cmd_map;
9444 ar->wmi.vdev_param = &wmi_10_4_vdev_param_map;
9445 ar->wmi.pdev_param = &wmi_10_4_pdev_param_map;
9446 ar->wmi.peer_param = &wmi_peer_param_map;
9447 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9448 ar->wmi_key_cipher = wmi_key_cipher_suites;
9449 break;
9450 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
9451 ar->wmi.cmd = &wmi_10_2_4_cmd_map;
9452 ar->wmi.ops = &wmi_10_2_4_ops;
9453 ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
9454 ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
9455 ar->wmi.peer_param = &wmi_peer_param_map;
9456 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9457 ar->wmi_key_cipher = wmi_key_cipher_suites;
9458 break;
9459 case ATH10K_FW_WMI_OP_VERSION_10_2:
9460 ar->wmi.cmd = &wmi_10_2_cmd_map;
9461 ar->wmi.ops = &wmi_10_2_ops;
9462 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
9463 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
9464 ar->wmi.peer_param = &wmi_peer_param_map;
9465 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9466 ar->wmi_key_cipher = wmi_key_cipher_suites;
9467 break;
9468 case ATH10K_FW_WMI_OP_VERSION_10_1:
9469 ar->wmi.cmd = &wmi_10x_cmd_map;
9470 ar->wmi.ops = &wmi_10_1_ops;
9471 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
9472 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
9473 ar->wmi.peer_param = &wmi_peer_param_map;
9474 ar->wmi.peer_flags = &wmi_10x_peer_flags_map;
9475 ar->wmi_key_cipher = wmi_key_cipher_suites;
9476 break;
9477 case ATH10K_FW_WMI_OP_VERSION_MAIN:
9478 ar->wmi.cmd = &wmi_cmd_map;
9479 ar->wmi.ops = &wmi_ops;
9480 ar->wmi.vdev_param = &wmi_vdev_param_map;
9481 ar->wmi.pdev_param = &wmi_pdev_param_map;
9482 ar->wmi.peer_param = &wmi_peer_param_map;
9483 ar->wmi.peer_flags = &wmi_peer_flags_map;
9484 ar->wmi_key_cipher = wmi_key_cipher_suites;
9485 break;
9486 case ATH10K_FW_WMI_OP_VERSION_TLV:
9487 ath10k_wmi_tlv_attach(ar);
9488 ar->wmi_key_cipher = wmi_tlv_key_cipher_suites;
9489 break;
9490 case ATH10K_FW_WMI_OP_VERSION_UNSET:
9491 case ATH10K_FW_WMI_OP_VERSION_MAX:
9492 ath10k_err(ar, "unsupported WMI op version: %d\n",
9493 ar->running_fw->fw_file.wmi_op_version);
9494 return -EINVAL;
9495 }
9496
9497 init_completion(&ar->wmi.service_ready);
9498 init_completion(&ar->wmi.unified_ready);
9499 init_completion(&ar->wmi.barrier);
9500 init_completion(&ar->wmi.radar_confirm);
9501
9502 INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work);
9503 INIT_WORK(&ar->radar_confirmation_work,
9504 ath10k_radar_confirmation_work);
9505
9506 if (test_bit(ATH10K_FW_FEATURE_MGMT_TX_BY_REF,
9507 ar->running_fw->fw_file.fw_features)) {
9508 idr_init(&ar->wmi.mgmt_pending_tx);
9509 }
9510
9511 return 0;
9512 }
9513
ath10k_wmi_free_host_mem(struct ath10k * ar)9514 void ath10k_wmi_free_host_mem(struct ath10k *ar)
9515 {
9516 int i;
9517
9518 /* free the host memory chunks requested by firmware */
9519 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
9520 dma_free_coherent(ar->dev,
9521 ar->wmi.mem_chunks[i].len,
9522 ar->wmi.mem_chunks[i].vaddr,
9523 ar->wmi.mem_chunks[i].paddr);
9524 }
9525
9526 ar->wmi.num_mem_chunks = 0;
9527 }
9528
ath10k_wmi_mgmt_tx_clean_up_pending(int msdu_id,void * ptr,void * ctx)9529 static int ath10k_wmi_mgmt_tx_clean_up_pending(int msdu_id, void *ptr,
9530 void *ctx)
9531 {
9532 struct ath10k_mgmt_tx_pkt_addr *pkt_addr = ptr;
9533 struct ath10k *ar = ctx;
9534 struct sk_buff *msdu;
9535
9536 ath10k_dbg(ar, ATH10K_DBG_WMI,
9537 "force cleanup mgmt msdu_id %u\n", msdu_id);
9538
9539 msdu = pkt_addr->vaddr;
9540 dma_unmap_single(ar->dev, pkt_addr->paddr,
9541 msdu->len, DMA_TO_DEVICE);
9542 ieee80211_free_txskb(ar->hw, msdu);
9543
9544 return 0;
9545 }
9546
ath10k_wmi_detach(struct ath10k * ar)9547 void ath10k_wmi_detach(struct ath10k *ar)
9548 {
9549 if (test_bit(ATH10K_FW_FEATURE_MGMT_TX_BY_REF,
9550 ar->running_fw->fw_file.fw_features)) {
9551 spin_lock_bh(&ar->data_lock);
9552 idr_for_each(&ar->wmi.mgmt_pending_tx,
9553 ath10k_wmi_mgmt_tx_clean_up_pending, ar);
9554 idr_destroy(&ar->wmi.mgmt_pending_tx);
9555 spin_unlock_bh(&ar->data_lock);
9556 }
9557
9558 cancel_work_sync(&ar->svc_rdy_work);
9559 dev_kfree_skb(ar->svc_rdy_skb);
9560 }
9561