1 // SPDX-License-Identifier: BSD-3-Clause-Clear
2 /* Copyright (C) 2023 MediaTek Inc.
3 *
4 * Author: Lorenzo Bianconi <lorenzo@kernel.org>
5 */
6
7 #include <linux/kernel.h>
8 #include <linux/module.h>
9 #include <linux/usb.h>
10 #if defined(__FreeBSD__)
11 #include <linux/delay.h>
12 #endif
13
14 #include "mt792x.h"
15 #include "mt76_connac2_mac.h"
16
mt792xu_rr(struct mt76_dev * dev,u32 addr)17 u32 mt792xu_rr(struct mt76_dev *dev, u32 addr)
18 {
19 u32 ret;
20
21 mutex_lock(&dev->usb.usb_ctrl_mtx);
22 ret = ___mt76u_rr(dev, MT_VEND_READ_EXT,
23 USB_DIR_IN | MT_USB_TYPE_VENDOR, addr);
24 mutex_unlock(&dev->usb.usb_ctrl_mtx);
25
26 return ret;
27 }
28 EXPORT_SYMBOL_GPL(mt792xu_rr);
29
mt792xu_wr(struct mt76_dev * dev,u32 addr,u32 val)30 void mt792xu_wr(struct mt76_dev *dev, u32 addr, u32 val)
31 {
32 mutex_lock(&dev->usb.usb_ctrl_mtx);
33 ___mt76u_wr(dev, MT_VEND_WRITE_EXT,
34 USB_DIR_OUT | MT_USB_TYPE_VENDOR, addr, val);
35 mutex_unlock(&dev->usb.usb_ctrl_mtx);
36 }
37 EXPORT_SYMBOL_GPL(mt792xu_wr);
38
mt792xu_rmw(struct mt76_dev * dev,u32 addr,u32 mask,u32 val)39 u32 mt792xu_rmw(struct mt76_dev *dev, u32 addr, u32 mask, u32 val)
40 {
41 mutex_lock(&dev->usb.usb_ctrl_mtx);
42 val |= ___mt76u_rr(dev, MT_VEND_READ_EXT,
43 USB_DIR_IN | MT_USB_TYPE_VENDOR, addr) & ~mask;
44 ___mt76u_wr(dev, MT_VEND_WRITE_EXT,
45 USB_DIR_OUT | MT_USB_TYPE_VENDOR, addr, val);
46 mutex_unlock(&dev->usb.usb_ctrl_mtx);
47
48 return val;
49 }
50 EXPORT_SYMBOL_GPL(mt792xu_rmw);
51
mt792xu_copy(struct mt76_dev * dev,u32 offset,const void * data,int len)52 void mt792xu_copy(struct mt76_dev *dev, u32 offset, const void *data, int len)
53 {
54 struct mt76_usb *usb = &dev->usb;
55 int ret, i = 0, batch_len;
56 const u8 *val = data;
57
58 len = round_up(len, 4);
59
60 mutex_lock(&usb->usb_ctrl_mtx);
61 while (i < len) {
62 batch_len = min_t(int, usb->data_len, len - i);
63 memcpy(usb->data, val + i, batch_len);
64 ret = __mt76u_vendor_request(dev, MT_VEND_WRITE_EXT,
65 USB_DIR_OUT | MT_USB_TYPE_VENDOR,
66 (offset + i) >> 16, offset + i,
67 usb->data, batch_len);
68 if (ret < 0)
69 break;
70
71 i += batch_len;
72 }
73 mutex_unlock(&usb->usb_ctrl_mtx);
74 }
75 EXPORT_SYMBOL_GPL(mt792xu_copy);
76
mt792xu_mcu_power_on(struct mt792x_dev * dev)77 int mt792xu_mcu_power_on(struct mt792x_dev *dev)
78 {
79 int ret;
80
81 ret = mt76u_vendor_request(&dev->mt76, MT_VEND_POWER_ON,
82 USB_DIR_OUT | MT_USB_TYPE_VENDOR,
83 0x0, 0x1, NULL, 0);
84 if (ret)
85 return ret;
86
87 if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_PWR_ON,
88 MT_TOP_MISC2_FW_PWR_ON, 500)) {
89 dev_err(dev->mt76.dev, "Timeout for power on\n");
90 ret = -EIO;
91 }
92
93 return ret;
94 }
95 EXPORT_SYMBOL_GPL(mt792xu_mcu_power_on);
96
mt792xu_cleanup(struct mt792x_dev * dev)97 static void mt792xu_cleanup(struct mt792x_dev *dev)
98 {
99 clear_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
100 mt792xu_wfsys_reset(dev);
101 skb_queue_purge(&dev->mt76.mcu.res_q);
102 mt76u_queues_deinit(&dev->mt76);
103 }
104
mt792xu_uhw_rr(struct mt76_dev * dev,u32 addr)105 static u32 mt792xu_uhw_rr(struct mt76_dev *dev, u32 addr)
106 {
107 u32 ret;
108
109 mutex_lock(&dev->usb.usb_ctrl_mtx);
110 ret = ___mt76u_rr(dev, MT_VEND_DEV_MODE,
111 USB_DIR_IN | MT_USB_TYPE_UHW_VENDOR, addr);
112 mutex_unlock(&dev->usb.usb_ctrl_mtx);
113
114 return ret;
115 }
116
mt792xu_uhw_wr(struct mt76_dev * dev,u32 addr,u32 val)117 static void mt792xu_uhw_wr(struct mt76_dev *dev, u32 addr, u32 val)
118 {
119 mutex_lock(&dev->usb.usb_ctrl_mtx);
120 ___mt76u_wr(dev, MT_VEND_WRITE,
121 USB_DIR_OUT | MT_USB_TYPE_UHW_VENDOR, addr, val);
122 mutex_unlock(&dev->usb.usb_ctrl_mtx);
123 }
124
mt792xu_dma_prefetch(struct mt792x_dev * dev)125 static void mt792xu_dma_prefetch(struct mt792x_dev *dev)
126 {
127 #define DMA_PREFETCH_CONF(_idx_, _cnt_, _base_) \
128 mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL((_idx_)), \
129 MT_WPDMA0_MAX_CNT_MASK | MT_WPDMA0_BASE_PTR_MASK, \
130 FIELD_PREP(MT_WPDMA0_MAX_CNT_MASK, (_cnt_)) | \
131 FIELD_PREP(MT_WPDMA0_BASE_PTR_MASK, (_base_)))
132
133 DMA_PREFETCH_CONF(0, 4, 0x080);
134 DMA_PREFETCH_CONF(1, 4, 0x0c0);
135 DMA_PREFETCH_CONF(2, 4, 0x100);
136 DMA_PREFETCH_CONF(3, 4, 0x140);
137 DMA_PREFETCH_CONF(4, 4, 0x180);
138 DMA_PREFETCH_CONF(16, 4, 0x280);
139 DMA_PREFETCH_CONF(17, 4, 0x2c0);
140 }
141
mt792xu_wfdma_init(struct mt792x_dev * dev)142 static void mt792xu_wfdma_init(struct mt792x_dev *dev)
143 {
144 int i;
145
146 mt792xu_dma_prefetch(dev);
147
148 mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_OMIT_RX_INFO);
149 mt76_set(dev, MT_UWFDMA0_GLO_CFG,
150 MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
151 MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2 |
152 MT_WFDMA0_GLO_CFG_FW_DWLD_BYPASS_DMASHDL |
153 MT_WFDMA0_GLO_CFG_TX_DMA_EN |
154 MT_WFDMA0_GLO_CFG_RX_DMA_EN);
155
156 mt76_rmw(dev, MT_DMASHDL_REFILL, MT_DMASHDL_REFILL_MASK, 0xffe00000);
157 mt76_clear(dev, MT_DMASHDL_PAGE, MT_DMASHDL_GROUP_SEQ_ORDER);
158 mt76_rmw(dev, MT_DMASHDL_PKT_MAX_SIZE,
159 MT_DMASHDL_PKT_MAX_SIZE_PLE | MT_DMASHDL_PKT_MAX_SIZE_PSE,
160 FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PLE, 1) |
161 FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PSE, 0));
162 for (i = 0; i < 5; i++)
163 mt76_wr(dev, MT_DMASHDL_GROUP_QUOTA(i),
164 FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x3) |
165 FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0xfff));
166 for (i = 5; i < 16; i++)
167 mt76_wr(dev, MT_DMASHDL_GROUP_QUOTA(i),
168 FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x0) |
169 FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x0));
170 mt76_wr(dev, MT_DMASHDL_Q_MAP(0), 0x32013201);
171 mt76_wr(dev, MT_DMASHDL_Q_MAP(1), 0x32013201);
172 mt76_wr(dev, MT_DMASHDL_Q_MAP(2), 0x55555444);
173 mt76_wr(dev, MT_DMASHDL_Q_MAP(3), 0x55555444);
174
175 mt76_wr(dev, MT_DMASHDL_SCHED_SET(0), 0x76540132);
176 mt76_wr(dev, MT_DMASHDL_SCHED_SET(1), 0xFEDCBA98);
177
178 mt76_set(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT);
179 }
180
mt792xu_dma_rx_evt_ep4(struct mt792x_dev * dev)181 static int mt792xu_dma_rx_evt_ep4(struct mt792x_dev *dev)
182 {
183 if (!mt76_poll(dev, MT_UWFDMA0_GLO_CFG,
184 MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000))
185 return -ETIMEDOUT;
186
187 mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_RX_DMA_EN);
188 mt76_set(dev, MT_WFDMA_HOST_CONFIG,
189 MT_WFDMA_HOST_CONFIG_USB_RXEVT_EP4_EN);
190 mt76_set(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_RX_DMA_EN);
191
192 return 0;
193 }
194
mt792xu_epctl_rst_opt(struct mt792x_dev * dev,bool reset)195 static void mt792xu_epctl_rst_opt(struct mt792x_dev *dev, bool reset)
196 {
197 u32 val;
198
199 /* usb endpoint reset opt
200 * bits[4,9]: out blk ep 4-9
201 * bits[20,21]: in blk ep 4-5
202 * bits[22]: in int ep 6
203 */
204 val = mt792xu_uhw_rr(&dev->mt76, MT_SSUSB_EPCTL_CSR_EP_RST_OPT);
205 if (reset)
206 val |= GENMASK(9, 4) | GENMASK(22, 20);
207 else
208 val &= ~(GENMASK(9, 4) | GENMASK(22, 20));
209 mt792xu_uhw_wr(&dev->mt76, MT_SSUSB_EPCTL_CSR_EP_RST_OPT, val);
210 }
211
mt792xu_dma_init(struct mt792x_dev * dev,bool resume)212 int mt792xu_dma_init(struct mt792x_dev *dev, bool resume)
213 {
214 int err;
215
216 mt792xu_wfdma_init(dev);
217
218 mt76_clear(dev, MT_UDMA_WLCFG_0, MT_WL_RX_FLUSH);
219
220 mt76_set(dev, MT_UDMA_WLCFG_0,
221 MT_WL_RX_EN | MT_WL_TX_EN |
222 MT_WL_RX_MPSZ_PAD0 | MT_TICK_1US_EN);
223 mt76_clear(dev, MT_UDMA_WLCFG_0,
224 MT_WL_RX_AGG_TO | MT_WL_RX_AGG_LMT);
225 mt76_clear(dev, MT_UDMA_WLCFG_1, MT_WL_RX_AGG_PKT_LMT);
226
227 if (resume)
228 return 0;
229
230 err = mt792xu_dma_rx_evt_ep4(dev);
231 if (err)
232 return err;
233
234 mt792xu_epctl_rst_opt(dev, false);
235
236 return 0;
237 }
238 EXPORT_SYMBOL_GPL(mt792xu_dma_init);
239
mt792xu_wfsys_reset(struct mt792x_dev * dev)240 int mt792xu_wfsys_reset(struct mt792x_dev *dev)
241 {
242 u32 val;
243 int i;
244
245 mt792xu_epctl_rst_opt(dev, false);
246
247 val = mt792xu_uhw_rr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST);
248 val |= MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH;
249 mt792xu_uhw_wr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST, val);
250
251 usleep_range(10, 20);
252
253 val = mt792xu_uhw_rr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST);
254 val &= ~MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH;
255 mt792xu_uhw_wr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST, val);
256
257 mt792xu_uhw_wr(&dev->mt76, MT_UDMA_CONN_INFRA_STATUS_SEL, 0);
258 for (i = 0; i < MT792x_WFSYS_INIT_RETRY_COUNT; i++) {
259 val = mt792xu_uhw_rr(&dev->mt76, MT_UDMA_CONN_INFRA_STATUS);
260 if (val & MT_UDMA_CONN_WFSYS_INIT_DONE)
261 break;
262
263 msleep(100);
264 }
265
266 if (i == MT792x_WFSYS_INIT_RETRY_COUNT)
267 return -ETIMEDOUT;
268
269 return 0;
270 }
271 EXPORT_SYMBOL_GPL(mt792xu_wfsys_reset);
272
mt792xu_init_reset(struct mt792x_dev * dev)273 int mt792xu_init_reset(struct mt792x_dev *dev)
274 {
275 set_bit(MT76_RESET, &dev->mphy.state);
276
277 wake_up(&dev->mt76.mcu.wait);
278 skb_queue_purge(&dev->mt76.mcu.res_q);
279
280 mt76u_stop_rx(&dev->mt76);
281 mt76u_stop_tx(&dev->mt76);
282
283 mt792xu_wfsys_reset(dev);
284
285 clear_bit(MT76_RESET, &dev->mphy.state);
286
287 return mt76u_resume_rx(&dev->mt76);
288 }
289 EXPORT_SYMBOL_GPL(mt792xu_init_reset);
290
mt792xu_stop(struct ieee80211_hw * hw,bool suspend)291 void mt792xu_stop(struct ieee80211_hw *hw, bool suspend)
292 {
293 struct mt792x_dev *dev = mt792x_hw_dev(hw);
294
295 mt76u_stop_tx(&dev->mt76);
296 mt792x_stop(hw, false);
297 }
298 EXPORT_SYMBOL_GPL(mt792xu_stop);
299
mt792xu_disconnect(struct usb_interface * usb_intf)300 void mt792xu_disconnect(struct usb_interface *usb_intf)
301 {
302 struct mt792x_dev *dev = usb_get_intfdata(usb_intf);
303
304 cancel_work_sync(&dev->init_work);
305 if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))
306 return;
307
308 mt76_unregister_device(&dev->mt76);
309 mt792xu_cleanup(dev);
310
311 usb_set_intfdata(usb_intf, NULL);
312 usb_put_dev(interface_to_usbdev(usb_intf));
313
314 mt76_free_device(&dev->mt76);
315 }
316 EXPORT_SYMBOL_GPL(mt792xu_disconnect);
317
318 MODULE_DESCRIPTION("MediaTek MT792x USB helpers");
319 MODULE_LICENSE("Dual BSD/GPL");
320 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
321