XCHAL_DCACHE_SETWIDTH (definition) in projects: linux

Searched defs:XCHAL_DCACHE_SETWIDTH (Results 1 – 10 of 10) sorted by relevance

/qemu/target/xtensa/core-fsf/
H A D	core-isa.h	`146 #define XCHAL_DCACHE_SETWIDTH 8 macro`
/qemu/target/xtensa/core-dc232b/
H A D	core-isa.h	`150 #define XCHAL_DCACHE_SETWIDTH 7 macro`
/qemu/target/xtensa/core-dsp3400/
H A D	core-isa.h	`189 #define XCHAL_DCACHE_SETWIDTH 7 macro`
/qemu/target/xtensa/core-lx106/
H A D	core-isa.h	`182 #define XCHAL_DCACHE_SETWIDTH 0 macro`
/qemu/target/xtensa/core-test_mmuhifi_c3/
H A D	core-isa.h	`215 #define XCHAL_DCACHE_SETWIDTH 8 macro`
/qemu/target/xtensa/core-dc233c/
H A D	core-isa.h	`192 #define XCHAL_DCACHE_SETWIDTH 7 macro`
/qemu/target/xtensa/core-test_kc705_be/
H A D	core-isa.h	`250 #define XCHAL_DCACHE_SETWIDTH 7 macro`
/qemu/target/xtensa/core-de212/
H A D	core-isa.h	`262 #define XCHAL_DCACHE_SETWIDTH 7 macro`
/qemu/target/xtensa/core-sample_controller/
H A D	core-isa.h	`280 #define XCHAL_DCACHE_SETWIDTH 0 macro`
/qemu/target/xtensa/core-de233_fpu/
H A D	core-isa.h	`358 #define XCHAL_DCACHE_SETWIDTH 7 macro`