1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * core.h -- Core Driver for Wolfson WM8350 PMIC
4 *
5 * Copyright 2007 Wolfson Microelectronics PLC
6 */
7
8 #ifndef __LINUX_MFD_WM8350_CORE_H_
9 #define __LINUX_MFD_WM8350_CORE_H_
10
11 #include <linux/completion.h>
12 #include <linux/errno.h>
13 #include <linux/interrupt.h>
14 #include <linux/mutex.h>
15 #include <linux/regmap.h>
16 #include <linux/types.h>
17
18 #include <linux/mfd/wm8350/audio.h>
19 #include <linux/mfd/wm8350/gpio.h>
20 #include <linux/mfd/wm8350/pmic.h>
21 #include <linux/mfd/wm8350/rtc.h>
22 #include <linux/mfd/wm8350/supply.h>
23 #include <linux/mfd/wm8350/wdt.h>
24
25 struct device;
26 struct platform_device;
27
28 /*
29 * Register values.
30 */
31 #define WM8350_RESET_ID 0x00
32 #define WM8350_ID 0x01
33 #define WM8350_REVISION 0x02
34 #define WM8350_SYSTEM_CONTROL_1 0x03
35 #define WM8350_SYSTEM_CONTROL_2 0x04
36 #define WM8350_SYSTEM_HIBERNATE 0x05
37 #define WM8350_INTERFACE_CONTROL 0x06
38 #define WM8350_POWER_MGMT_1 0x08
39 #define WM8350_POWER_MGMT_2 0x09
40 #define WM8350_POWER_MGMT_3 0x0A
41 #define WM8350_POWER_MGMT_4 0x0B
42 #define WM8350_POWER_MGMT_5 0x0C
43 #define WM8350_POWER_MGMT_6 0x0D
44 #define WM8350_POWER_MGMT_7 0x0E
45
46 #define WM8350_SYSTEM_INTERRUPTS 0x18
47 #define WM8350_INT_STATUS_1 0x19
48 #define WM8350_INT_STATUS_2 0x1A
49 #define WM8350_POWER_UP_INT_STATUS 0x1B
50 #define WM8350_UNDER_VOLTAGE_INT_STATUS 0x1C
51 #define WM8350_OVER_CURRENT_INT_STATUS 0x1D
52 #define WM8350_GPIO_INT_STATUS 0x1E
53 #define WM8350_COMPARATOR_INT_STATUS 0x1F
54 #define WM8350_SYSTEM_INTERRUPTS_MASK 0x20
55 #define WM8350_INT_STATUS_1_MASK 0x21
56 #define WM8350_INT_STATUS_2_MASK 0x22
57 #define WM8350_POWER_UP_INT_STATUS_MASK 0x23
58 #define WM8350_UNDER_VOLTAGE_INT_STATUS_MASK 0x24
59 #define WM8350_OVER_CURRENT_INT_STATUS_MASK 0x25
60 #define WM8350_GPIO_INT_STATUS_MASK 0x26
61 #define WM8350_COMPARATOR_INT_STATUS_MASK 0x27
62 #define WM8350_CHARGER_OVERRIDES 0xE2
63 #define WM8350_MISC_OVERRIDES 0xE3
64 #define WM8350_COMPARATOR_OVERRIDES 0xE7
65 #define WM8350_STATE_MACHINE_STATUS 0xE9
66
67 #define WM8350_MAX_REGISTER 0xFF
68
69 #define WM8350_UNLOCK_KEY 0x0013
70 #define WM8350_LOCK_KEY 0x0000
71
72 /*
73 * Field Definitions.
74 */
75
76 /*
77 * R0 (0x00) - Reset/ID
78 */
79 #define WM8350_SW_RESET_CHIP_ID_MASK 0xFFFF
80
81 /*
82 * R1 (0x01) - ID
83 */
84 #define WM8350_CHIP_REV_MASK 0x7000
85 #define WM8350_CONF_STS_MASK 0x0C00
86 #define WM8350_CUST_ID_MASK 0x00FF
87
88 /*
89 * R2 (0x02) - Revision
90 */
91 #define WM8350_MASK_REV_MASK 0x00FF
92
93 /*
94 * R3 (0x03) - System Control 1
95 */
96 #define WM8350_CHIP_ON 0x8000
97 #define WM8350_POWERCYCLE 0x2000
98 #define WM8350_VCC_FAULT_OV 0x1000
99 #define WM8350_REG_RSTB_TIME_MASK 0x0C00
100 #define WM8350_BG_SLEEP 0x0200
101 #define WM8350_MEM_VALID 0x0020
102 #define WM8350_CHIP_SET_UP 0x0010
103 #define WM8350_ON_DEB_T 0x0008
104 #define WM8350_ON_POL 0x0002
105 #define WM8350_IRQ_POL 0x0001
106
107 /*
108 * R4 (0x04) - System Control 2
109 */
110 #define WM8350_USB_SUSPEND_8MA 0x8000
111 #define WM8350_USB_SUSPEND 0x4000
112 #define WM8350_USB_MSTR 0x2000
113 #define WM8350_USB_MSTR_SRC 0x1000
114 #define WM8350_USB_500MA 0x0800
115 #define WM8350_USB_NOLIM 0x0400
116
117 /*
118 * R5 (0x05) - System Hibernate
119 */
120 #define WM8350_HIBERNATE 0x8000
121 #define WM8350_WDOG_HIB_MODE 0x0080
122 #define WM8350_REG_HIB_STARTUP_SEQ 0x0040
123 #define WM8350_REG_RESET_HIB_MODE 0x0020
124 #define WM8350_RST_HIB_MODE 0x0010
125 #define WM8350_IRQ_HIB_MODE 0x0008
126 #define WM8350_MEMRST_HIB_MODE 0x0004
127 #define WM8350_PCCOMP_HIB_MODE 0x0002
128 #define WM8350_TEMPMON_HIB_MODE 0x0001
129
130 /*
131 * R6 (0x06) - Interface Control
132 */
133 #define WM8350_USE_DEV_PINS 0x8000
134 #define WM8350_USE_DEV_PINS_MASK 0x8000
135 #define WM8350_USE_DEV_PINS_SHIFT 15
136 #define WM8350_DEV_ADDR_MASK 0x6000
137 #define WM8350_DEV_ADDR_SHIFT 13
138 #define WM8350_CONFIG_DONE 0x1000
139 #define WM8350_CONFIG_DONE_MASK 0x1000
140 #define WM8350_CONFIG_DONE_SHIFT 12
141 #define WM8350_RECONFIG_AT_ON 0x0800
142 #define WM8350_RECONFIG_AT_ON_MASK 0x0800
143 #define WM8350_RECONFIG_AT_ON_SHIFT 11
144 #define WM8350_AUTOINC 0x0200
145 #define WM8350_AUTOINC_MASK 0x0200
146 #define WM8350_AUTOINC_SHIFT 9
147 #define WM8350_ARA 0x0100
148 #define WM8350_ARA_MASK 0x0100
149 #define WM8350_ARA_SHIFT 8
150 #define WM8350_SPI_CFG 0x0008
151 #define WM8350_SPI_CFG_MASK 0x0008
152 #define WM8350_SPI_CFG_SHIFT 3
153 #define WM8350_SPI_4WIRE 0x0004
154 #define WM8350_SPI_4WIRE_MASK 0x0004
155 #define WM8350_SPI_4WIRE_SHIFT 2
156 #define WM8350_SPI_3WIRE 0x0002
157 #define WM8350_SPI_3WIRE_MASK 0x0002
158 #define WM8350_SPI_3WIRE_SHIFT 1
159
160 /* Bit values for R06 (0x06) */
161 #define WM8350_USE_DEV_PINS_PRIMARY 0
162 #define WM8350_USE_DEV_PINS_DEV 1
163
164 #define WM8350_DEV_ADDR_34 0
165 #define WM8350_DEV_ADDR_36 1
166 #define WM8350_DEV_ADDR_3C 2
167 #define WM8350_DEV_ADDR_3E 3
168
169 #define WM8350_CONFIG_DONE_OFF 0
170 #define WM8350_CONFIG_DONE_DONE 1
171
172 #define WM8350_RECONFIG_AT_ON_OFF 0
173 #define WM8350_RECONFIG_AT_ON_ON 1
174
175 #define WM8350_AUTOINC_OFF 0
176 #define WM8350_AUTOINC_ON 1
177
178 #define WM8350_ARA_OFF 0
179 #define WM8350_ARA_ON 1
180
181 #define WM8350_SPI_CFG_CMOS 0
182 #define WM8350_SPI_CFG_OD 1
183
184 #define WM8350_SPI_4WIRE_3WIRE 0
185 #define WM8350_SPI_4WIRE_4WIRE 1
186
187 #define WM8350_SPI_3WIRE_I2C 0
188 #define WM8350_SPI_3WIRE_SPI 1
189
190 /*
191 * R8 (0x08) - Power mgmt (1)
192 */
193 #define WM8350_CODEC_ISEL_MASK 0xC000
194 #define WM8350_VBUFEN 0x2000
195 #define WM8350_OUTPUT_DRAIN_EN 0x0400
196 #define WM8350_MIC_DET_ENA 0x0100
197 #define WM8350_BIASEN 0x0020
198 #define WM8350_MICBEN 0x0010
199 #define WM8350_VMIDEN 0x0004
200 #define WM8350_VMID_MASK 0x0003
201 #define WM8350_VMID_SHIFT 0
202
203 /*
204 * R9 (0x09) - Power mgmt (2)
205 */
206 #define WM8350_IN3R_ENA 0x0800
207 #define WM8350_IN3L_ENA 0x0400
208 #define WM8350_INR_ENA 0x0200
209 #define WM8350_INL_ENA 0x0100
210 #define WM8350_MIXINR_ENA 0x0080
211 #define WM8350_MIXINL_ENA 0x0040
212 #define WM8350_OUT4_ENA 0x0020
213 #define WM8350_OUT3_ENA 0x0010
214 #define WM8350_MIXOUTR_ENA 0x0002
215 #define WM8350_MIXOUTL_ENA 0x0001
216
217 /*
218 * R10 (0x0A) - Power mgmt (3)
219 */
220 #define WM8350_IN3R_TO_OUT2R 0x0080
221 #define WM8350_OUT2R_ENA 0x0008
222 #define WM8350_OUT2L_ENA 0x0004
223 #define WM8350_OUT1R_ENA 0x0002
224 #define WM8350_OUT1L_ENA 0x0001
225
226 /*
227 * R11 (0x0B) - Power mgmt (4)
228 */
229 #define WM8350_SYSCLK_ENA 0x4000
230 #define WM8350_ADC_HPF_ENA 0x2000
231 #define WM8350_FLL_ENA 0x0800
232 #define WM8350_FLL_OSC_ENA 0x0400
233 #define WM8350_TOCLK_ENA 0x0100
234 #define WM8350_DACR_ENA 0x0020
235 #define WM8350_DACL_ENA 0x0010
236 #define WM8350_ADCR_ENA 0x0008
237 #define WM8350_ADCL_ENA 0x0004
238
239 /*
240 * R12 (0x0C) - Power mgmt (5)
241 */
242 #define WM8350_CODEC_ENA 0x1000
243 #define WM8350_RTC_TICK_ENA 0x0800
244 #define WM8350_OSC32K_ENA 0x0400
245 #define WM8350_CHG_ENA 0x0200
246 #define WM8350_ACC_DET_ENA 0x0100
247 #define WM8350_AUXADC_ENA 0x0080
248 #define WM8350_DCMP4_ENA 0x0008
249 #define WM8350_DCMP3_ENA 0x0004
250 #define WM8350_DCMP2_ENA 0x0002
251 #define WM8350_DCMP1_ENA 0x0001
252
253 /*
254 * R13 (0x0D) - Power mgmt (6)
255 */
256 #define WM8350_LS_ENA 0x8000
257 #define WM8350_LDO4_ENA 0x0800
258 #define WM8350_LDO3_ENA 0x0400
259 #define WM8350_LDO2_ENA 0x0200
260 #define WM8350_LDO1_ENA 0x0100
261 #define WM8350_DC6_ENA 0x0020
262 #define WM8350_DC5_ENA 0x0010
263 #define WM8350_DC4_ENA 0x0008
264 #define WM8350_DC3_ENA 0x0004
265 #define WM8350_DC2_ENA 0x0002
266 #define WM8350_DC1_ENA 0x0001
267
268 /*
269 * R14 (0x0E) - Power mgmt (7)
270 */
271 #define WM8350_CS2_ENA 0x0002
272 #define WM8350_CS1_ENA 0x0001
273
274 /*
275 * R24 (0x18) - System Interrupts
276 */
277 #define WM8350_OC_INT 0x2000
278 #define WM8350_UV_INT 0x1000
279 #define WM8350_PUTO_INT 0x0800
280 #define WM8350_CS_INT 0x0200
281 #define WM8350_EXT_INT 0x0100
282 #define WM8350_CODEC_INT 0x0080
283 #define WM8350_GP_INT 0x0040
284 #define WM8350_AUXADC_INT 0x0020
285 #define WM8350_RTC_INT 0x0010
286 #define WM8350_SYS_INT 0x0008
287 #define WM8350_CHG_INT 0x0004
288 #define WM8350_USB_INT 0x0002
289 #define WM8350_WKUP_INT 0x0001
290
291 /*
292 * R25 (0x19) - Interrupt Status 1
293 */
294 #define WM8350_CHG_BAT_HOT_EINT 0x8000
295 #define WM8350_CHG_BAT_COLD_EINT 0x4000
296 #define WM8350_CHG_BAT_FAIL_EINT 0x2000
297 #define WM8350_CHG_TO_EINT 0x1000
298 #define WM8350_CHG_END_EINT 0x0800
299 #define WM8350_CHG_START_EINT 0x0400
300 #define WM8350_CHG_FAST_RDY_EINT 0x0200
301 #define WM8350_RTC_PER_EINT 0x0080
302 #define WM8350_RTC_SEC_EINT 0x0040
303 #define WM8350_RTC_ALM_EINT 0x0020
304 #define WM8350_CHG_VBATT_LT_3P9_EINT 0x0004
305 #define WM8350_CHG_VBATT_LT_3P1_EINT 0x0002
306 #define WM8350_CHG_VBATT_LT_2P85_EINT 0x0001
307
308 /*
309 * R26 (0x1A) - Interrupt Status 2
310 */
311 #define WM8350_CS1_EINT 0x2000
312 #define WM8350_CS2_EINT 0x1000
313 #define WM8350_USB_LIMIT_EINT 0x0400
314 #define WM8350_AUXADC_DATARDY_EINT 0x0100
315 #define WM8350_AUXADC_DCOMP4_EINT 0x0080
316 #define WM8350_AUXADC_DCOMP3_EINT 0x0040
317 #define WM8350_AUXADC_DCOMP2_EINT 0x0020
318 #define WM8350_AUXADC_DCOMP1_EINT 0x0010
319 #define WM8350_SYS_HYST_COMP_FAIL_EINT 0x0008
320 #define WM8350_SYS_CHIP_GT115_EINT 0x0004
321 #define WM8350_SYS_CHIP_GT140_EINT 0x0002
322 #define WM8350_SYS_WDOG_TO_EINT 0x0001
323
324 /*
325 * R27 (0x1B) - Power Up Interrupt Status
326 */
327 #define WM8350_PUTO_LDO4_EINT 0x0800
328 #define WM8350_PUTO_LDO3_EINT 0x0400
329 #define WM8350_PUTO_LDO2_EINT 0x0200
330 #define WM8350_PUTO_LDO1_EINT 0x0100
331 #define WM8350_PUTO_DC6_EINT 0x0020
332 #define WM8350_PUTO_DC5_EINT 0x0010
333 #define WM8350_PUTO_DC4_EINT 0x0008
334 #define WM8350_PUTO_DC3_EINT 0x0004
335 #define WM8350_PUTO_DC2_EINT 0x0002
336 #define WM8350_PUTO_DC1_EINT 0x0001
337
338 /*
339 * R28 (0x1C) - Under Voltage Interrupt status
340 */
341 #define WM8350_UV_LDO4_EINT 0x0800
342 #define WM8350_UV_LDO3_EINT 0x0400
343 #define WM8350_UV_LDO2_EINT 0x0200
344 #define WM8350_UV_LDO1_EINT 0x0100
345 #define WM8350_UV_DC6_EINT 0x0020
346 #define WM8350_UV_DC5_EINT 0x0010
347 #define WM8350_UV_DC4_EINT 0x0008
348 #define WM8350_UV_DC3_EINT 0x0004
349 #define WM8350_UV_DC2_EINT 0x0002
350 #define WM8350_UV_DC1_EINT 0x0001
351
352 /*
353 * R29 (0x1D) - Over Current Interrupt status
354 */
355 #define WM8350_OC_LS_EINT 0x8000
356
357 /*
358 * R30 (0x1E) - GPIO Interrupt Status
359 */
360 #define WM8350_GP12_EINT 0x1000
361 #define WM8350_GP11_EINT 0x0800
362 #define WM8350_GP10_EINT 0x0400
363 #define WM8350_GP9_EINT 0x0200
364 #define WM8350_GP8_EINT 0x0100
365 #define WM8350_GP7_EINT 0x0080
366 #define WM8350_GP6_EINT 0x0040
367 #define WM8350_GP5_EINT 0x0020
368 #define WM8350_GP4_EINT 0x0010
369 #define WM8350_GP3_EINT 0x0008
370 #define WM8350_GP2_EINT 0x0004
371 #define WM8350_GP1_EINT 0x0002
372 #define WM8350_GP0_EINT 0x0001
373
374 /*
375 * R31 (0x1F) - Comparator Interrupt Status
376 */
377 #define WM8350_EXT_USB_FB_EINT 0x8000
378 #define WM8350_EXT_WALL_FB_EINT 0x4000
379 #define WM8350_EXT_BAT_FB_EINT 0x2000
380 #define WM8350_CODEC_JCK_DET_L_EINT 0x0800
381 #define WM8350_CODEC_JCK_DET_R_EINT 0x0400
382 #define WM8350_CODEC_MICSCD_EINT 0x0200
383 #define WM8350_CODEC_MICD_EINT 0x0100
384 #define WM8350_WKUP_OFF_STATE_EINT 0x0040
385 #define WM8350_WKUP_HIB_STATE_EINT 0x0020
386 #define WM8350_WKUP_CONV_FAULT_EINT 0x0010
387 #define WM8350_WKUP_WDOG_RST_EINT 0x0008
388 #define WM8350_WKUP_GP_PWR_ON_EINT 0x0004
389 #define WM8350_WKUP_ONKEY_EINT 0x0002
390 #define WM8350_WKUP_GP_WAKEUP_EINT 0x0001
391
392 /*
393 * R32 (0x20) - System Interrupts Mask
394 */
395 #define WM8350_IM_OC_INT 0x2000
396 #define WM8350_IM_UV_INT 0x1000
397 #define WM8350_IM_PUTO_INT 0x0800
398 #define WM8350_IM_SPARE_INT 0x0400
399 #define WM8350_IM_CS_INT 0x0200
400 #define WM8350_IM_EXT_INT 0x0100
401 #define WM8350_IM_CODEC_INT 0x0080
402 #define WM8350_IM_GP_INT 0x0040
403 #define WM8350_IM_AUXADC_INT 0x0020
404 #define WM8350_IM_RTC_INT 0x0010
405 #define WM8350_IM_SYS_INT 0x0008
406 #define WM8350_IM_CHG_INT 0x0004
407 #define WM8350_IM_USB_INT 0x0002
408 #define WM8350_IM_WKUP_INT 0x0001
409
410 /*
411 * R33 (0x21) - Interrupt Status 1 Mask
412 */
413 #define WM8350_IM_CHG_BAT_HOT_EINT 0x8000
414 #define WM8350_IM_CHG_BAT_COLD_EINT 0x4000
415 #define WM8350_IM_CHG_BAT_FAIL_EINT 0x2000
416 #define WM8350_IM_CHG_TO_EINT 0x1000
417 #define WM8350_IM_CHG_END_EINT 0x0800
418 #define WM8350_IM_CHG_START_EINT 0x0400
419 #define WM8350_IM_CHG_FAST_RDY_EINT 0x0200
420 #define WM8350_IM_RTC_PER_EINT 0x0080
421 #define WM8350_IM_RTC_SEC_EINT 0x0040
422 #define WM8350_IM_RTC_ALM_EINT 0x0020
423 #define WM8350_IM_CHG_VBATT_LT_3P9_EINT 0x0004
424 #define WM8350_IM_CHG_VBATT_LT_3P1_EINT 0x0002
425 #define WM8350_IM_CHG_VBATT_LT_2P85_EINT 0x0001
426
427 /*
428 * R34 (0x22) - Interrupt Status 2 Mask
429 */
430 #define WM8350_IM_SPARE2_EINT 0x8000
431 #define WM8350_IM_SPARE1_EINT 0x4000
432 #define WM8350_IM_CS1_EINT 0x2000
433 #define WM8350_IM_CS2_EINT 0x1000
434 #define WM8350_IM_USB_LIMIT_EINT 0x0400
435 #define WM8350_IM_AUXADC_DATARDY_EINT 0x0100
436 #define WM8350_IM_AUXADC_DCOMP4_EINT 0x0080
437 #define WM8350_IM_AUXADC_DCOMP3_EINT 0x0040
438 #define WM8350_IM_AUXADC_DCOMP2_EINT 0x0020
439 #define WM8350_IM_AUXADC_DCOMP1_EINT 0x0010
440 #define WM8350_IM_SYS_HYST_COMP_FAIL_EINT 0x0008
441 #define WM8350_IM_SYS_CHIP_GT115_EINT 0x0004
442 #define WM8350_IM_SYS_CHIP_GT140_EINT 0x0002
443 #define WM8350_IM_SYS_WDOG_TO_EINT 0x0001
444
445 /*
446 * R35 (0x23) - Power Up Interrupt Status Mask
447 */
448 #define WM8350_IM_PUTO_LDO4_EINT 0x0800
449 #define WM8350_IM_PUTO_LDO3_EINT 0x0400
450 #define WM8350_IM_PUTO_LDO2_EINT 0x0200
451 #define WM8350_IM_PUTO_LDO1_EINT 0x0100
452 #define WM8350_IM_PUTO_DC6_EINT 0x0020
453 #define WM8350_IM_PUTO_DC5_EINT 0x0010
454 #define WM8350_IM_PUTO_DC4_EINT 0x0008
455 #define WM8350_IM_PUTO_DC3_EINT 0x0004
456 #define WM8350_IM_PUTO_DC2_EINT 0x0002
457 #define WM8350_IM_PUTO_DC1_EINT 0x0001
458
459 /*
460 * R36 (0x24) - Under Voltage Interrupt status Mask
461 */
462 #define WM8350_IM_UV_LDO4_EINT 0x0800
463 #define WM8350_IM_UV_LDO3_EINT 0x0400
464 #define WM8350_IM_UV_LDO2_EINT 0x0200
465 #define WM8350_IM_UV_LDO1_EINT 0x0100
466 #define WM8350_IM_UV_DC6_EINT 0x0020
467 #define WM8350_IM_UV_DC5_EINT 0x0010
468 #define WM8350_IM_UV_DC4_EINT 0x0008
469 #define WM8350_IM_UV_DC3_EINT 0x0004
470 #define WM8350_IM_UV_DC2_EINT 0x0002
471 #define WM8350_IM_UV_DC1_EINT 0x0001
472
473 /*
474 * R37 (0x25) - Over Current Interrupt status Mask
475 */
476 #define WM8350_IM_OC_LS_EINT 0x8000
477
478 /*
479 * R38 (0x26) - GPIO Interrupt Status Mask
480 */
481 #define WM8350_IM_GP12_EINT 0x1000
482 #define WM8350_IM_GP11_EINT 0x0800
483 #define WM8350_IM_GP10_EINT 0x0400
484 #define WM8350_IM_GP9_EINT 0x0200
485 #define WM8350_IM_GP8_EINT 0x0100
486 #define WM8350_IM_GP7_EINT 0x0080
487 #define WM8350_IM_GP6_EINT 0x0040
488 #define WM8350_IM_GP5_EINT 0x0020
489 #define WM8350_IM_GP4_EINT 0x0010
490 #define WM8350_IM_GP3_EINT 0x0008
491 #define WM8350_IM_GP2_EINT 0x0004
492 #define WM8350_IM_GP1_EINT 0x0002
493 #define WM8350_IM_GP0_EINT 0x0001
494
495 /*
496 * R39 (0x27) - Comparator Interrupt Status Mask
497 */
498 #define WM8350_IM_EXT_USB_FB_EINT 0x8000
499 #define WM8350_IM_EXT_WALL_FB_EINT 0x4000
500 #define WM8350_IM_EXT_BAT_FB_EINT 0x2000
501 #define WM8350_IM_CODEC_JCK_DET_L_EINT 0x0800
502 #define WM8350_IM_CODEC_JCK_DET_R_EINT 0x0400
503 #define WM8350_IM_CODEC_MICSCD_EINT 0x0200
504 #define WM8350_IM_CODEC_MICD_EINT 0x0100
505 #define WM8350_IM_WKUP_OFF_STATE_EINT 0x0040
506 #define WM8350_IM_WKUP_HIB_STATE_EINT 0x0020
507 #define WM8350_IM_WKUP_CONV_FAULT_EINT 0x0010
508 #define WM8350_IM_WKUP_WDOG_RST_EINT 0x0008
509 #define WM8350_IM_WKUP_GP_PWR_ON_EINT 0x0004
510 #define WM8350_IM_WKUP_ONKEY_EINT 0x0002
511 #define WM8350_IM_WKUP_GP_WAKEUP_EINT 0x0001
512
513 /*
514 * R220 (0xDC) - RAM BIST 1
515 */
516 #define WM8350_READ_STATUS 0x0800
517 #define WM8350_TSTRAM_CLK 0x0100
518 #define WM8350_TSTRAM_CLK_ENA 0x0080
519 #define WM8350_STARTSEQ 0x0040
520 #define WM8350_READ_SRC 0x0020
521 #define WM8350_COUNT_DIR 0x0010
522 #define WM8350_TSTRAM_MODE_MASK 0x000E
523 #define WM8350_TSTRAM_ENA 0x0001
524
525 /*
526 * R225 (0xE1) - DCDC/LDO status
527 */
528 #define WM8350_LS_STS 0x8000
529 #define WM8350_LDO4_STS 0x0800
530 #define WM8350_LDO3_STS 0x0400
531 #define WM8350_LDO2_STS 0x0200
532 #define WM8350_LDO1_STS 0x0100
533 #define WM8350_DC6_STS 0x0020
534 #define WM8350_DC5_STS 0x0010
535 #define WM8350_DC4_STS 0x0008
536 #define WM8350_DC3_STS 0x0004
537 #define WM8350_DC2_STS 0x0002
538 #define WM8350_DC1_STS 0x0001
539
540 /*
541 * R226 (0xE2) - Charger status
542 */
543 #define WM8350_CHG_BATT_HOT_OVRDE 0x8000
544 #define WM8350_CHG_BATT_COLD_OVRDE 0x4000
545
546 /*
547 * R227 (0xE3) - Misc Overrides
548 */
549 #define WM8350_USB_LIMIT_OVRDE 0x0400
550
551 /*
552 * R227 (0xE7) - Comparator Overrides
553 */
554 #define WM8350_USB_FB_OVRDE 0x8000
555 #define WM8350_WALL_FB_OVRDE 0x4000
556 #define WM8350_BATT_FB_OVRDE 0x2000
557
558
559 /*
560 * R233 (0xE9) - State Machinine Status
561 */
562 #define WM8350_USB_SM_MASK 0x0700
563 #define WM8350_USB_SM_SHIFT 8
564
565 #define WM8350_USB_SM_100_SLV 1
566 #define WM8350_USB_SM_500_SLV 5
567 #define WM8350_USB_SM_STDBY_SLV 7
568
569 /* WM8350 wake up conditions */
570 #define WM8350_IRQ_WKUP_OFF_STATE 43
571 #define WM8350_IRQ_WKUP_HIB_STATE 44
572 #define WM8350_IRQ_WKUP_CONV_FAULT 45
573 #define WM8350_IRQ_WKUP_WDOG_RST 46
574 #define WM8350_IRQ_WKUP_GP_PWR_ON 47
575 #define WM8350_IRQ_WKUP_ONKEY 48
576 #define WM8350_IRQ_WKUP_GP_WAKEUP 49
577
578 /* wm8350 chip revisions */
579 #define WM8350_REV_E 0x4
580 #define WM8350_REV_F 0x5
581 #define WM8350_REV_G 0x6
582 #define WM8350_REV_H 0x7
583
584 #define WM8350_NUM_IRQ 63
585
586 #define WM8350_NUM_IRQ_REGS 7
587
588 extern const struct regmap_config wm8350_regmap;
589
590 struct wm8350;
591
592 struct wm8350_hwmon {
593 struct platform_device *pdev;
594 struct device *classdev;
595 };
596
597 struct wm8350 {
598 struct device *dev;
599
600 /* device IO */
601 struct regmap *regmap;
602 bool unlocked;
603
604 struct mutex auxadc_mutex;
605 struct completion auxadc_done;
606
607 /* Interrupt handling */
608 struct mutex irq_lock;
609 int chip_irq;
610 int irq_base;
611 u16 irq_masks[WM8350_NUM_IRQ_REGS];
612
613 /* Client devices */
614 struct wm8350_codec codec;
615 struct wm8350_gpio gpio;
616 struct wm8350_hwmon hwmon;
617 struct wm8350_pmic pmic;
618 struct wm8350_power power;
619 struct wm8350_rtc rtc;
620 struct wm8350_wdt wdt;
621 };
622
623 /**
624 * Data to be supplied by the platform to initialise the WM8350.
625 *
626 * @init: Function called during driver initialisation. Should be
627 * used by the platform to configure GPIO functions and similar.
628 * @irq_high: Set if WM8350 IRQ is active high.
629 * @irq_base: Base IRQ for genirq (not currently used).
630 * @gpio_base: Base for gpiolib.
631 */
632 struct wm8350_platform_data {
633 int (*init)(struct wm8350 *wm8350);
634 int irq_high;
635 int irq_base;
636 int gpio_base;
637 };
638
639
640 /*
641 * WM8350 device initialisation and exit.
642 */
643 int wm8350_device_init(struct wm8350 *wm8350, int irq,
644 struct wm8350_platform_data *pdata);
645
646 /*
647 * WM8350 device IO
648 */
649 int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
650 int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
651 u16 wm8350_reg_read(struct wm8350 *wm8350, int reg);
652 int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val);
653 int wm8350_reg_lock(struct wm8350 *wm8350);
654 int wm8350_reg_unlock(struct wm8350 *wm8350);
655 int wm8350_block_read(struct wm8350 *wm8350, int reg, int size, u16 *dest);
656 int wm8350_block_write(struct wm8350 *wm8350, int reg, int size, u16 *src);
657
658 /*
659 * WM8350 internal interrupts
660 */
wm8350_register_irq(struct wm8350 * wm8350,int irq,irq_handler_t handler,unsigned long flags,const char * name,void * data)661 static inline int wm8350_register_irq(struct wm8350 *wm8350, int irq,
662 irq_handler_t handler,
663 unsigned long flags,
664 const char *name, void *data)
665 {
666 if (!wm8350->irq_base)
667 return -ENODEV;
668
669 return request_threaded_irq(irq + wm8350->irq_base, NULL,
670 handler, flags, name, data);
671 }
672
wm8350_free_irq(struct wm8350 * wm8350,int irq,void * data)673 static inline void wm8350_free_irq(struct wm8350 *wm8350, int irq, void *data)
674 {
675 free_irq(irq + wm8350->irq_base, data);
676 }
677
wm8350_mask_irq(struct wm8350 * wm8350,int irq)678 static inline void wm8350_mask_irq(struct wm8350 *wm8350, int irq)
679 {
680 disable_irq(irq + wm8350->irq_base);
681 }
682
wm8350_unmask_irq(struct wm8350 * wm8350,int irq)683 static inline void wm8350_unmask_irq(struct wm8350 *wm8350, int irq)
684 {
685 enable_irq(irq + wm8350->irq_base);
686 }
687
688 int wm8350_irq_init(struct wm8350 *wm8350, int irq,
689 struct wm8350_platform_data *pdata);
690 int wm8350_irq_exit(struct wm8350 *wm8350);
691
692 #endif
693