1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2017 Linaro Ltd.
5 */
6
7 #ifndef __VENUS_CORE_H_
8 #define __VENUS_CORE_H_
9
10 #include <linux/bitops.h>
11 #include <linux/list.h>
12 #include <media/videobuf2-v4l2.h>
13 #include <media/v4l2-ctrls.h>
14 #include <media/v4l2-device.h>
15
16 #include "dbgfs.h"
17 #include "hfi.h"
18 #include "hfi_platform.h"
19 #include "hfi_helper.h"
20
21 #define VDBGL "VenusLow : "
22 #define VDBGM "VenusMed : "
23 #define VDBGH "VenusHigh: "
24 #define VDBGFW "VenusFW : "
25
26 #define VIDC_CLKS_NUM_MAX 4
27 #define VIDC_VCODEC_CLKS_NUM_MAX 2
28 #define VIDC_RESETS_NUM_MAX 2
29 #define VIDC_MAX_HIER_CODING_LAYER 6
30
31 #define VENUS_MAX_FPS 240
32
33 extern int venus_fw_debug;
34
35 struct freq_tbl {
36 unsigned int load;
37 unsigned long freq;
38 };
39
40 struct reg_val {
41 u32 reg;
42 u32 value;
43 };
44
45 struct bw_tbl {
46 u32 mbs_per_sec;
47 u32 avg;
48 u32 peak;
49 u32 avg_10bit;
50 u32 peak_10bit;
51 };
52
53 enum vpu_version {
54 VPU_VERSION_AR50,
55 VPU_VERSION_AR50_LITE,
56 VPU_VERSION_IRIS1,
57 VPU_VERSION_IRIS2,
58 VPU_VERSION_IRIS2_1,
59 };
60
61 struct venus_resources {
62 u64 dma_mask;
63 const struct freq_tbl *freq_tbl;
64 unsigned int freq_tbl_size;
65 const struct bw_tbl *bw_tbl_enc;
66 unsigned int bw_tbl_enc_size;
67 const struct bw_tbl *bw_tbl_dec;
68 unsigned int bw_tbl_dec_size;
69 const struct reg_val *reg_tbl;
70 unsigned int reg_tbl_size;
71 const struct hfi_ubwc_config *ubwc_conf;
72 const char * const clks[VIDC_CLKS_NUM_MAX];
73 unsigned int clks_num;
74 const char * const vcodec0_clks[VIDC_VCODEC_CLKS_NUM_MAX];
75 const char * const vcodec1_clks[VIDC_VCODEC_CLKS_NUM_MAX];
76 unsigned int vcodec_clks_num;
77 const char **vcodec_pmdomains;
78 unsigned int vcodec_pmdomains_num;
79 const char **opp_pmdomain;
80 unsigned int vcodec_num;
81 const char * const resets[VIDC_RESETS_NUM_MAX];
82 unsigned int resets_num;
83 enum hfi_version hfi_version;
84 enum vpu_version vpu_version;
85 u8 num_vpp_pipes;
86 u32 max_load;
87 unsigned int vmem_id;
88 u32 vmem_size;
89 u32 vmem_addr;
90 u32 cp_start;
91 u32 cp_size;
92 u32 cp_nonpixel_start;
93 u32 cp_nonpixel_size;
94 const char *fwname;
95 const char *enc_nodename;
96 const char *dec_nodename;
97 };
98
99 enum venus_fmt {
100 VENUS_FMT_NV12 = 0,
101 VENUS_FMT_QC08C = 1,
102 VENUS_FMT_QC10C = 2,
103 VENUS_FMT_P010 = 3,
104 VENUS_FMT_H264 = 4,
105 VENUS_FMT_VP8 = 5,
106 VENUS_FMT_VP9 = 6,
107 VENUS_FMT_HEVC = 7,
108 VENUS_FMT_VC1_ANNEX_G = 8,
109 VENUS_FMT_VC1_ANNEX_L = 9,
110 VENUS_FMT_MPEG4 = 10,
111 VENUS_FMT_MPEG2 = 11,
112 VENUS_FMT_H263 = 12,
113 VENUS_FMT_XVID = 13,
114 };
115
116 struct venus_format {
117 u32 pixfmt;
118 unsigned int num_planes;
119 u32 type;
120 u32 flags;
121 };
122
123 /**
124 * struct venus_core - holds core parameters valid for all instances
125 *
126 * @base: IO memory base address
127 * @vbif_base: IO memory vbif base address
128 * @cpu_base: IO memory cpu base address
129 * @cpu_cs_base: IO memory cpu_cs base address
130 * @cpu_ic_base: IO memory cpu_ic base address
131 * @wrapper_base: IO memory wrapper base address
132 * @wrapper_tz_base: IO memory wrapper TZ base address
133 * @aon_base: AON base address
134 * @irq: Venus irq
135 * @clks: an array of struct clk pointers
136 * @vcodec0_clks: an array of vcodec0 struct clk pointers
137 * @vcodec1_clks: an array of vcodec1 struct clk pointers
138 * @video_path: an interconnect handle to video to/from memory path
139 * @cpucfg_path: an interconnect handle to cpu configuration path
140 * @pmdomains: a pointer to a list of pmdomains
141 * @opp_pmdomain: an OPP power-domain
142 * @resets: an array of reset signals
143 * @vdev_dec: a reference to video device structure for decoder instances
144 * @vdev_enc: a reference to video device structure for encoder instances
145 * @v4l2_dev: a holder for v4l2 device structure
146 * @res: a reference to venus resources structure
147 * @dev: convenience struct device pointer
148 * @dev_dec: convenience struct device pointer for decoder device
149 * @dev_enc: convenience struct device pointer for encoder device
150 * @use_tz: a flag that suggests presence of trustzone
151 * @fw: structure of firmware parameters
152 * @lock: a lock for this strucure
153 * @instances: a list_head of all instances
154 * @insts_count: num of instances
155 * @state: the state of the venus core
156 * @done: a completion for sync HFI operations
157 * @error: an error returned during last HFI sync operations
158 * @sys_error: an error flag that signal system error event
159 * @sys_err_done: a waitqueue to wait for system error recovery end
160 * @core_ops: the core operations
161 * @pm_ops: a pointer to pm operations
162 * @pm_lock: a lock for PM operations
163 * @enc_codecs: encoders supported by this core
164 * @dec_codecs: decoders supported by this core
165 * @max_sessions_supported: holds the maximum number of sessions
166 * @priv: a private filed for HFI operations
167 * @ops: the core HFI operations
168 * @work: a delayed work for handling system fatal error
169 * @caps: an array of supported HFI capabilities
170 * @codecs_count: platform codecs count
171 * @core0_usage_count: usage counter for core0
172 * @core1_usage_count: usage counter for core1
173 * @root: debugfs root directory
174 * @venus_ver: the venus firmware version
175 * @dump_core: a flag indicating that a core dump is required
176 * @ocs: OF changeset pointer
177 * @hwmode_dev: a flag indicating that HW_CTRL_TRIGGER is used in clock driver
178 */
179 struct venus_core {
180 void __iomem *base;
181 void __iomem *vbif_base;
182 void __iomem *cpu_base;
183 void __iomem *cpu_cs_base;
184 void __iomem *cpu_ic_base;
185 void __iomem *wrapper_base;
186 void __iomem *wrapper_tz_base;
187 void __iomem *aon_base;
188 int irq;
189 struct clk *clks[VIDC_CLKS_NUM_MAX];
190 struct clk *vcodec0_clks[VIDC_VCODEC_CLKS_NUM_MAX];
191 struct clk *vcodec1_clks[VIDC_VCODEC_CLKS_NUM_MAX];
192 struct icc_path *video_path;
193 struct icc_path *cpucfg_path;
194 struct dev_pm_domain_list *pmdomains;
195 struct dev_pm_domain_list *opp_pmdomain;
196 struct reset_control *resets[VIDC_RESETS_NUM_MAX];
197 struct video_device *vdev_dec;
198 struct video_device *vdev_enc;
199 struct v4l2_device v4l2_dev;
200 const struct venus_resources *res;
201 struct device *dev;
202 struct device *dev_dec;
203 struct device *dev_enc;
204 unsigned int use_tz;
205 struct video_firmware {
206 struct device *dev;
207 struct iommu_domain *iommu_domain;
208 size_t mapped_mem_size;
209 phys_addr_t mem_phys;
210 size_t mem_size;
211 } fw;
212 struct mutex lock;
213 struct list_head instances;
214 atomic_t insts_count;
215 unsigned int state;
216 struct completion done;
217 unsigned int error;
218 unsigned long sys_error;
219 wait_queue_head_t sys_err_done;
220 const struct hfi_core_ops *core_ops;
221 const struct venus_pm_ops *pm_ops;
222 struct mutex pm_lock;
223 unsigned long enc_codecs;
224 unsigned long dec_codecs;
225 unsigned int max_sessions_supported;
226 void *priv;
227 const struct hfi_ops *ops;
228 struct delayed_work work;
229 struct hfi_plat_caps caps[MAX_CODEC_NUM];
230 unsigned int codecs_count;
231 unsigned int core0_usage_count;
232 unsigned int core1_usage_count;
233 struct dentry *root;
234 struct venus_img_version {
235 u32 major;
236 u32 minor;
237 u32 rev;
238 } venus_ver;
239 unsigned long dump_core;
240 struct of_changeset *ocs;
241 bool hwmode_dev;
242 };
243
244 struct vdec_controls {
245 u32 post_loop_deb_mode;
246 u32 profile;
247 u32 level;
248 u32 display_delay;
249 u32 display_delay_enable;
250 u64 conceal_color;
251 };
252
253 struct venc_controls {
254 u16 gop_size;
255 u32 num_p_frames;
256 u32 num_b_frames;
257 u32 bitrate_mode;
258 u32 bitrate;
259 u32 bitrate_peak;
260 u32 rc_enable;
261 u32 const_quality;
262 u32 frame_skip_mode;
263 u32 layer_bitrate;
264
265 u32 h264_i_period;
266 u32 h264_entropy_mode;
267 u32 h264_i_qp;
268 u32 h264_p_qp;
269 u32 h264_b_qp;
270 u32 h264_min_qp;
271 u32 h264_max_qp;
272 u32 h264_i_min_qp;
273 u32 h264_i_max_qp;
274 u32 h264_p_min_qp;
275 u32 h264_p_max_qp;
276 u32 h264_b_min_qp;
277 u32 h264_b_max_qp;
278 u32 h264_loop_filter_mode;
279 s32 h264_loop_filter_alpha;
280 s32 h264_loop_filter_beta;
281 u32 h264_8x8_transform;
282 u32 h264_hier_layers;
283 u32 h264_hier_layer_bitrate[VIDC_MAX_HIER_CODING_LAYER];
284
285 u32 hevc_i_qp;
286 u32 hevc_p_qp;
287 u32 hevc_b_qp;
288 u32 hevc_min_qp;
289 u32 hevc_max_qp;
290 u32 hevc_i_min_qp;
291 u32 hevc_i_max_qp;
292 u32 hevc_p_min_qp;
293 u32 hevc_p_max_qp;
294 u32 hevc_b_min_qp;
295 u32 hevc_b_max_qp;
296
297 u32 vp8_min_qp;
298 u32 vp8_max_qp;
299
300 u32 multi_slice_mode;
301 u32 multi_slice_max_bytes;
302 u32 multi_slice_max_mb;
303
304 u32 header_mode;
305 bool aud_enable;
306 u32 intra_refresh_type;
307 u32 intra_refresh_period;
308
309 struct {
310 u32 h264;
311 u32 mpeg4;
312 u32 hevc;
313 u32 vp8;
314 u32 vp9;
315 } profile;
316 struct {
317 u32 h264;
318 u32 mpeg4;
319 u32 hevc;
320 u32 vp9;
321 } level;
322
323 u32 base_priority_id;
324 u32 ltr_count;
325 struct v4l2_ctrl_hdr10_cll_info cll;
326 struct v4l2_ctrl_hdr10_mastering_display mastering;
327 };
328
329 struct venus_buffer {
330 struct vb2_v4l2_buffer vb;
331 struct list_head list;
332 dma_addr_t dma_addr;
333 u32 size;
334 struct list_head reg_list;
335 u32 flags;
336 struct list_head ref_list;
337 };
338
339 struct clock_data {
340 u32 core_id;
341 unsigned long freq;
342 unsigned long vpp_freq;
343 unsigned long vsp_freq;
344 unsigned long low_power_freq;
345 };
346
347 #define to_venus_buffer(ptr) container_of(ptr, struct venus_buffer, vb)
348
349 enum venus_dec_state {
350 VENUS_DEC_STATE_DEINIT = 0,
351 VENUS_DEC_STATE_INIT = 1,
352 VENUS_DEC_STATE_CAPTURE_SETUP = 2,
353 VENUS_DEC_STATE_STOPPED = 3,
354 VENUS_DEC_STATE_SEEK = 4,
355 VENUS_DEC_STATE_DRAIN = 5,
356 VENUS_DEC_STATE_DECODING = 6,
357 VENUS_DEC_STATE_DRC = 7,
358 };
359
360 enum venus_enc_state {
361 VENUS_ENC_STATE_DEINIT = 0,
362 VENUS_ENC_STATE_INIT = 1,
363 VENUS_ENC_STATE_ENCODING = 2,
364 VENUS_ENC_STATE_STOPPED = 3,
365 VENUS_ENC_STATE_DRAIN = 4,
366 };
367
368 struct venus_ts_metadata {
369 bool used;
370 u64 ts_ns;
371 u64 ts_us;
372 u32 flags;
373 struct v4l2_timecode tc;
374 };
375
376 enum venus_inst_modes {
377 VENUS_LOW_POWER = BIT(0),
378 };
379
380 /**
381 * struct venus_inst - holds per instance parameters
382 *
383 * @list: used for attach an instance to the core
384 * @lock: instance lock
385 * @core: a reference to the core struct
386 * @clk_data: clock data per core ID
387 * @dpbbufs: a list of decoded picture buffers
388 * @internalbufs: a list of internal bufferes
389 * @registeredbufs: a list of registered capture bufferes
390 * @delayed_process: a list of delayed buffers
391 * @delayed_process_work: a work_struct for process delayed buffers
392 * @nonblock: nonblocking flag
393 * @ctrl_handler: v4l control handler
394 * @controls: a union of decoder and encoder control parameters
395 * @fh: a holder of v4l file handle structure
396 * @streamon_cap: stream on flag for capture queue
397 * @streamon_out: stream on flag for output queue
398 * @width: current capture width
399 * @height: current capture height
400 * @crop: current crop rectangle
401 * @fw_min_cnt: firmware minimum buffer count
402 * @out_width: current output width
403 * @out_height: current output height
404 * @colorspace: current color space
405 * @ycbcr_enc: current YCbCr encoding
406 * @quantization: current quantization
407 * @xfer_func: current xfer function
408 * @codec_state: current decoder API state (see DEC_STATE_)
409 * @enc_state: current encoder API state (see ENC_STATE_)
410 * @reconf_wait: wait queue for resolution change event
411 * @subscriptions: used to hold current events subscriptions
412 * @buf_count: used to count number of buffers (reqbuf(0))
413 * @tss: timestamp metadata
414 * @payloads: cache plane payload to use it for clock/BW scaling
415 * @fps: holds current FPS
416 * @timeperframe: holds current time per frame structure
417 * @fmt_out: a reference to output format structure
418 * @fmt_cap: a reference to capture format structure
419 * @num_input_bufs: holds number of input buffers
420 * @num_output_bufs: holds number of output buffers
421 * @input_buf_size: holds input buffer size
422 * @output_buf_size: holds output buffer size
423 * @output2_buf_size: holds secondary decoder output buffer size
424 * @dpb_buftype: decoded picture buffer type
425 * @dpb_fmt: decoded picture buffer raw format
426 * @opb_buftype: output picture buffer type
427 * @opb_fmt: output picture buffer raw format
428 * @reconfig: a flag raised by decoder when the stream resolution changed
429 * @hfi_codec: current codec for this instance in HFI space
430 * @sequence_cap: a sequence counter for capture queue
431 * @sequence_out: a sequence counter for output queue
432 * @m2m_dev: a reference to m2m device structure
433 * @m2m_ctx: a reference to m2m context structure
434 * @ctx_q_lock: a lock to serialize video device ioctl calls
435 * @state: current state of the instance
436 * @done: a completion for sync HFI operation
437 * @error: an error returned during last HFI sync operation
438 * @session_error: a flag rised by HFI interface in case of session error
439 * @ops: HFI operations
440 * @session_type: the type of the session (decoder or encoder)
441 * @hprop: a union used as a holder by get property
442 * @core_acquired: the Core has been acquired
443 * @bit_depth: current bitstream bit-depth
444 * @pic_struct: bitstream progressive vs interlaced
445 * @next_buf_last: a flag to mark next queued capture buffer as last
446 * @drain_active: Drain sequence is in progress
447 * @flags: bitmask flags describing current instance mode
448 * @dpb_ids: DPB buffer ID's
449 */
450 struct venus_inst {
451 struct list_head list;
452 struct mutex lock;
453 struct venus_core *core;
454 struct clock_data clk_data;
455 struct list_head dpbbufs;
456 struct list_head internalbufs;
457 struct list_head registeredbufs;
458 struct list_head delayed_process;
459 struct work_struct delayed_process_work;
460 bool nonblock;
461
462 struct v4l2_ctrl_handler ctrl_handler;
463 union {
464 struct vdec_controls dec;
465 struct venc_controls enc;
466 } controls;
467 struct v4l2_fh fh;
468 unsigned int streamon_cap, streamon_out;
469 u32 width;
470 u32 height;
471 struct v4l2_rect crop;
472 u32 fw_min_cnt;
473 u32 out_width;
474 u32 out_height;
475 u32 colorspace;
476 u8 ycbcr_enc;
477 u8 quantization;
478 u8 xfer_func;
479 enum venus_dec_state codec_state;
480 enum venus_enc_state enc_state;
481 wait_queue_head_t reconf_wait;
482 unsigned int subscriptions;
483 int buf_count;
484 struct venus_ts_metadata tss[VIDEO_MAX_FRAME];
485 unsigned long payloads[VIDEO_MAX_FRAME];
486 u64 fps;
487 struct v4l2_fract timeperframe;
488 const struct venus_format *fmt_out;
489 const struct venus_format *fmt_cap;
490 unsigned int num_input_bufs;
491 unsigned int num_output_bufs;
492 unsigned int input_buf_size;
493 unsigned int output_buf_size;
494 unsigned int output2_buf_size;
495 u32 dpb_buftype;
496 u32 dpb_fmt;
497 u32 opb_buftype;
498 u32 opb_fmt;
499 bool reconfig;
500 u32 hfi_codec;
501 u32 sequence_cap;
502 u32 sequence_out;
503 struct v4l2_m2m_dev *m2m_dev;
504 struct v4l2_m2m_ctx *m2m_ctx;
505 struct mutex ctx_q_lock;
506 unsigned int state;
507 struct completion done;
508 unsigned int error;
509 bool session_error;
510 const struct hfi_inst_ops *ops;
511 u32 session_type;
512 union hfi_get_property hprop;
513 unsigned int core_acquired: 1;
514 unsigned int bit_depth;
515 unsigned int pic_struct;
516 bool next_buf_last;
517 bool drain_active;
518 enum venus_inst_modes flags;
519 struct ida dpb_ids;
520 };
521
522 #define IS_V1(core) ((core)->res->hfi_version == HFI_VERSION_1XX)
523 #define IS_V3(core) ((core)->res->hfi_version == HFI_VERSION_3XX)
524 #define IS_V4(core) ((core)->res->hfi_version == HFI_VERSION_4XX)
525 #define IS_V6(core) ((core)->res->hfi_version == HFI_VERSION_6XX)
526
527 #define IS_AR50(core) ((core)->res->vpu_version == VPU_VERSION_AR50)
528 #define IS_AR50_LITE(core) ((core)->res->vpu_version == VPU_VERSION_AR50_LITE)
529 #define IS_IRIS1(core) ((core)->res->vpu_version == VPU_VERSION_IRIS1)
530 #define IS_IRIS2(core) ((core)->res->vpu_version == VPU_VERSION_IRIS2)
531 #define IS_IRIS2_1(core) ((core)->res->vpu_version == VPU_VERSION_IRIS2_1)
532
533 #define ctrl_to_inst(ctrl) \
534 container_of((ctrl)->handler, struct venus_inst, ctrl_handler)
535
to_inst(struct file * filp)536 static inline struct venus_inst *to_inst(struct file *filp)
537 {
538 return container_of(filp->private_data, struct venus_inst, fh);
539 }
540
to_hfi_priv(struct venus_core * core)541 static inline void *to_hfi_priv(struct venus_core *core)
542 {
543 return core->priv;
544 }
545
546 static inline struct hfi_plat_caps *
venus_caps_by_codec(struct venus_core * core,u32 codec,u32 domain)547 venus_caps_by_codec(struct venus_core *core, u32 codec, u32 domain)
548 {
549 unsigned int c;
550
551 for (c = 0; c < core->codecs_count; c++) {
552 if (core->caps[c].codec == codec &&
553 core->caps[c].domain == domain)
554 return &core->caps[c];
555 }
556
557 return NULL;
558 }
559
560 static inline bool
is_fw_rev_or_newer(struct venus_core * core,u32 vmajor,u32 vminor,u32 vrev)561 is_fw_rev_or_newer(struct venus_core *core, u32 vmajor, u32 vminor, u32 vrev)
562 {
563 return ((core)->venus_ver.major == vmajor &&
564 (core)->venus_ver.minor == vminor &&
565 (core)->venus_ver.rev >= vrev);
566 }
567
568 static inline bool
is_fw_rev_or_older(struct venus_core * core,u32 vmajor,u32 vminor,u32 vrev)569 is_fw_rev_or_older(struct venus_core *core, u32 vmajor, u32 vminor, u32 vrev)
570 {
571 return ((core)->venus_ver.major == vmajor &&
572 (core)->venus_ver.minor == vminor &&
573 (core)->venus_ver.rev <= vrev);
574 }
575
576 void venus_close_common(struct venus_inst *inst);
577 #endif
578