1 /* 2 * QEMU ATmega MCU 3 * 4 * Copyright (c) 2019-2020 Philippe Mathieu-Daudé 5 * 6 * This work is licensed under the terms of the GNU GPLv2 or later. 7 * See the COPYING file in the top-level directory. 8 * SPDX-License-Identifier: GPL-2.0-or-later 9 */ 10 11 #ifndef HW_AVR_ATMEGA_H 12 #define HW_AVR_ATMEGA_H 13 14 #include "hw/char/avr_usart.h" 15 #include "hw/timer/avr_timer16.h" 16 #include "hw/misc/avr_power.h" 17 #include "target/avr/cpu.h" 18 #include "qom/object.h" 19 20 #define TYPE_ATMEGA_MCU "ATmega" 21 #define TYPE_ATMEGA168_MCU "ATmega168" 22 #define TYPE_ATMEGA328_MCU "ATmega328" 23 #define TYPE_ATMEGA1280_MCU "ATmega1280" 24 #define TYPE_ATMEGA2560_MCU "ATmega2560" 25 26 typedef struct AtmegaMcuState AtmegaMcuState; 27 DECLARE_INSTANCE_CHECKER(AtmegaMcuState, ATMEGA_MCU, 28 TYPE_ATMEGA_MCU) 29 30 #define POWER_MAX 2 31 #define USART_MAX 4 32 #define TIMER_MAX 6 33 #define GPIO_MAX 12 34 35 struct AtmegaMcuState { 36 /*< private >*/ 37 SysBusDevice parent_obj; 38 /*< public >*/ 39 40 AVRCPU cpu; 41 MemoryRegion flash; 42 MemoryRegion eeprom; 43 MemoryRegion sram; 44 MemoryRegion sram_io; 45 DeviceState *io; 46 AVRMaskState pwr[POWER_MAX]; 47 AVRUsartState usart[USART_MAX]; 48 AVRTimer16State timer[TIMER_MAX]; 49 uint64_t xtal_freq_hz; 50 }; 51 52 #endif /* HW_AVR_ATMEGA_H */ 53