1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2024 Intel Corporation */ 3 4 #ifndef _QUICKI2C_DEV_H_ 5 #define _QUICKI2C_DEV_H_ 6 7 #include <linux/hid-over-i2c.h> 8 #include <linux/workqueue.h> 9 10 #define PCI_DEVICE_ID_INTEL_THC_LNL_DEVICE_ID_I2C_PORT1 0xA848 11 #define PCI_DEVICE_ID_INTEL_THC_LNL_DEVICE_ID_I2C_PORT2 0xA84A 12 #define PCI_DEVICE_ID_INTEL_THC_PTL_H_DEVICE_ID_I2C_PORT1 0xE348 13 #define PCI_DEVICE_ID_INTEL_THC_PTL_H_DEVICE_ID_I2C_PORT2 0xE34A 14 #define PCI_DEVICE_ID_INTEL_THC_PTL_U_DEVICE_ID_I2C_PORT1 0xE448 15 #define PCI_DEVICE_ID_INTEL_THC_PTL_U_DEVICE_ID_I2C_PORT2 0xE44A 16 17 /* Packet size value, the unit is 16 bytes */ 18 #define MAX_PACKET_SIZE_VALUE_LNL 256 19 20 /* HIDI2C special ACPI parameters DSD name */ 21 #define QUICKI2C_ACPI_METHOD_NAME_ICRS "ICRS" 22 #define QUICKI2C_ACPI_METHOD_NAME_ISUB "ISUB" 23 24 /* HIDI2C special ACPI parameters DSM methods */ 25 #define QUICKI2C_ACPI_REVISION_NUM 1 26 #define QUICKI2C_ACPI_FUNC_NUM_HID_DESC_ADDR 1 27 #define QUICKI2C_ACPI_FUNC_NUM_ACTIVE_LTR_VAL 1 28 #define QUICKI2C_ACPI_FUNC_NUM_LP_LTR_VAL 2 29 30 #define QUICKI2C_SUBIP_STANDARD_MODE_MAX_SPEED 100000 31 #define QUICKI2C_SUBIP_FAST_MODE_MAX_SPEED 400000 32 #define QUICKI2C_SUBIP_FASTPLUS_MODE_MAX_SPEED 1000000 33 #define QUICKI2C_SUBIP_HIGH_SPEED_MODE_MAX_SPEED 3400000 34 35 #define QUICKI2C_DEFAULT_ACTIVE_LTR_VALUE 5 36 #define QUICKI2C_DEFAULT_LP_LTR_VALUE 500 37 #define QUICKI2C_RPM_TIMEOUT_MS 500 38 39 /* PTL Max packet size detection capability is 255 Bytes */ 40 #define MAX_RX_DETECT_SIZE_PTL 255 41 42 /* Default interrupt delay is 1ms, suitable for most devices */ 43 #define DEFAULT_INTERRUPT_DELAY_US (1 * USEC_PER_MSEC) 44 45 /* 46 * THC uses runtime auto suspend to dynamically switch between THC active LTR 47 * and low power LTR to save CPU power. 48 * Default value is 5000ms, that means if no touch event in this time, THC will 49 * change to low power LTR mode. 50 */ 51 #define DEFAULT_AUTO_SUSPEND_DELAY_MS 5000 52 53 enum quicki2c_dev_state { 54 QUICKI2C_NONE, 55 QUICKI2C_RESETING, 56 QUICKI2C_RESETED, 57 QUICKI2C_INITED, 58 QUICKI2C_ENABLED, 59 QUICKI2C_DISABLED, 60 }; 61 62 enum { 63 HIDI2C_ADDRESSING_MODE_7BIT, 64 HIDI2C_ADDRESSING_MODE_10BIT, 65 }; 66 67 /** 68 * struct quicki2c_subip_acpi_parameter - QuickI2C ACPI DSD parameters 69 * @device_address: I2C device slave address 70 * @connection_speed: I2C device expected connection speed 71 * @addressing_mode: I2C device slave address mode, 7bit or 10bit 72 * 73 * Those properties get from QUICKI2C_ACPI_METHOD_NAME_ICRS method, used for 74 * Bus parameter. 75 */ 76 struct quicki2c_subip_acpi_parameter { 77 u16 device_address; 78 u64 connection_speed; 79 u8 addressing_mode; 80 } __packed; 81 82 /** 83 * struct quicki2c_subip_acpi_config - QuickI2C ACPI DSD parameters 84 * @SMHX: Standard Mode (100 kbit/s) Serial Clock Line HIGH Period 85 * @SMLX: Standard Mode (100 kbit/s) Serial Clock Line LOW Period 86 * @SMTD: Standard Mode (100 kbit/s) Serial Data Line Transmit Hold Period 87 * @SMRD: Standard Mode (100 kbit/s) Serial Data Receive Hold Period 88 * @FMHX: Fast Mode (400 kbit/s) Serial Clock Line HIGH Period 89 * @FMLX: Fast Mode (400 kbit/s) Serial Clock Line LOW Period 90 * @FMTD: Fast Mode (400 kbit/s) Serial Data Line Transmit Hold Period 91 * @FMRD: Fast Mode (400 kbit/s) Serial Data Line Receive Hold Period 92 * @FMSL: Maximum length (in ic_clk_cycles) of suppressed spikes 93 * in Standard Mode, Fast Mode and Fast Mode Plus 94 * @FPHX: Fast Mode Plus (1Mbit/sec) Serial Clock Line HIGH Period 95 * @FPLX: Fast Mode Plus (1Mbit/sec) Serial Clock Line LOW Period 96 * @FPTD: Fast Mode Plus (1Mbit/sec) Serial Data Line Transmit HOLD Period 97 * @FPRD: Fast Mode Plus (1Mbit/sec) Serial Data Line Receive HOLD Period 98 * @HMHX: High Speed Mode Plus (3.4Mbits/sec) Serial Clock Line HIGH Period 99 * @HMLX: High Speed Mode Plus (3.4Mbits/sec) Serial Clock Line LOW Period 100 * @HMTD: High Speed Mode Plus (3.4Mbits/sec) Serial Data Line Transmit HOLD Period 101 * @HMRD: High Speed Mode Plus (3.4Mbits/sec) Serial Data Line Receive HOLD Period 102 * @HMSL: Maximum length (in ic_clk_cycles) of suppressed spikes in High Speed Mode 103 * 104 * Those properties get from QUICKI2C_ACPI_METHOD_NAME_ISUB method, used for 105 * I2C timing configure. 106 */ 107 struct quicki2c_subip_acpi_config { 108 u64 SMHX; 109 u64 SMLX; 110 u64 SMTD; 111 u64 SMRD; 112 113 u64 FMHX; 114 u64 FMLX; 115 u64 FMTD; 116 u64 FMRD; 117 u64 FMSL; 118 119 u64 FPHX; 120 u64 FPLX; 121 u64 FPTD; 122 u64 FPRD; 123 124 u64 HMHX; 125 u64 HMLX; 126 u64 HMTD; 127 u64 HMRD; 128 u64 HMSL; 129 }; 130 131 /** 132 * struct quicki2c_ddata - Driver specific data for quicki2c device 133 * @max_detect_size: Identify max packet size detect for rx 134 * @interrupt_delay: Identify interrupt detect delay for rx 135 */ 136 struct quicki2c_ddata { 137 u32 max_detect_size; 138 u32 interrupt_delay; 139 }; 140 141 struct device; 142 struct pci_dev; 143 struct thc_device; 144 struct hid_device; 145 struct acpi_device; 146 147 /** 148 * struct quicki2c_device - THC QuickI2C device struct 149 * @dev: Point to kernel device 150 * @pdev: Point to PCI device 151 * @thc_hw: Point to THC device 152 * @hid_dev: Point to HID device 153 * @acpi_dev: Point to ACPI device 154 * @ddata: Point to QuickI2C platform specific driver data 155 * @state: THC I2C device state 156 * @mem_addr: MMIO memory address 157 * @dev_desc: Device descriptor for HIDI2C protocol 158 * @i2c_slave_addr: HIDI2C device slave address 159 * @hid_desc_addr: Register address for retrieve HID device descriptor 160 * @active_ltr_val: THC active LTR value 161 * @low_power_ltr_val: THC low power LTR value 162 * @i2c_speed_mode: 0 - standard mode, 1 - fast mode, 2 - fast mode plus 163 * @i2c_clock_hcnt: I2C CLK high period time (unit in cycle count) 164 * @i2c_clock_lcnt: I2C CLK low period time (unit in cycle count) 165 * @report_descriptor: Store a copy of device report descriptor 166 * @input_buf: Store a copy of latest input report data 167 * @report_buf: Store a copy of latest input/output report packet from set/get feature 168 * @report_len: The length of input/output report packet 169 * @reset_ack_wq: Workqueue for waiting reset response from device 170 * @reset_ack: Indicate reset response received or not 171 */ 172 struct quicki2c_device { 173 struct device *dev; 174 struct pci_dev *pdev; 175 struct thc_device *thc_hw; 176 struct hid_device *hid_dev; 177 struct acpi_device *acpi_dev; 178 const struct quicki2c_ddata *ddata; 179 enum quicki2c_dev_state state; 180 181 void __iomem *mem_addr; 182 183 struct hidi2c_dev_descriptor dev_desc; 184 u8 i2c_slave_addr; 185 u16 hid_desc_addr; 186 187 u32 active_ltr_val; 188 u32 low_power_ltr_val; 189 190 u32 i2c_speed_mode; 191 u32 i2c_clock_hcnt; 192 u32 i2c_clock_lcnt; 193 194 u8 *report_descriptor; 195 u8 *input_buf; 196 u8 *report_buf; 197 u32 report_len; 198 199 wait_queue_head_t reset_ack_wq; 200 bool reset_ack; 201 }; 202 203 #endif /* _QUICKI2C_DEV_H_ */ 204