xref: /linux/drivers/gpu/drm/xe/xe_guc_capture_types.h (revision ab93e0dd72c37d378dd936f031ffb83ff2bd87ce)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2021-2024 Intel Corporation
4  */
5 
6 #ifndef _XE_GUC_CAPTURE_TYPES_H
7 #define _XE_GUC_CAPTURE_TYPES_H
8 
9 #include <linux/types.h>
10 #include "regs/xe_reg_defs.h"
11 
12 struct xe_guc;
13 
14 /* data type of the register in register list */
15 enum capture_register_data_type {
16 	REG_32BIT = 0,
17 	REG_64BIT_LOW_DW,
18 	REG_64BIT_HI_DW,
19 };
20 
21 /**
22  * struct __guc_mmio_reg_descr - GuC mmio register descriptor
23  *
24  * xe_guc_capture module uses these structures to define a register
25  * (offsets, names, flags,...) that are used at the ADS registration
26  * time as well as during runtime processing and reporting of error-
27  * capture states generated by GuC just prior to engine reset events.
28  */
29 struct __guc_mmio_reg_descr {
30 	/** @reg: the register */
31 	struct xe_reg reg;
32 	/**
33 	 * @data_type: data type of the register
34 	 * Could be 32 bit, low or hi dword of a 64 bit, see enum
35 	 * register_data_type
36 	 */
37 	enum capture_register_data_type data_type;
38 	/** @flags: Flags for the register */
39 	u32 flags;
40 	/** @mask: The mask to apply */
41 	u32 mask;
42 	/** @dss_id: Cached index for steered registers */
43 	u32 dss_id;
44 	/** @regname: Name of the register */
45 	const char *regname;
46 };
47 
48 /**
49  * struct __guc_mmio_reg_descr_group - The group of register descriptor
50  *
51  * xe_guc_capture module uses these structures to maintain static
52  * tables (per unique platform) that consists of lists of registers
53  * (offsets, names, flags,...) that are used at the ADS registration
54  * time as well as during runtime processing and reporting of error-
55  * capture states generated by GuC just prior to engine reset events.
56  */
57 struct __guc_mmio_reg_descr_group {
58 	/** @list: The register list */
59 	const struct __guc_mmio_reg_descr *list;
60 	/** @num_regs: Count of registers in the list */
61 	u32 num_regs;
62 	/** @owner: PF/VF owner, see enum guc_capture_list_index_type */
63 	u32 owner;
64 	/** @type: Capture register type, see enum guc_state_capture_type */
65 	u32 type;
66 	/** @engine: The engine class, see enum guc_capture_list_class_type */
67 	u32 engine;
68 };
69 
70 #endif
71