/qemu/target/avr/ |
H A D | translate.c | 216 static void gen_add_CHf(TCGv R, TCGv Rd, TCGv Rr) in gen_add_CHf() 233 static void gen_add_Vf(TCGv R, TCGv Rd, TCGv Rr) in gen_add_Vf() 247 static void gen_sub_CHf(TCGv R, TCGv Rd, TCGv Rr) in gen_sub_CHf() 264 static void gen_sub_Vf(TCGv R, TCGv Rd, TCGv Rr) in gen_sub_Vf() 278 static void gen_NSf(TCGv R) in gen_NSf() 284 static void gen_ZNSf(TCGv R) in gen_ZNSf() 301 TCGv R = tcg_temp_new_i32(); in trans_ADD() local 324 TCGv R = tcg_temp_new_i32(); in trans_ADC() local 356 TCGv R = tcg_temp_new_i32(); in trans_ADIW() local 386 TCGv R = tcg_temp_new_i32(); in trans_SUB() local [all …]
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/qemu/rust/qemu-api/src/ |
H A D | callbacks.rs | 169 fn call(a: Args) -> R; in call() 180 fn call(_a: Args) -> R { in call()
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H A D | sysbus.rs | 122 impl<R: ObjectDeref> SysBusDeviceMethods for R where R::Target: IsA<SysBusDevice> {} implementation
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H A D | qdev.rs | 403 impl<R: ObjectDeref> DeviceMethods for R where R::Target: IsA<DeviceState> {} implementation
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H A D | qom.rs | 950 impl<R: ObjectDeref> ObjectMethods for R where R::Target: IsA<Object> {} implementation
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/qemu/scripts/codeconverter/codeconverter/ |
H A D | regexps.py | 59 OPTIONAL_PARS = lambda R: OR(S(r'\(\s*', R, r'\s*\)'), R) argument
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/qemu/target/s390x/tcg/ |
H A D | crypto_helper.c | 22 static uint64_t R(uint64_t x, int c) in R() function
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H A D | translate.c | 958 #define R(N, B) { B, 4, 0, FLD_C_r##N, FLD_O_r##N } macro
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/qemu/target/mips/tcg/system/ |
H A D | tlb_helper.c | 1173 int R = env->CP0_BadVAddr >> 62; in mips_cpu_do_interrupt() local 1194 int R = env->CP0_BadVAddr >> 62; in mips_cpu_do_interrupt() local
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/qemu/target/tricore/ |
H A D | cpu.h | 49 #define R(ADDR, NAME, FEATURE) uint32_t NAME; macro
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H A D | translate.c | 340 #define R(ADDRESS, REG, FEATURE) \ macro 363 #define R(ADDRESS, REG, FEATURE) /* don't gen writes to read-only reg, macro
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/qemu/fpu/ |
H A D | softfloat.c | 588 #define FLOATX80_PARAMS(R) \ argument 843 #define parts_round_to_int_normal(A, R, C, F) \ argument 853 #define parts_round_to_int(A, R, C, S, F) \ argument 863 #define parts_float_to_sint(P, R, Z, MN, MX, S) \ argument 873 #define parts_float_to_uint(P, R, Z, M, S) \ argument 883 #define parts_float_to_sint_modulo(P, R, M, S) \ argument 891 #define parts_float_to_sint(P, R, Z, MN, MX, S) \ argument 969 #define frac_add(R, A, B) FRAC_GENERIC_64_128_256(add, R)(R, A, B) argument 982 #define frac_addi(R, A, C) FRAC_GENERIC_64_128(addi, R)(R, A, C) argument 1133 #define frac_mulw(R, A, B) FRAC_GENERIC_64_128(mulw, A)(R, A, B) argument [all …]
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/qemu/hw/display/ |
H A D | exynos4210_fimd.c | 377 #define DEF_PIXEL_TO_RGB_A1(N, R, G, B) \ argument 400 #define DEF_PIXEL_TO_RGB_A0(N, R, G, B) \ argument 420 #define DEF_PIXEL_TO_RGB_A(N, R, G, B, A) \ argument
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/qemu/include/hw/i2c/ |
H A D | pmbus_device.h | 446 int32_t R; /* exponent */ member
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/qemu/hw/net/ |
H A D | pcnet.c | 273 #define PRINT_RMD(R) printf( \ argument
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/qemu/target/microblaze/ |
H A D | translate.c | 1853 #define R(X) { &cpu_R[X], offsetof(CPUMBState, regs[X]), "r" #X } in mb_tcg_init() macro
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/qemu/target/arm/tcg/ |
H A D | mve_helper.c | 760 #define mergemask(D, R, M) \ argument
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