1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_PARAVIRT_H
3 #define _ASM_X86_PARAVIRT_H
4 /* Various instructions on x86 need to be replaced for
5 * para-virtualization: those hooks are defined here. */
6
7 #include <asm/paravirt_types.h>
8
9 #ifndef __ASSEMBLER__
10 struct mm_struct;
11 #endif
12
13 #ifdef CONFIG_PARAVIRT
14 #include <asm/pgtable_types.h>
15 #include <asm/asm.h>
16 #include <asm/nospec-branch.h>
17
18 #ifndef __ASSEMBLER__
19 #include <linux/bug.h>
20 #include <linux/types.h>
21 #include <linux/cpumask.h>
22 #include <linux/static_call_types.h>
23 #include <asm/frame.h>
24
25 u64 dummy_steal_clock(int cpu);
26 u64 dummy_sched_clock(void);
27
28 DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock);
29 DECLARE_STATIC_CALL(pv_sched_clock, dummy_sched_clock);
30
31 void paravirt_set_sched_clock(u64 (*func)(void));
32
paravirt_sched_clock(void)33 static __always_inline u64 paravirt_sched_clock(void)
34 {
35 return static_call(pv_sched_clock)();
36 }
37
38 struct static_key;
39 extern struct static_key paravirt_steal_enabled;
40 extern struct static_key paravirt_steal_rq_enabled;
41
42 __visible void __native_queued_spin_unlock(struct qspinlock *lock);
43 bool pv_is_native_spin_unlock(void);
44 __visible bool __native_vcpu_is_preempted(long cpu);
45 bool pv_is_native_vcpu_is_preempted(void);
46
paravirt_steal_clock(int cpu)47 static inline u64 paravirt_steal_clock(int cpu)
48 {
49 return static_call(pv_steal_clock)(cpu);
50 }
51
52 #ifdef CONFIG_PARAVIRT_SPINLOCKS
53 void __init paravirt_set_cap(void);
54 #endif
55
56 /* The paravirtualized I/O functions */
slow_down_io(void)57 static inline void slow_down_io(void)
58 {
59 PVOP_VCALL0(cpu.io_delay);
60 #ifdef REALLY_SLOW_IO
61 PVOP_VCALL0(cpu.io_delay);
62 PVOP_VCALL0(cpu.io_delay);
63 PVOP_VCALL0(cpu.io_delay);
64 #endif
65 }
66
67 void native_flush_tlb_local(void);
68 void native_flush_tlb_global(void);
69 void native_flush_tlb_one_user(unsigned long addr);
70 void native_flush_tlb_multi(const struct cpumask *cpumask,
71 const struct flush_tlb_info *info);
72
__flush_tlb_local(void)73 static inline void __flush_tlb_local(void)
74 {
75 PVOP_VCALL0(mmu.flush_tlb_user);
76 }
77
__flush_tlb_global(void)78 static inline void __flush_tlb_global(void)
79 {
80 PVOP_VCALL0(mmu.flush_tlb_kernel);
81 }
82
__flush_tlb_one_user(unsigned long addr)83 static inline void __flush_tlb_one_user(unsigned long addr)
84 {
85 PVOP_VCALL1(mmu.flush_tlb_one_user, addr);
86 }
87
__flush_tlb_multi(const struct cpumask * cpumask,const struct flush_tlb_info * info)88 static inline void __flush_tlb_multi(const struct cpumask *cpumask,
89 const struct flush_tlb_info *info)
90 {
91 PVOP_VCALL2(mmu.flush_tlb_multi, cpumask, info);
92 }
93
paravirt_arch_exit_mmap(struct mm_struct * mm)94 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
95 {
96 PVOP_VCALL1(mmu.exit_mmap, mm);
97 }
98
notify_page_enc_status_changed(unsigned long pfn,int npages,bool enc)99 static inline void notify_page_enc_status_changed(unsigned long pfn,
100 int npages, bool enc)
101 {
102 PVOP_VCALL3(mmu.notify_page_enc_status_changed, pfn, npages, enc);
103 }
104
arch_safe_halt(void)105 static __always_inline void arch_safe_halt(void)
106 {
107 PVOP_VCALL0(irq.safe_halt);
108 }
109
halt(void)110 static inline void halt(void)
111 {
112 PVOP_VCALL0(irq.halt);
113 }
114
115 #ifdef CONFIG_PARAVIRT_XXL
load_sp0(unsigned long sp0)116 static inline void load_sp0(unsigned long sp0)
117 {
118 PVOP_VCALL1(cpu.load_sp0, sp0);
119 }
120
121 /* The paravirtualized CPUID instruction. */
__cpuid(unsigned int * eax,unsigned int * ebx,unsigned int * ecx,unsigned int * edx)122 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
123 unsigned int *ecx, unsigned int *edx)
124 {
125 PVOP_VCALL4(cpu.cpuid, eax, ebx, ecx, edx);
126 }
127
128 /*
129 * These special macros can be used to get or set a debugging register
130 */
paravirt_get_debugreg(int reg)131 static __always_inline unsigned long paravirt_get_debugreg(int reg)
132 {
133 return PVOP_CALL1(unsigned long, cpu.get_debugreg, reg);
134 }
135 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
set_debugreg(unsigned long val,int reg)136 static __always_inline void set_debugreg(unsigned long val, int reg)
137 {
138 PVOP_VCALL2(cpu.set_debugreg, reg, val);
139 }
140
read_cr0(void)141 static inline unsigned long read_cr0(void)
142 {
143 return PVOP_CALL0(unsigned long, cpu.read_cr0);
144 }
145
write_cr0(unsigned long x)146 static inline void write_cr0(unsigned long x)
147 {
148 PVOP_VCALL1(cpu.write_cr0, x);
149 }
150
read_cr2(void)151 static __always_inline unsigned long read_cr2(void)
152 {
153 return PVOP_ALT_CALLEE0(unsigned long, mmu.read_cr2,
154 "mov %%cr2, %%rax;", ALT_NOT_XEN);
155 }
156
write_cr2(unsigned long x)157 static __always_inline void write_cr2(unsigned long x)
158 {
159 PVOP_VCALL1(mmu.write_cr2, x);
160 }
161
__read_cr3(void)162 static inline unsigned long __read_cr3(void)
163 {
164 return PVOP_ALT_CALL0(unsigned long, mmu.read_cr3,
165 "mov %%cr3, %%rax;", ALT_NOT_XEN);
166 }
167
write_cr3(unsigned long x)168 static inline void write_cr3(unsigned long x)
169 {
170 PVOP_ALT_VCALL1(mmu.write_cr3, x, "mov %%rdi, %%cr3", ALT_NOT_XEN);
171 }
172
__write_cr4(unsigned long x)173 static inline void __write_cr4(unsigned long x)
174 {
175 PVOP_VCALL1(cpu.write_cr4, x);
176 }
177
paravirt_read_msr(u32 msr)178 static inline u64 paravirt_read_msr(u32 msr)
179 {
180 return PVOP_CALL1(u64, cpu.read_msr, msr);
181 }
182
paravirt_write_msr(u32 msr,u64 val)183 static inline void paravirt_write_msr(u32 msr, u64 val)
184 {
185 PVOP_VCALL2(cpu.write_msr, msr, val);
186 }
187
paravirt_read_msr_safe(u32 msr,u64 * val)188 static inline int paravirt_read_msr_safe(u32 msr, u64 *val)
189 {
190 return PVOP_CALL2(int, cpu.read_msr_safe, msr, val);
191 }
192
paravirt_write_msr_safe(u32 msr,u64 val)193 static inline int paravirt_write_msr_safe(u32 msr, u64 val)
194 {
195 return PVOP_CALL2(int, cpu.write_msr_safe, msr, val);
196 }
197
198 #define rdmsr(msr, val1, val2) \
199 do { \
200 u64 _l = paravirt_read_msr(msr); \
201 val1 = (u32)_l; \
202 val2 = _l >> 32; \
203 } while (0)
204
wrmsr(u32 msr,u32 low,u32 high)205 static __always_inline void wrmsr(u32 msr, u32 low, u32 high)
206 {
207 paravirt_write_msr(msr, (u64)high << 32 | low);
208 }
209
210 #define rdmsrq(msr, val) \
211 do { \
212 val = paravirt_read_msr(msr); \
213 } while (0)
214
wrmsrq(u32 msr,u64 val)215 static inline void wrmsrq(u32 msr, u64 val)
216 {
217 paravirt_write_msr(msr, val);
218 }
219
wrmsrq_safe(u32 msr,u64 val)220 static inline int wrmsrq_safe(u32 msr, u64 val)
221 {
222 return paravirt_write_msr_safe(msr, val);
223 }
224
225 /* rdmsr with exception handling */
226 #define rdmsr_safe(msr, a, b) \
227 ({ \
228 u64 _l; \
229 int _err = paravirt_read_msr_safe((msr), &_l); \
230 (*a) = (u32)_l; \
231 (*b) = (u32)(_l >> 32); \
232 _err; \
233 })
234
rdmsrq_safe(u32 msr,u64 * p)235 static __always_inline int rdmsrq_safe(u32 msr, u64 *p)
236 {
237 return paravirt_read_msr_safe(msr, p);
238 }
239
rdpmc(int counter)240 static __always_inline u64 rdpmc(int counter)
241 {
242 return PVOP_CALL1(u64, cpu.read_pmc, counter);
243 }
244
paravirt_alloc_ldt(struct desc_struct * ldt,unsigned entries)245 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
246 {
247 PVOP_VCALL2(cpu.alloc_ldt, ldt, entries);
248 }
249
paravirt_free_ldt(struct desc_struct * ldt,unsigned entries)250 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
251 {
252 PVOP_VCALL2(cpu.free_ldt, ldt, entries);
253 }
254
load_TR_desc(void)255 static inline void load_TR_desc(void)
256 {
257 PVOP_VCALL0(cpu.load_tr_desc);
258 }
load_gdt(const struct desc_ptr * dtr)259 static inline void load_gdt(const struct desc_ptr *dtr)
260 {
261 PVOP_VCALL1(cpu.load_gdt, dtr);
262 }
load_idt(const struct desc_ptr * dtr)263 static inline void load_idt(const struct desc_ptr *dtr)
264 {
265 PVOP_VCALL1(cpu.load_idt, dtr);
266 }
set_ldt(const void * addr,unsigned entries)267 static inline void set_ldt(const void *addr, unsigned entries)
268 {
269 PVOP_VCALL2(cpu.set_ldt, addr, entries);
270 }
paravirt_store_tr(void)271 static inline unsigned long paravirt_store_tr(void)
272 {
273 return PVOP_CALL0(unsigned long, cpu.store_tr);
274 }
275
276 #define store_tr(tr) ((tr) = paravirt_store_tr())
load_TLS(struct thread_struct * t,unsigned cpu)277 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
278 {
279 PVOP_VCALL2(cpu.load_tls, t, cpu);
280 }
281
load_gs_index(unsigned int gs)282 static inline void load_gs_index(unsigned int gs)
283 {
284 PVOP_VCALL1(cpu.load_gs_index, gs);
285 }
286
write_ldt_entry(struct desc_struct * dt,int entry,const void * desc)287 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
288 const void *desc)
289 {
290 PVOP_VCALL3(cpu.write_ldt_entry, dt, entry, desc);
291 }
292
write_gdt_entry(struct desc_struct * dt,int entry,void * desc,int type)293 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
294 void *desc, int type)
295 {
296 PVOP_VCALL4(cpu.write_gdt_entry, dt, entry, desc, type);
297 }
298
write_idt_entry(gate_desc * dt,int entry,const gate_desc * g)299 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
300 {
301 PVOP_VCALL3(cpu.write_idt_entry, dt, entry, g);
302 }
303
304 #ifdef CONFIG_X86_IOPL_IOPERM
tss_invalidate_io_bitmap(void)305 static inline void tss_invalidate_io_bitmap(void)
306 {
307 PVOP_VCALL0(cpu.invalidate_io_bitmap);
308 }
309
tss_update_io_bitmap(void)310 static inline void tss_update_io_bitmap(void)
311 {
312 PVOP_VCALL0(cpu.update_io_bitmap);
313 }
314 #endif
315
paravirt_enter_mmap(struct mm_struct * next)316 static inline void paravirt_enter_mmap(struct mm_struct *next)
317 {
318 PVOP_VCALL1(mmu.enter_mmap, next);
319 }
320
paravirt_pgd_alloc(struct mm_struct * mm)321 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
322 {
323 return PVOP_CALL1(int, mmu.pgd_alloc, mm);
324 }
325
paravirt_pgd_free(struct mm_struct * mm,pgd_t * pgd)326 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
327 {
328 PVOP_VCALL2(mmu.pgd_free, mm, pgd);
329 }
330
paravirt_alloc_pte(struct mm_struct * mm,unsigned long pfn)331 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
332 {
333 PVOP_VCALL2(mmu.alloc_pte, mm, pfn);
334 }
paravirt_release_pte(unsigned long pfn)335 static inline void paravirt_release_pte(unsigned long pfn)
336 {
337 PVOP_VCALL1(mmu.release_pte, pfn);
338 }
339
paravirt_alloc_pmd(struct mm_struct * mm,unsigned long pfn)340 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
341 {
342 PVOP_VCALL2(mmu.alloc_pmd, mm, pfn);
343 }
344
paravirt_release_pmd(unsigned long pfn)345 static inline void paravirt_release_pmd(unsigned long pfn)
346 {
347 PVOP_VCALL1(mmu.release_pmd, pfn);
348 }
349
paravirt_alloc_pud(struct mm_struct * mm,unsigned long pfn)350 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
351 {
352 PVOP_VCALL2(mmu.alloc_pud, mm, pfn);
353 }
paravirt_release_pud(unsigned long pfn)354 static inline void paravirt_release_pud(unsigned long pfn)
355 {
356 PVOP_VCALL1(mmu.release_pud, pfn);
357 }
358
paravirt_alloc_p4d(struct mm_struct * mm,unsigned long pfn)359 static inline void paravirt_alloc_p4d(struct mm_struct *mm, unsigned long pfn)
360 {
361 PVOP_VCALL2(mmu.alloc_p4d, mm, pfn);
362 }
363
paravirt_release_p4d(unsigned long pfn)364 static inline void paravirt_release_p4d(unsigned long pfn)
365 {
366 PVOP_VCALL1(mmu.release_p4d, pfn);
367 }
368
__pte(pteval_t val)369 static inline pte_t __pte(pteval_t val)
370 {
371 return (pte_t) { PVOP_ALT_CALLEE1(pteval_t, mmu.make_pte, val,
372 "mov %%rdi, %%rax", ALT_NOT_XEN) };
373 }
374
pte_val(pte_t pte)375 static inline pteval_t pte_val(pte_t pte)
376 {
377 return PVOP_ALT_CALLEE1(pteval_t, mmu.pte_val, pte.pte,
378 "mov %%rdi, %%rax", ALT_NOT_XEN);
379 }
380
__pgd(pgdval_t val)381 static inline pgd_t __pgd(pgdval_t val)
382 {
383 return (pgd_t) { PVOP_ALT_CALLEE1(pgdval_t, mmu.make_pgd, val,
384 "mov %%rdi, %%rax", ALT_NOT_XEN) };
385 }
386
pgd_val(pgd_t pgd)387 static inline pgdval_t pgd_val(pgd_t pgd)
388 {
389 return PVOP_ALT_CALLEE1(pgdval_t, mmu.pgd_val, pgd.pgd,
390 "mov %%rdi, %%rax", ALT_NOT_XEN);
391 }
392
393 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
ptep_modify_prot_start(struct vm_area_struct * vma,unsigned long addr,pte_t * ptep)394 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma, unsigned long addr,
395 pte_t *ptep)
396 {
397 pteval_t ret;
398
399 ret = PVOP_CALL3(pteval_t, mmu.ptep_modify_prot_start, vma, addr, ptep);
400
401 return (pte_t) { .pte = ret };
402 }
403
ptep_modify_prot_commit(struct vm_area_struct * vma,unsigned long addr,pte_t * ptep,pte_t old_pte,pte_t pte)404 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr,
405 pte_t *ptep, pte_t old_pte, pte_t pte)
406 {
407
408 PVOP_VCALL4(mmu.ptep_modify_prot_commit, vma, addr, ptep, pte.pte);
409 }
410
set_pte(pte_t * ptep,pte_t pte)411 static inline void set_pte(pte_t *ptep, pte_t pte)
412 {
413 PVOP_VCALL2(mmu.set_pte, ptep, pte.pte);
414 }
415
set_pmd(pmd_t * pmdp,pmd_t pmd)416 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
417 {
418 PVOP_VCALL2(mmu.set_pmd, pmdp, native_pmd_val(pmd));
419 }
420
__pmd(pmdval_t val)421 static inline pmd_t __pmd(pmdval_t val)
422 {
423 return (pmd_t) { PVOP_ALT_CALLEE1(pmdval_t, mmu.make_pmd, val,
424 "mov %%rdi, %%rax", ALT_NOT_XEN) };
425 }
426
pmd_val(pmd_t pmd)427 static inline pmdval_t pmd_val(pmd_t pmd)
428 {
429 return PVOP_ALT_CALLEE1(pmdval_t, mmu.pmd_val, pmd.pmd,
430 "mov %%rdi, %%rax", ALT_NOT_XEN);
431 }
432
set_pud(pud_t * pudp,pud_t pud)433 static inline void set_pud(pud_t *pudp, pud_t pud)
434 {
435 PVOP_VCALL2(mmu.set_pud, pudp, native_pud_val(pud));
436 }
437
__pud(pudval_t val)438 static inline pud_t __pud(pudval_t val)
439 {
440 pudval_t ret;
441
442 ret = PVOP_ALT_CALLEE1(pudval_t, mmu.make_pud, val,
443 "mov %%rdi, %%rax", ALT_NOT_XEN);
444
445 return (pud_t) { ret };
446 }
447
pud_val(pud_t pud)448 static inline pudval_t pud_val(pud_t pud)
449 {
450 return PVOP_ALT_CALLEE1(pudval_t, mmu.pud_val, pud.pud,
451 "mov %%rdi, %%rax", ALT_NOT_XEN);
452 }
453
pud_clear(pud_t * pudp)454 static inline void pud_clear(pud_t *pudp)
455 {
456 set_pud(pudp, native_make_pud(0));
457 }
458
set_p4d(p4d_t * p4dp,p4d_t p4d)459 static inline void set_p4d(p4d_t *p4dp, p4d_t p4d)
460 {
461 p4dval_t val = native_p4d_val(p4d);
462
463 PVOP_VCALL2(mmu.set_p4d, p4dp, val);
464 }
465
__p4d(p4dval_t val)466 static inline p4d_t __p4d(p4dval_t val)
467 {
468 p4dval_t ret = PVOP_ALT_CALLEE1(p4dval_t, mmu.make_p4d, val,
469 "mov %%rdi, %%rax", ALT_NOT_XEN);
470
471 return (p4d_t) { ret };
472 }
473
p4d_val(p4d_t p4d)474 static inline p4dval_t p4d_val(p4d_t p4d)
475 {
476 return PVOP_ALT_CALLEE1(p4dval_t, mmu.p4d_val, p4d.p4d,
477 "mov %%rdi, %%rax", ALT_NOT_XEN);
478 }
479
__set_pgd(pgd_t * pgdp,pgd_t pgd)480 static inline void __set_pgd(pgd_t *pgdp, pgd_t pgd)
481 {
482 PVOP_VCALL2(mmu.set_pgd, pgdp, native_pgd_val(pgd));
483 }
484
485 #define set_pgd(pgdp, pgdval) do { \
486 if (pgtable_l5_enabled()) \
487 __set_pgd(pgdp, pgdval); \
488 else \
489 set_p4d((p4d_t *)(pgdp), (p4d_t) { (pgdval).pgd }); \
490 } while (0)
491
492 #define pgd_clear(pgdp) do { \
493 if (pgtable_l5_enabled()) \
494 set_pgd(pgdp, native_make_pgd(0)); \
495 } while (0)
496
p4d_clear(p4d_t * p4dp)497 static inline void p4d_clear(p4d_t *p4dp)
498 {
499 set_p4d(p4dp, native_make_p4d(0));
500 }
501
set_pte_atomic(pte_t * ptep,pte_t pte)502 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
503 {
504 set_pte(ptep, pte);
505 }
506
pte_clear(struct mm_struct * mm,unsigned long addr,pte_t * ptep)507 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
508 pte_t *ptep)
509 {
510 set_pte(ptep, native_make_pte(0));
511 }
512
pmd_clear(pmd_t * pmdp)513 static inline void pmd_clear(pmd_t *pmdp)
514 {
515 set_pmd(pmdp, native_make_pmd(0));
516 }
517
518 #define __HAVE_ARCH_START_CONTEXT_SWITCH
arch_start_context_switch(struct task_struct * prev)519 static inline void arch_start_context_switch(struct task_struct *prev)
520 {
521 PVOP_VCALL1(cpu.start_context_switch, prev);
522 }
523
arch_end_context_switch(struct task_struct * next)524 static inline void arch_end_context_switch(struct task_struct *next)
525 {
526 PVOP_VCALL1(cpu.end_context_switch, next);
527 }
528
529 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
arch_enter_lazy_mmu_mode(void)530 static inline void arch_enter_lazy_mmu_mode(void)
531 {
532 PVOP_VCALL0(mmu.lazy_mode.enter);
533 }
534
arch_leave_lazy_mmu_mode(void)535 static inline void arch_leave_lazy_mmu_mode(void)
536 {
537 PVOP_VCALL0(mmu.lazy_mode.leave);
538 }
539
arch_flush_lazy_mmu_mode(void)540 static inline void arch_flush_lazy_mmu_mode(void)
541 {
542 PVOP_VCALL0(mmu.lazy_mode.flush);
543 }
544
__set_fixmap(unsigned idx,phys_addr_t phys,pgprot_t flags)545 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
546 phys_addr_t phys, pgprot_t flags)
547 {
548 pv_ops.mmu.set_fixmap(idx, phys, flags);
549 }
550 #endif
551
552 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
553
pv_queued_spin_lock_slowpath(struct qspinlock * lock,u32 val)554 static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock,
555 u32 val)
556 {
557 PVOP_VCALL2(lock.queued_spin_lock_slowpath, lock, val);
558 }
559
pv_queued_spin_unlock(struct qspinlock * lock)560 static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock)
561 {
562 PVOP_ALT_VCALLEE1(lock.queued_spin_unlock, lock,
563 "movb $0, (%%" _ASM_ARG1 ");",
564 ALT_NOT(X86_FEATURE_PVUNLOCK));
565 }
566
pv_wait(u8 * ptr,u8 val)567 static __always_inline void pv_wait(u8 *ptr, u8 val)
568 {
569 PVOP_VCALL2(lock.wait, ptr, val);
570 }
571
pv_kick(int cpu)572 static __always_inline void pv_kick(int cpu)
573 {
574 PVOP_VCALL1(lock.kick, cpu);
575 }
576
pv_vcpu_is_preempted(long cpu)577 static __always_inline bool pv_vcpu_is_preempted(long cpu)
578 {
579 return PVOP_ALT_CALLEE1(bool, lock.vcpu_is_preempted, cpu,
580 "xor %%" _ASM_AX ", %%" _ASM_AX ";",
581 ALT_NOT(X86_FEATURE_VCPUPREEMPT));
582 }
583
584 void __raw_callee_save___native_queued_spin_unlock(struct qspinlock *lock);
585 bool __raw_callee_save___native_vcpu_is_preempted(long cpu);
586
587 #endif /* SMP && PARAVIRT_SPINLOCKS */
588
589 #ifdef CONFIG_X86_32
590 /* save and restore all caller-save registers, except return value */
591 #define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
592 #define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
593 #else
594 /* save and restore all caller-save registers, except return value */
595 #define PV_SAVE_ALL_CALLER_REGS \
596 "push %rcx;" \
597 "push %rdx;" \
598 "push %rsi;" \
599 "push %rdi;" \
600 "push %r8;" \
601 "push %r9;" \
602 "push %r10;" \
603 "push %r11;"
604 #define PV_RESTORE_ALL_CALLER_REGS \
605 "pop %r11;" \
606 "pop %r10;" \
607 "pop %r9;" \
608 "pop %r8;" \
609 "pop %rdi;" \
610 "pop %rsi;" \
611 "pop %rdx;" \
612 "pop %rcx;"
613 #endif
614
615 /*
616 * Generate a thunk around a function which saves all caller-save
617 * registers except for the return value. This allows C functions to
618 * be called from assembler code where fewer than normal registers are
619 * available. It may also help code generation around calls from C
620 * code if the common case doesn't use many registers.
621 *
622 * When a callee is wrapped in a thunk, the caller can assume that all
623 * arg regs and all scratch registers are preserved across the
624 * call. The return value in rax/eax will not be saved, even for void
625 * functions.
626 */
627 #define PV_THUNK_NAME(func) "__raw_callee_save_" #func
628 #define __PV_CALLEE_SAVE_REGS_THUNK(func, section) \
629 extern typeof(func) __raw_callee_save_##func; \
630 \
631 asm(".pushsection " section ", \"ax\";" \
632 ".globl " PV_THUNK_NAME(func) ";" \
633 ".type " PV_THUNK_NAME(func) ", @function;" \
634 ASM_FUNC_ALIGN \
635 PV_THUNK_NAME(func) ":" \
636 ASM_ENDBR \
637 FRAME_BEGIN \
638 PV_SAVE_ALL_CALLER_REGS \
639 "call " #func ";" \
640 PV_RESTORE_ALL_CALLER_REGS \
641 FRAME_END \
642 ASM_RET \
643 ".size " PV_THUNK_NAME(func) ", .-" PV_THUNK_NAME(func) ";" \
644 ".popsection")
645
646 #define PV_CALLEE_SAVE_REGS_THUNK(func) \
647 __PV_CALLEE_SAVE_REGS_THUNK(func, ".text")
648
649 /* Get a reference to a callee-save function */
650 #define PV_CALLEE_SAVE(func) \
651 ((struct paravirt_callee_save) { __raw_callee_save_##func })
652
653 /* Promise that "func" already uses the right calling convention */
654 #define __PV_IS_CALLEE_SAVE(func) \
655 ((struct paravirt_callee_save) { func })
656
657 #ifdef CONFIG_PARAVIRT_XXL
arch_local_save_flags(void)658 static __always_inline unsigned long arch_local_save_flags(void)
659 {
660 return PVOP_ALT_CALLEE0(unsigned long, irq.save_fl, "pushf; pop %%rax;",
661 ALT_NOT_XEN);
662 }
663
arch_local_irq_disable(void)664 static __always_inline void arch_local_irq_disable(void)
665 {
666 PVOP_ALT_VCALLEE0(irq.irq_disable, "cli;", ALT_NOT_XEN);
667 }
668
arch_local_irq_enable(void)669 static __always_inline void arch_local_irq_enable(void)
670 {
671 PVOP_ALT_VCALLEE0(irq.irq_enable, "sti;", ALT_NOT_XEN);
672 }
673
arch_local_irq_save(void)674 static __always_inline unsigned long arch_local_irq_save(void)
675 {
676 unsigned long f;
677
678 f = arch_local_save_flags();
679 arch_local_irq_disable();
680 return f;
681 }
682 #endif
683
684
685 /* Make sure as little as possible of this mess escapes. */
686 #undef PARAVIRT_CALL
687 #undef __PVOP_CALL
688 #undef __PVOP_VCALL
689 #undef PVOP_VCALL0
690 #undef PVOP_CALL0
691 #undef PVOP_VCALL1
692 #undef PVOP_CALL1
693 #undef PVOP_VCALL2
694 #undef PVOP_CALL2
695 #undef PVOP_VCALL3
696 #undef PVOP_CALL3
697 #undef PVOP_VCALL4
698 #undef PVOP_CALL4
699
700 extern void default_banner(void);
701 void native_pv_lock_init(void) __init;
702
703 #else /* __ASSEMBLER__ */
704
705 #ifdef CONFIG_X86_64
706 #ifdef CONFIG_PARAVIRT_XXL
707 #ifdef CONFIG_DEBUG_ENTRY
708
709 #define PARA_INDIRECT(addr) *addr(%rip)
710
711 .macro PARA_IRQ_save_fl
712 ANNOTATE_RETPOLINE_SAFE;
713 call PARA_INDIRECT(pv_ops+PV_IRQ_save_fl);
714 .endm
715
716 #define SAVE_FLAGS ALTERNATIVE_2 "PARA_IRQ_save_fl;", \
717 "ALT_CALL_INSTR;", ALT_CALL_ALWAYS, \
718 "pushf; pop %rax;", ALT_NOT_XEN
719 #endif
720 #endif /* CONFIG_PARAVIRT_XXL */
721 #endif /* CONFIG_X86_64 */
722
723 #endif /* __ASSEMBLER__ */
724 #else /* CONFIG_PARAVIRT */
725 # define default_banner x86_init_noop
726
727 #ifndef __ASSEMBLER__
728 static inline void native_pv_lock_init(void)
729 {
730 }
731 #endif
732 #endif /* !CONFIG_PARAVIRT */
733
734 #ifndef __ASSEMBLER__
735 #ifndef CONFIG_PARAVIRT_XXL
paravirt_enter_mmap(struct mm_struct * mm)736 static inline void paravirt_enter_mmap(struct mm_struct *mm)
737 {
738 }
739 #endif
740
741 #ifndef CONFIG_PARAVIRT
paravirt_arch_exit_mmap(struct mm_struct * mm)742 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
743 {
744 }
745 #endif
746
747 #ifndef CONFIG_PARAVIRT_SPINLOCKS
paravirt_set_cap(void)748 static inline void paravirt_set_cap(void)
749 {
750 }
751 #endif
752 #endif /* __ASSEMBLER__ */
753 #endif /* _ASM_X86_PARAVIRT_H */
754