xref: /linux/include/linux/pinctrl/pinconf-generic.h (revision f33e46a0c6bddd341d0989484a2546bba7ac4a3c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Interface the generic pinconfig portions of the pinctrl subsystem
4  *
5  * Copyright (C) 2011 ST-Ericsson SA
6  * Written on behalf of Linaro for ST-Ericsson
7  * This interface is used in the core to keep track of pins.
8  *
9  * Author: Linus Walleij <linus.walleij@linaro.org>
10  */
11 #ifndef __LINUX_PINCTRL_PINCONF_GENERIC_H
12 #define __LINUX_PINCTRL_PINCONF_GENERIC_H
13 
14 #include <linux/types.h>
15 
16 #include <linux/pinctrl/machine.h>
17 
18 struct device_node;
19 
20 struct pinctrl_dev;
21 struct pinctrl_map;
22 
23 /**
24  * enum pin_config_param - possible pin configuration parameters
25  * @PIN_CONFIG_BIAS_BUS_HOLD: the pin will be set to weakly latch so that it
26  *	weakly drives the last value on a tristate bus, also known as a "bus
27  *	holder", "bus keeper" or "repeater". This allows another device on the
28  *	bus to change the value by driving the bus high or low and switching to
29  *	tristate. The argument is ignored.
30  * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a
31  *	transition from say pull-up to pull-down implies that you disable
32  *	pull-up in the process, this setting disables all biasing.
33  * @PIN_CONFIG_BIAS_HIGH_IMPEDANCE: the pin will be set to a high impedance
34  *	mode, also know as "third-state" (tristate) or "high-Z" or "floating".
35  *	On output pins this effectively disconnects the pin, which is useful
36  *	if for example some other pin is going to drive the signal connected
37  *	to it for a while. Pins used for input are usually always high
38  *	impedance.
39  * @PIN_CONFIG_BIAS_PULL_DOWN: the pin will be pulled down (usually with high
40  *	impedance to GROUND). If the argument is != 0 pull-down is enabled,
41  *	the value is interpreted by the driver and can be custom or an SI unit
42  *  	such as Ohms.
43  * @PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: the pin will be pulled up or down based
44  *	on embedded knowledge of the controller hardware, like current mux
45  *	function. The pull direction and possibly strength too will normally
46  *	be decided completely inside the hardware block and not be readable
47  *	from the kernel side.
48  *	If the argument is != 0 pull up/down is enabled, if it is 0, the
49  *	configuration is ignored. The proper way to disable it is to use
50  *	@PIN_CONFIG_BIAS_DISABLE.
51  * @PIN_CONFIG_BIAS_PULL_UP: the pin will be pulled up (usually with high
52  *	impedance to VDD). If the argument is != 0 pull-up is enabled,
53  *	the value is interpreted by the driver and can be custom or an SI unit
54  *	such as Ohms.
55  * @PIN_CONFIG_DRIVE_OPEN_DRAIN: the pin will be driven with open drain (open
56  *	collector) which means it is usually wired with other output ports
57  *	which are then pulled up with an external resistor. Setting this
58  *	config will enable open drain mode, the argument is ignored.
59  * @PIN_CONFIG_DRIVE_OPEN_SOURCE: the pin will be driven with open source
60  *	(open emitter). Setting this config will enable open source mode, the
61  *	argument is ignored.
62  * @PIN_CONFIG_DRIVE_PUSH_PULL: the pin will be driven actively high and
63  *	low, this is the most typical case and is typically achieved with two
64  *	active transistors on the output. Setting this config will enable
65  *	push-pull mode, the argument is ignored.
66  * @PIN_CONFIG_DRIVE_STRENGTH: the pin will sink or source at most the current
67  *	passed as argument. The argument is in mA.
68  * @PIN_CONFIG_DRIVE_STRENGTH_UA: the pin will sink or source at most the current
69  *	passed as argument. The argument is in uA.
70  * @PIN_CONFIG_INPUT_DEBOUNCE: this will configure the pin to debounce mode,
71  *	which means it will wait for signals to settle when reading inputs. The
72  *	argument gives the debounce time in usecs. Setting the
73  *	argument to zero turns debouncing off.
74  * @PIN_CONFIG_INPUT_ENABLE: enable the pin's input.  Note that this does not
75  *	affect the pin's ability to drive output.  1 enables input, 0 disables
76  *	input.
77  * @PIN_CONFIG_INPUT_SCHMITT: this will configure an input pin to run in
78  *	schmitt-trigger mode. If the schmitt-trigger has adjustable hysteresis,
79  *	the threshold value is given on a custom format as argument when
80  *	setting pins to this mode.
81  * @PIN_CONFIG_INPUT_SCHMITT_ENABLE: control schmitt-trigger mode on the pin.
82  *      If the argument != 0, schmitt-trigger mode is enabled. If it's 0,
83  *      schmitt-trigger mode is disabled.
84  * @PIN_CONFIG_INPUT_SCHMITT_UV: this will configure an input pin to run in
85  *	schmitt-trigger mode. The argument is in uV.
86  * @PIN_CONFIG_MODE_LOW_POWER: this will configure the pin for low power
87  *	operation, if several modes of operation are supported these can be
88  *	passed in the argument on a custom form, else just use argument 1
89  *	to indicate low power mode, argument 0 turns low power mode off.
90  * @PIN_CONFIG_MODE_PWM: this will configure the pin for PWM
91  * @PIN_CONFIG_LEVEL: setting this will configure the pin as an output and
92  *	drive a value on the line. Use argument 1 to indicate high level,
93  *	argument 0 to indicate low level. Conversely the value of the line
94  *	can be read using this parameter, if and only if that value can be
95  *	represented as a binary 0 or 1 where 0 indicate a low voltage level
96  *	and 1 indicate a high voltage level.
97  *	(Please see Documentation/driver-api/pin-control.rst,
98  *	section "GPIO mode pitfalls" for a discussion around this parameter.)
99  * @PIN_CONFIG_OUTPUT_ENABLE: this will enable the pin's output mode
100  * 	without driving a value there. For most platforms this reduces to
101  * 	enable the output buffers and then let the pin controller current
102  * 	configuration (eg. the currently selected mux function) drive values on
103  * 	the line. Use argument 1 to enable output mode, argument 0 to disable
104  * 	it.
105  * @PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS: this will configure the output impedance
106  * 	of the pin with the value passed as argument. The argument is in ohms.
107  * @PIN_CONFIG_PERSIST_STATE: retain pin state across sleep or controller reset
108  * @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power
109  *	supplies, the argument to this parameter (on a custom format) tells
110  *	the driver which alternative power source to use.
111  * @PIN_CONFIG_SKEW_DELAY: if the pin has programmable skew rate (on inputs)
112  *	or latch delay (on outputs) this parameter (in a custom format)
113  *	specifies the clock skew or latch delay. It typically controls how
114  *	many double inverters are put in front of the line.
115  * @PIN_CONFIG_SLEEP_HARDWARE_STATE: indicate this is sleep related state.
116  * @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to
117  *	this parameter (on a custom format) tells the driver which alternative
118  *	slew rate to use.
119  * @PIN_CONFIG_END: this is the last enumerator for pin configurations, if
120  *	you need to pass in custom configurations to the pin controller, use
121  *	PIN_CONFIG_END+1 as the base offset.
122  * @PIN_CONFIG_MAX: this is the maximum configuration value that can be
123  *	presented using the packed format.
124  */
125 enum pin_config_param {
126 	PIN_CONFIG_BIAS_BUS_HOLD,
127 	PIN_CONFIG_BIAS_DISABLE,
128 	PIN_CONFIG_BIAS_HIGH_IMPEDANCE,
129 	PIN_CONFIG_BIAS_PULL_DOWN,
130 	PIN_CONFIG_BIAS_PULL_PIN_DEFAULT,
131 	PIN_CONFIG_BIAS_PULL_UP,
132 	PIN_CONFIG_DRIVE_OPEN_DRAIN,
133 	PIN_CONFIG_DRIVE_OPEN_SOURCE,
134 	PIN_CONFIG_DRIVE_PUSH_PULL,
135 	PIN_CONFIG_DRIVE_STRENGTH,
136 	PIN_CONFIG_DRIVE_STRENGTH_UA,
137 	PIN_CONFIG_INPUT_DEBOUNCE,
138 	PIN_CONFIG_INPUT_ENABLE,
139 	PIN_CONFIG_INPUT_SCHMITT,
140 	PIN_CONFIG_INPUT_SCHMITT_ENABLE,
141 	PIN_CONFIG_INPUT_SCHMITT_UV,
142 	PIN_CONFIG_MODE_LOW_POWER,
143 	PIN_CONFIG_MODE_PWM,
144 	PIN_CONFIG_LEVEL,
145 	PIN_CONFIG_OUTPUT_ENABLE,
146 	PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS,
147 	PIN_CONFIG_PERSIST_STATE,
148 	PIN_CONFIG_POWER_SOURCE,
149 	PIN_CONFIG_SKEW_DELAY,
150 	PIN_CONFIG_SLEEP_HARDWARE_STATE,
151 	PIN_CONFIG_SLEW_RATE,
152 	PIN_CONFIG_END = 0x7F,
153 	PIN_CONFIG_MAX = 0xFF,
154 };
155 
156 /*
157  * Helpful configuration macro to be used in tables etc.
158  */
159 #define PIN_CONF_PACKED(p, a) ((a << 8) | ((unsigned long) p & 0xffUL))
160 
161 /*
162  * The following inlines stuffs a configuration parameter and data value
163  * into and out of an unsigned long argument, as used by the generic pin config
164  * system. We put the parameter in the lower 8 bits and the argument in the
165  * upper 24 bits.
166  */
167 
pinconf_to_config_param(unsigned long config)168 static inline enum pin_config_param pinconf_to_config_param(unsigned long config)
169 {
170 	return (enum pin_config_param) (config & 0xffUL);
171 }
172 
pinconf_to_config_argument(unsigned long config)173 static inline u32 pinconf_to_config_argument(unsigned long config)
174 {
175 	return (u32) ((config >> 8) & 0xffffffUL);
176 }
177 
pinconf_to_config_packed(enum pin_config_param param,u32 argument)178 static inline unsigned long pinconf_to_config_packed(enum pin_config_param param,
179 						     u32 argument)
180 {
181 	return PIN_CONF_PACKED(param, argument);
182 }
183 
184 #define PCONFDUMP(a, b, c, d) {					\
185 	.param = a, .display = b, .format = c, .has_arg = d	\
186 	}
187 
188 struct pin_config_item {
189 	const enum pin_config_param param;
190 	const char * const display;
191 	const char * const format;
192 	bool has_arg;
193 };
194 
195 struct pinconf_generic_params {
196 	const char * const property;
197 	enum pin_config_param param;
198 	u32 default_value;
199 };
200 
201 int pinconf_generic_dt_subnode_to_map(struct pinctrl_dev *pctldev,
202 		struct device_node *np, struct pinctrl_map **map,
203 		unsigned int *reserved_maps, unsigned int *num_maps,
204 		enum pinctrl_map_type type);
205 int pinconf_generic_dt_node_to_map(struct pinctrl_dev *pctldev,
206 		struct device_node *np_config, struct pinctrl_map **map,
207 		unsigned int *num_maps, enum pinctrl_map_type type);
208 void pinconf_generic_dt_free_map(struct pinctrl_dev *pctldev,
209 		struct pinctrl_map *map, unsigned int num_maps);
210 
pinconf_generic_dt_node_to_map_group(struct pinctrl_dev * pctldev,struct device_node * np_config,struct pinctrl_map ** map,unsigned int * num_maps)211 static inline int pinconf_generic_dt_node_to_map_group(struct pinctrl_dev *pctldev,
212 		struct device_node *np_config, struct pinctrl_map **map,
213 		unsigned int *num_maps)
214 {
215 	return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps,
216 			PIN_MAP_TYPE_CONFIGS_GROUP);
217 }
218 
pinconf_generic_dt_node_to_map_pin(struct pinctrl_dev * pctldev,struct device_node * np_config,struct pinctrl_map ** map,unsigned int * num_maps)219 static inline int pinconf_generic_dt_node_to_map_pin(struct pinctrl_dev *pctldev,
220 		struct device_node *np_config, struct pinctrl_map **map,
221 		unsigned int *num_maps)
222 {
223 	return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps,
224 			PIN_MAP_TYPE_CONFIGS_PIN);
225 }
226 
pinconf_generic_dt_node_to_map_all(struct pinctrl_dev * pctldev,struct device_node * np_config,struct pinctrl_map ** map,unsigned * num_maps)227 static inline int pinconf_generic_dt_node_to_map_all(struct pinctrl_dev *pctldev,
228 		struct device_node *np_config, struct pinctrl_map **map,
229 		unsigned *num_maps)
230 {
231 	/*
232 	 * passing the type as PIN_MAP_TYPE_INVALID causes the underlying parser
233 	 * to infer the map type from the DT properties used.
234 	 */
235 	return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps,
236 			PIN_MAP_TYPE_INVALID);
237 }
238 
239 int pinconf_generic_dt_node_to_map_pinmux(struct pinctrl_dev *pctldev,
240 					  struct device_node *np,
241 					  struct pinctrl_map **map,
242 					  unsigned int *num_maps);
243 #endif /* __LINUX_PINCTRL_PINCONF_GENERIC_H */
244