1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 #include <net/eee.h> 34 35 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 36 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 37 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 38 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 39 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 40 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 41 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 42 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init; 43 44 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 45 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 46 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 47 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 48 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 49 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 50 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 51 #define PHY_EEE_CAP2_FEATURES ((unsigned long *)&phy_eee_cap2_features) 52 53 extern const int phy_basic_ports_array[3]; 54 55 /* 56 * Set phydev->irq to PHY_POLL if interrupts are not supported, 57 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 58 * the attached MAC driver handles the interrupt 59 */ 60 #define PHY_POLL -1 61 #define PHY_MAC_INTERRUPT -2 62 63 #define PHY_IS_INTERNAL 0x00000001 64 #define PHY_RST_AFTER_CLK_EN 0x00000002 65 #define PHY_POLL_CABLE_TEST 0x00000004 66 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 67 #define MDIO_DEVICE_IS_PHY 0x80000000 68 69 /** 70 * enum phy_interface_t - Interface Mode definitions 71 * 72 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 73 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 74 * @PHY_INTERFACE_MODE_MII: Media-independent interface 75 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 76 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 77 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 78 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 79 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 80 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 81 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 82 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 83 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 84 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal TX delay 85 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 86 * @PHY_INTERFACE_MODE_SMII: Serial MII 87 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 88 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 89 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 90 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII 91 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 92 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 93 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 94 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 95 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 96 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 97 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 98 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 99 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 100 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 101 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 102 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 103 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 104 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 105 * @PHY_INTERFACE_MODE_10G_QXGMII: 10G-QXGMII - 4 ports over 10G USXGMII 106 * @PHY_INTERFACE_MODE_50GBASER: 50GBase-R - with Clause 134 FEC 107 * @PHY_INTERFACE_MODE_LAUI: 50 Gigabit Attachment Unit Interface 108 * @PHY_INTERFACE_MODE_100GBASEP: 100GBase-P - with Clause 134 FEC 109 * @PHY_INTERFACE_MODE_MIILITE: MII-Lite - MII without RXER TXER CRS COL 110 * @PHY_INTERFACE_MODE_MAX: Book keeping 111 * 112 * Describes the interface between the MAC and PHY. 113 */ 114 typedef enum { 115 PHY_INTERFACE_MODE_NA, 116 PHY_INTERFACE_MODE_INTERNAL, 117 PHY_INTERFACE_MODE_MII, 118 PHY_INTERFACE_MODE_GMII, 119 PHY_INTERFACE_MODE_SGMII, 120 PHY_INTERFACE_MODE_TBI, 121 PHY_INTERFACE_MODE_REVMII, 122 PHY_INTERFACE_MODE_RMII, 123 PHY_INTERFACE_MODE_REVRMII, 124 PHY_INTERFACE_MODE_RGMII, 125 PHY_INTERFACE_MODE_RGMII_ID, 126 PHY_INTERFACE_MODE_RGMII_RXID, 127 PHY_INTERFACE_MODE_RGMII_TXID, 128 PHY_INTERFACE_MODE_RTBI, 129 PHY_INTERFACE_MODE_SMII, 130 PHY_INTERFACE_MODE_XGMII, 131 PHY_INTERFACE_MODE_XLGMII, 132 PHY_INTERFACE_MODE_MOCA, 133 PHY_INTERFACE_MODE_PSGMII, 134 PHY_INTERFACE_MODE_QSGMII, 135 PHY_INTERFACE_MODE_TRGMII, 136 PHY_INTERFACE_MODE_100BASEX, 137 PHY_INTERFACE_MODE_1000BASEX, 138 PHY_INTERFACE_MODE_2500BASEX, 139 PHY_INTERFACE_MODE_5GBASER, 140 PHY_INTERFACE_MODE_RXAUI, 141 PHY_INTERFACE_MODE_XAUI, 142 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 143 PHY_INTERFACE_MODE_10GBASER, 144 PHY_INTERFACE_MODE_25GBASER, 145 PHY_INTERFACE_MODE_USXGMII, 146 /* 10GBASE-KR - with Clause 73 AN */ 147 PHY_INTERFACE_MODE_10GKR, 148 PHY_INTERFACE_MODE_QUSGMII, 149 PHY_INTERFACE_MODE_1000BASEKX, 150 PHY_INTERFACE_MODE_10G_QXGMII, 151 PHY_INTERFACE_MODE_50GBASER, 152 PHY_INTERFACE_MODE_LAUI, 153 PHY_INTERFACE_MODE_100GBASEP, 154 PHY_INTERFACE_MODE_MIILITE, 155 PHY_INTERFACE_MODE_MAX, 156 } phy_interface_t; 157 158 /* PHY interface mode bitmap handling */ 159 #define DECLARE_PHY_INTERFACE_MASK(name) \ 160 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 161 162 static inline void phy_interface_zero(unsigned long *intf) 163 { 164 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 165 } 166 167 static inline bool phy_interface_empty(const unsigned long *intf) 168 { 169 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 170 } 171 172 static inline void phy_interface_copy(unsigned long *d, const unsigned long *s) 173 { 174 bitmap_copy(d, s, PHY_INTERFACE_MODE_MAX); 175 } 176 177 static inline unsigned int phy_interface_weight(const unsigned long *intf) 178 { 179 return bitmap_weight(intf, PHY_INTERFACE_MODE_MAX); 180 } 181 182 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 183 const unsigned long *b) 184 { 185 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 186 } 187 188 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 189 const unsigned long *b) 190 { 191 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 192 } 193 194 static inline void phy_interface_set_rgmii(unsigned long *intf) 195 { 196 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 197 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 198 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 199 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 200 } 201 202 /** 203 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 204 * @interface: enum phy_interface_t value 205 * 206 * Description: maps enum &phy_interface_t defined in this file 207 * into the device tree binding of 'phy-mode', so that Ethernet 208 * device driver can get PHY interface from device tree. 209 */ 210 static inline const char *phy_modes(phy_interface_t interface) 211 { 212 switch (interface) { 213 case PHY_INTERFACE_MODE_NA: 214 return ""; 215 case PHY_INTERFACE_MODE_INTERNAL: 216 return "internal"; 217 case PHY_INTERFACE_MODE_MII: 218 return "mii"; 219 case PHY_INTERFACE_MODE_GMII: 220 return "gmii"; 221 case PHY_INTERFACE_MODE_SGMII: 222 return "sgmii"; 223 case PHY_INTERFACE_MODE_TBI: 224 return "tbi"; 225 case PHY_INTERFACE_MODE_REVMII: 226 return "rev-mii"; 227 case PHY_INTERFACE_MODE_RMII: 228 return "rmii"; 229 case PHY_INTERFACE_MODE_REVRMII: 230 return "rev-rmii"; 231 case PHY_INTERFACE_MODE_RGMII: 232 return "rgmii"; 233 case PHY_INTERFACE_MODE_RGMII_ID: 234 return "rgmii-id"; 235 case PHY_INTERFACE_MODE_RGMII_RXID: 236 return "rgmii-rxid"; 237 case PHY_INTERFACE_MODE_RGMII_TXID: 238 return "rgmii-txid"; 239 case PHY_INTERFACE_MODE_RTBI: 240 return "rtbi"; 241 case PHY_INTERFACE_MODE_SMII: 242 return "smii"; 243 case PHY_INTERFACE_MODE_XGMII: 244 return "xgmii"; 245 case PHY_INTERFACE_MODE_XLGMII: 246 return "xlgmii"; 247 case PHY_INTERFACE_MODE_MOCA: 248 return "moca"; 249 case PHY_INTERFACE_MODE_PSGMII: 250 return "psgmii"; 251 case PHY_INTERFACE_MODE_QSGMII: 252 return "qsgmii"; 253 case PHY_INTERFACE_MODE_TRGMII: 254 return "trgmii"; 255 case PHY_INTERFACE_MODE_1000BASEX: 256 return "1000base-x"; 257 case PHY_INTERFACE_MODE_1000BASEKX: 258 return "1000base-kx"; 259 case PHY_INTERFACE_MODE_2500BASEX: 260 return "2500base-x"; 261 case PHY_INTERFACE_MODE_5GBASER: 262 return "5gbase-r"; 263 case PHY_INTERFACE_MODE_RXAUI: 264 return "rxaui"; 265 case PHY_INTERFACE_MODE_XAUI: 266 return "xaui"; 267 case PHY_INTERFACE_MODE_10GBASER: 268 return "10gbase-r"; 269 case PHY_INTERFACE_MODE_25GBASER: 270 return "25gbase-r"; 271 case PHY_INTERFACE_MODE_USXGMII: 272 return "usxgmii"; 273 case PHY_INTERFACE_MODE_10GKR: 274 return "10gbase-kr"; 275 case PHY_INTERFACE_MODE_100BASEX: 276 return "100base-x"; 277 case PHY_INTERFACE_MODE_QUSGMII: 278 return "qusgmii"; 279 case PHY_INTERFACE_MODE_10G_QXGMII: 280 return "10g-qxgmii"; 281 case PHY_INTERFACE_MODE_50GBASER: 282 return "50gbase-r"; 283 case PHY_INTERFACE_MODE_LAUI: 284 return "laui"; 285 case PHY_INTERFACE_MODE_100GBASEP: 286 return "100gbase-p"; 287 case PHY_INTERFACE_MODE_MIILITE: 288 return "mii-lite"; 289 default: 290 return "unknown"; 291 } 292 } 293 294 /** 295 * rgmii_clock - map link speed to the clock rate 296 * @speed: link speed value 297 * 298 * Description: maps RGMII supported link speeds into the clock rates. 299 * This can also be used for MII, GMII, and RMII interface modes as the 300 * clock rates are identical, but the caller must be aware that errors 301 * for unsupported clock rates will not be signalled. 302 * 303 * Returns: clock rate or negative errno 304 */ 305 static inline long rgmii_clock(int speed) 306 { 307 switch (speed) { 308 case SPEED_10: 309 return 2500000; 310 case SPEED_100: 311 return 25000000; 312 case SPEED_1000: 313 return 125000000; 314 default: 315 return -EINVAL; 316 } 317 } 318 319 #define PHY_MAX_ADDR 32 320 321 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 322 #define PHY_ID_FMT "%s:%02x" 323 #define PHY_ID_SIZE (MII_BUS_ID_SIZE + 3) 324 325 #define MII_BUS_ID_SIZE 61 326 327 struct device; 328 struct kernel_hwtstamp_config; 329 struct phylink; 330 struct phy_port; 331 struct sfp_bus; 332 struct sfp_upstream_ops; 333 struct sk_buff; 334 335 /** 336 * struct mdio_bus_stats - Statistics counters for MDIO busses 337 * @transfers: Total number of transfers, i.e. @writes + @reads 338 * @errors: Number of MDIO transfers that returned an error 339 * @writes: Number of write transfers 340 * @reads: Number of read transfers 341 * @syncp: Synchronisation for incrementing statistics 342 */ 343 struct mdio_bus_stats { 344 u64_stats_t transfers; 345 u64_stats_t errors; 346 u64_stats_t writes; 347 u64_stats_t reads; 348 /* Must be last, add new statistics above */ 349 struct u64_stats_sync syncp; 350 }; 351 352 /** 353 * struct mii_bus - Represents an MDIO bus 354 * 355 * @owner: Who owns this device 356 * @name: User friendly name for this MDIO device, or driver name 357 * @id: Unique identifier for this bus, typical from bus hierarchy 358 * @priv: Driver private data 359 * 360 * The Bus class for PHYs. Devices which provide access to 361 * PHYs should register using this structure 362 */ 363 struct mii_bus { 364 struct module *owner; 365 const char *name; 366 char id[MII_BUS_ID_SIZE]; 367 void *priv; 368 /** @read: Perform a read transfer on the bus */ 369 int (*read)(struct mii_bus *bus, int addr, int regnum); 370 /** @write: Perform a write transfer on the bus */ 371 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 372 /** @read_c45: Perform a C45 read transfer on the bus */ 373 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 374 /** @write_c45: Perform a C45 write transfer on the bus */ 375 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 376 int regnum, u16 val); 377 /** @reset: Perform a reset of the bus */ 378 int (*reset)(struct mii_bus *bus); 379 380 /** @stats: Statistic counters per device on the bus */ 381 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 382 383 /** 384 * @mdio_lock: A lock to ensure that only one thing can read/write 385 * the MDIO bus at a time 386 */ 387 struct mutex mdio_lock; 388 389 /** @parent: Parent device of this bus */ 390 struct device *parent; 391 /** @state: State of bus structure */ 392 enum { 393 MDIOBUS_ALLOCATED = 1, 394 MDIOBUS_REGISTERED, 395 MDIOBUS_UNREGISTERED, 396 MDIOBUS_RELEASED, 397 } state; 398 399 /** @dev: Kernel device representation */ 400 struct device dev; 401 402 /** @mdio_map: list of all MDIO devices on bus */ 403 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 404 405 /** @phy_mask: PHY addresses to be ignored when probing */ 406 u32 phy_mask; 407 408 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 409 u32 phy_ignore_ta_mask; 410 411 /** 412 * @irq: An array of interrupts, each PHY's interrupt at the index 413 * matching its address 414 */ 415 int irq[PHY_MAX_ADDR]; 416 417 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 418 int reset_delay_us; 419 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 420 int reset_post_delay_us; 421 /** @reset_gpiod: Reset GPIO descriptor pointer */ 422 struct gpio_desc *reset_gpiod; 423 424 /** @shared_lock: protect access to the shared element */ 425 struct mutex shared_lock; 426 427 #if IS_ENABLED(CONFIG_PHY_PACKAGE) 428 /** @shared: shared state across different PHYs */ 429 struct phy_package_shared *shared[PHY_MAX_ADDR]; 430 #endif 431 }; 432 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 433 434 struct mii_bus *mdiobus_alloc_size(size_t size); 435 436 /** 437 * mdiobus_alloc - Allocate an MDIO bus structure 438 * 439 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 440 * for the driver to register the bus. 441 */ 442 static inline struct mii_bus *mdiobus_alloc(void) 443 { 444 return mdiobus_alloc_size(0); 445 } 446 447 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 448 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 449 struct module *owner); 450 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 451 #define devm_mdiobus_register(dev, bus) \ 452 __devm_mdiobus_register(dev, bus, THIS_MODULE) 453 454 void mdiobus_unregister(struct mii_bus *bus); 455 void mdiobus_free(struct mii_bus *bus); 456 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 457 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 458 { 459 return devm_mdiobus_alloc_size(dev, 0); 460 } 461 462 struct mii_bus *mdio_find_bus(const char *mdio_name); 463 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 464 465 #define PHY_INTERRUPT_DISABLED false 466 #define PHY_INTERRUPT_ENABLED true 467 468 /** 469 * enum phy_state - PHY state machine states: 470 * 471 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 472 * should be called if and only if the PHY is in this state, 473 * given that the PHY device exists. 474 * - PHY driver probe function will set the state to @PHY_READY 475 * 476 * @PHY_READY: PHY is ready to send and receive packets, but the 477 * controller is not. By default, PHYs which do not implement 478 * probe will be set to this state by phy_probe(). 479 * - start will set the state to UP 480 * 481 * @PHY_UP: The PHY and attached device are ready to do work. 482 * Interrupts should be started here. 483 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 484 * 485 * @PHY_NOLINK: PHY is up, but not currently plugged in. 486 * - irq or timer will set @PHY_RUNNING if link comes back 487 * - phy_stop moves to @PHY_HALTED 488 * 489 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 490 * and/or receiving packets 491 * - irq or timer will set @PHY_NOLINK if link goes down 492 * - phy_stop moves to @PHY_HALTED 493 * 494 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 495 * is not expected to work, carrier will be indicated as down. PHY will be 496 * poll once per second, or on interrupt for it current state. 497 * Once complete, move to UP to restart the PHY. 498 * - phy_stop aborts the running test and moves to @PHY_HALTED 499 * 500 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. 501 * - phy_start moves to @PHY_UP 502 * 503 * @PHY_ERROR: PHY is up, but is in an error state. 504 * - phy_stop moves to @PHY_HALTED 505 */ 506 enum phy_state { 507 PHY_DOWN = 0, 508 PHY_READY, 509 PHY_HALTED, 510 PHY_ERROR, 511 PHY_UP, 512 PHY_RUNNING, 513 PHY_NOLINK, 514 PHY_CABLETEST, 515 }; 516 517 #define MDIO_MMD_NUM 32 518 519 /** 520 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 521 * @devices_in_package: IEEE 802.3 devices in package register value. 522 * @mmds_present: bit vector of MMDs present. 523 * @device_ids: The device identifier for each present device. 524 */ 525 struct phy_c45_device_ids { 526 u32 devices_in_package; 527 u32 mmds_present; 528 u32 device_ids[MDIO_MMD_NUM]; 529 }; 530 531 struct macsec_context; 532 struct macsec_ops; 533 534 /** 535 * struct phy_oatc14_sqi_capability - SQI capability information for OATC14 536 * 10Base-T1S PHY 537 * @updated: Indicates whether the SQI capability fields have been updated. 538 * @sqi_max: Maximum supported Signal Quality Indicator (SQI) level reported by 539 * the PHY. 540 * @sqiplus_bits: Bits for SQI+ levels supported by the PHY. 541 * 0 - SQI+ is not supported 542 * 3 - SQI+ is supported, using 3 bits (8 levels) 543 * 4 - SQI+ is supported, using 4 bits (16 levels) 544 * 5 - SQI+ is supported, using 5 bits (32 levels) 545 * 6 - SQI+ is supported, using 6 bits (64 levels) 546 * 7 - SQI+ is supported, using 7 bits (128 levels) 547 * 8 - SQI+ is supported, using 8 bits (256 levels) 548 * 549 * This structure is used by the OATC14 10Base-T1S PHY driver to store the SQI 550 * and SQI+ capability information retrieved from the PHY. 551 */ 552 struct phy_oatc14_sqi_capability { 553 bool updated; 554 int sqi_max; 555 u8 sqiplus_bits; 556 }; 557 558 /** 559 * struct phy_device - An instance of a PHY 560 * 561 * @mdio: MDIO bus this PHY is on 562 * @drv: Pointer to the driver for this PHY instance 563 * @devlink: Create a link between phy dev and mac dev, if the external phy 564 * used by current mac interface is managed by another mac interface. 565 * @phyindex: Unique id across the phy's parent tree of phys to address the PHY 566 * from userspace, similar to ifindex. A zero index means the PHY 567 * wasn't assigned an id yet. 568 * @phy_id: UID for this device found during discovery 569 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 570 * @is_c45: Set to true if this PHY uses clause 45 addressing. 571 * @is_internal: Set to true if this PHY is internal to a MAC. 572 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 573 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 574 * @has_fixups: Set to true if this PHY has fixups/quirks. 575 * @suspended: Set to true if this PHY has been suspended successfully. 576 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 577 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 578 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 579 * @downshifted_rate: Set true if link speed has been downshifted. 580 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 581 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 582 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 583 * enabled. 584 * @is_genphy_driven: PHY is driven by one of the generic PHY drivers 585 * @state: State of the PHY for management purposes 586 * @dev_flags: Device-specific flags used by the PHY driver. 587 * 588 * - Bits [15:0] are free to use by the PHY driver to communicate 589 * driver specific behavior. 590 * - Bits [23:16] are currently reserved for future use. 591 * - Bits [31:24] are reserved for defining generic 592 * PHY driver behavior. 593 * @irq: IRQ number of the PHY's interrupt (-1 if none) 594 * @phylink: Pointer to phylink instance for this PHY 595 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 596 * @sfp_bus: SFP bus attached to this PHY's fiber port 597 * @attached_dev: The attached enet driver's device instance ptr 598 * @adjust_link: Callback for the enet controller to respond to changes: in the 599 * link state. 600 * @phy_link_change: Callback for phylink for notification of link change 601 * @macsec_ops: MACsec offloading ops. 602 * 603 * @speed: Current link speed 604 * @duplex: Current duplex 605 * @port: Current port 606 * @pause: Current pause 607 * @asym_pause: Current asymmetric pause 608 * @supported: Combined MAC/PHY supported linkmodes 609 * @advertising: Currently advertised linkmodes 610 * @adv_old: Saved advertised while power saving for WoL 611 * @supported_eee: supported PHY EEE linkmodes 612 * @advertising_eee: Currently advertised EEE linkmodes 613 * @enable_tx_lpi: When True, MAC should transmit LPI to PHY 614 * @eee_active: phylib private state, indicating that EEE has been negotiated 615 * @eee_cfg: User configuration of EEE 616 * @lp_advertising: Current link partner advertised linkmodes 617 * @host_interfaces: PHY interface modes supported by host 618 * @eee_disabled_modes: Energy efficient ethernet modes not to be advertised 619 * @autoneg: Flag autoneg being used 620 * @rate_matching: Current rate matching mode 621 * @link: Current link state 622 * @autoneg_complete: Flag auto negotiation of the link has completed 623 * @mdix: Current crossover 624 * @mdix_ctrl: User setting of crossover 625 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 626 * @interrupts: Flag interrupts have been enabled 627 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 628 * handling shall be postponed until PHY has resumed 629 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 630 * requiring a rerun of the interrupt handler after resume 631 * @default_timestamp: Flag indicating whether we are using the phy 632 * timestamp as the default one 633 * @interface: enum phy_interface_t value 634 * @possible_interfaces: bitmap if interface modes that the attached PHY 635 * will switch between depending on media speed. 636 * @skb: Netlink message for cable diagnostics 637 * @nest: Netlink nest used for cable diagnostics 638 * @ehdr: nNtlink header for cable diagnostics 639 * @phy_led_triggers: Array of LED triggers 640 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 641 * @led_link_trigger: LED trigger for link up/down 642 * @last_triggered: last LED trigger for link speed 643 * @leds: list of PHY LED structures 644 * @master_slave_set: User requested master/slave configuration 645 * @master_slave_get: Current master/slave advertisement 646 * @master_slave_state: Current master/slave configuration 647 * @mii_ts: Pointer to time stamper callbacks 648 * @psec: Pointer to Power Sourcing Equipment control struct 649 * @ports: List of PHY ports structures 650 * @n_ports: Number of ports currently attached to the PHY 651 * @max_n_ports: Max number of ports this PHY can expose 652 * @lock: Mutex for serialization access to PHY 653 * @state_queue: Work queue for state machine 654 * @link_down_events: Number of times link was lost 655 * @shared: Pointer to private data shared by phys in one package 656 * @priv: Pointer to driver private data 657 * @oatc14_sqi_capability: SQI capability information for OATC14 10Base-T1S PHY 658 * 659 * interrupts currently only supports enabled or disabled, 660 * but could be changed in the future to support enabling 661 * and disabling specific interrupts 662 * 663 * Contains some infrastructure for polling and interrupt 664 * handling, as well as handling shifts in PHY hardware state 665 */ 666 struct phy_device { 667 struct mdio_device mdio; 668 669 /* Information about the PHY type */ 670 /* And management functions */ 671 const struct phy_driver *drv; 672 673 struct device_link *devlink; 674 675 u32 phyindex; 676 u32 phy_id; 677 678 struct phy_c45_device_ids c45_ids; 679 unsigned is_c45:1; 680 unsigned is_internal:1; 681 unsigned is_pseudo_fixed_link:1; 682 unsigned is_gigabit_capable:1; 683 unsigned has_fixups:1; 684 unsigned suspended:1; 685 unsigned suspended_by_mdio_bus:1; 686 unsigned sysfs_links:1; 687 unsigned loopback_enabled:1; 688 unsigned downshifted_rate:1; 689 unsigned is_on_sfp_module:1; 690 unsigned mac_managed_pm:1; 691 unsigned wol_enabled:1; 692 unsigned is_genphy_driven:1; 693 694 unsigned autoneg:1; 695 /* The most recently read link state */ 696 unsigned link:1; 697 unsigned autoneg_complete:1; 698 bool pause:1; 699 bool asym_pause:1; 700 701 /* Interrupts are enabled */ 702 unsigned interrupts:1; 703 unsigned irq_suspended:1; 704 unsigned irq_rerun:1; 705 706 unsigned default_timestamp:1; 707 708 int rate_matching; 709 710 enum phy_state state; 711 712 u32 dev_flags; 713 714 phy_interface_t interface; 715 DECLARE_PHY_INTERFACE_MASK(possible_interfaces); 716 717 /* 718 * forced speed & duplex (no autoneg) 719 * partner speed & duplex & pause (autoneg) 720 */ 721 int speed; 722 int duplex; 723 int port; 724 u8 master_slave_get; 725 u8 master_slave_set; 726 u8 master_slave_state; 727 728 /* Union of PHY and Attached devices' supported link modes */ 729 /* See ethtool.h for more info */ 730 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 731 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 732 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 733 /* used with phy_speed_down */ 734 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 735 /* used for eee validation and configuration*/ 736 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 737 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 738 /* Energy efficient ethernet modes which should be prohibited */ 739 __ETHTOOL_DECLARE_LINK_MODE_MASK(eee_disabled_modes); 740 bool enable_tx_lpi; 741 bool eee_active; 742 struct eee_config eee_cfg; 743 744 /* Host supported PHY interface types. Should be ignored if empty. */ 745 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 746 747 #ifdef CONFIG_LED_TRIGGER_PHY 748 struct phy_led_trigger *phy_led_triggers; 749 unsigned int phy_num_led_triggers; 750 struct phy_led_trigger *last_triggered; 751 752 struct phy_led_trigger *led_link_trigger; 753 #endif 754 struct list_head leds; 755 756 /* 757 * Interrupt number for this PHY 758 * -1 means no interrupt 759 */ 760 int irq; 761 762 /* private data pointer */ 763 /* For use by PHYs to maintain extra state */ 764 void *priv; 765 766 #if IS_ENABLED(CONFIG_PHY_PACKAGE) 767 /* shared data pointer */ 768 /* For use by PHYs inside the same package that need a shared state. */ 769 struct phy_package_shared *shared; 770 #endif 771 772 /* Reporting cable test results */ 773 struct sk_buff *skb; 774 void *ehdr; 775 struct nlattr *nest; 776 777 /* Interrupt and Polling infrastructure */ 778 struct delayed_work state_queue; 779 780 struct mutex lock; 781 782 /* This may be modified under the rtnl lock */ 783 bool sfp_bus_attached; 784 struct sfp_bus *sfp_bus; 785 struct phylink *phylink; 786 struct net_device *attached_dev; 787 struct mii_timestamper *mii_ts; 788 struct pse_control *psec; 789 790 struct list_head ports; 791 int n_ports; 792 int max_n_ports; 793 794 u8 mdix; 795 u8 mdix_ctrl; 796 797 int pma_extable; 798 799 unsigned int link_down_events; 800 801 void (*phy_link_change)(struct phy_device *phydev, bool up); 802 void (*adjust_link)(struct net_device *dev); 803 804 #if IS_ENABLED(CONFIG_MACSEC) 805 /* MACsec management functions */ 806 const struct macsec_ops *macsec_ops; 807 #endif 808 809 struct phy_oatc14_sqi_capability oatc14_sqi_capability; 810 }; 811 812 /* Generic phy_device::dev_flags */ 813 #define PHY_F_NO_IRQ 0x80000000 814 #define PHY_F_RXC_ALWAYS_ON 0x40000000 815 #define PHY_F_KEEP_PREAMBLE_BEFORE_SFD 0x20000000 816 817 #define to_phy_device(__dev) container_of_const(to_mdio_device(__dev), struct phy_device, mdio) 818 819 #define phy_for_each_port(phydev, port) \ 820 list_for_each_entry(port, &(phydev)->ports, head) 821 822 /** 823 * struct phy_tdr_config - Configuration of a TDR raw test 824 * 825 * @first: Distance for first data collection point 826 * @last: Distance for last data collection point 827 * @step: Step between data collection points 828 * @pair: Bitmap of cable pairs to collect data for 829 * 830 * A structure containing possible configuration parameters 831 * for a TDR cable test. The driver does not need to implement 832 * all the parameters, but should report what is actually used. 833 * All distances are in centimeters. 834 */ 835 struct phy_tdr_config { 836 u32 first; 837 u32 last; 838 u32 step; 839 s8 pair; 840 }; 841 #define PHY_PAIR_ALL -1 842 843 /** 844 * enum link_inband_signalling - in-band signalling modes that are supported 845 * 846 * @LINK_INBAND_DISABLE: in-band signalling can be disabled 847 * @LINK_INBAND_ENABLE: in-band signalling can be enabled without bypass 848 * @LINK_INBAND_BYPASS: in-band signalling can be enabled with bypass 849 * 850 * The possible and required bits can only be used if the valid bit is set. 851 * If possible is clear, that means inband signalling can not be used. 852 * Required is only valid when possible is set, and means that inband 853 * signalling must be used. 854 */ 855 enum link_inband_signalling { 856 LINK_INBAND_DISABLE = BIT(0), 857 LINK_INBAND_ENABLE = BIT(1), 858 LINK_INBAND_BYPASS = BIT(2), 859 }; 860 861 /** 862 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 863 * Avoidance) Reconciliation Sublayer. 864 * 865 * @version: read-only PLCA register map version. -1 = not available. Ignored 866 * when setting the configuration. Format is the same as reported by the PLCA 867 * IDVER register (31.CA00). -1 = not available. 868 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 869 * set. 0 = disabled, anything else = enabled. 870 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 871 * Allowed values [0 .. 254]. 255 = node disabled. 872 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 873 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 874 * set. Allowed values [1 .. 255]. 875 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 876 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 877 * more details. The to_timer shall be set equal over all nodes. 878 * -1 = not available / don't set. Allowed values [0 .. 255]. 879 * @burst_cnt: controls how many additional frames a node is allowed to send in 880 * single transmit opportunity (TO). The default value of 0 means that the 881 * node is allowed exactly one frame per TO. A value of 1 allows two frames 882 * per TO, and so on. -1 = not available / don't set. 883 * Allowed values [0 .. 255]. 884 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 885 * frame before interrupting the burst. This value should be set to a value 886 * greater than the MAC inter-packet gap (which is typically 96 bits). 887 * -1 = not available / don't set. Allowed values [0 .. 255]. 888 * 889 * A structure containing configuration parameters for setting/getting the PLCA 890 * RS configuration. The driver does not need to implement all the parameters, 891 * but should report what is actually used. 892 */ 893 struct phy_plca_cfg { 894 int version; 895 int enabled; 896 int node_id; 897 int node_cnt; 898 int to_tmr; 899 int burst_cnt; 900 int burst_tmr; 901 }; 902 903 /** 904 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 905 * Avoidance) Reconciliation Sublayer. 906 * 907 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 908 * register(31.CA03), indicating BEACON activity. 909 * 910 * A structure containing status information of the PLCA RS configuration. 911 * The driver does not need to implement all the parameters, but should report 912 * what is actually used. 913 */ 914 struct phy_plca_status { 915 bool pst; 916 }; 917 918 /* Modes for PHY LED configuration */ 919 enum phy_led_modes { 920 PHY_LED_ACTIVE_HIGH = 0, 921 PHY_LED_ACTIVE_LOW = 1, 922 PHY_LED_INACTIVE_HIGH_IMPEDANCE = 2, 923 924 /* keep it last */ 925 __PHY_LED_MODES_NUM, 926 }; 927 928 /** 929 * struct phy_led: An LED driven by the PHY 930 * 931 * @list: List of LEDs 932 * @phydev: PHY this LED is attached to 933 * @led_cdev: Standard LED class structure 934 * @index: Number of the LED 935 */ 936 struct phy_led { 937 struct list_head list; 938 struct phy_device *phydev; 939 struct led_classdev led_cdev; 940 u8 index; 941 }; 942 943 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 944 945 /* 946 * PHY_MSE_CAP_* - Bitmask flags for Mean Square Error (MSE) capabilities 947 * 948 * These flags describe which MSE metrics and selectors are implemented 949 * by the PHY for the current link mode. They are used in 950 * struct phy_mse_capability.supported_caps. 951 * 952 * Standardization: 953 * The OPEN Alliance (OA) defines the presence of MSE/SQI/pMSE but not their 954 * numeric scaling, update intervals, or aggregation windows. See: 955 * OA 100BASE-T1 TC1 v1.0, sections 6.1.1-6.1.3 956 * OA 1000BASE-T1 TC12 v2.2, sections 6.1.1-6.1.2 957 * 958 * Description of flags: 959 * 960 * PHY_MSE_CAP_CHANNEL_A 961 * Per-pair diagnostics for Channel A are supported. Mapping to the 962 * physical wire pair may depend on MDI/MDI-X polarity. 963 * 964 * PHY_MSE_CAP_CHANNEL_B, _C, _D 965 * Same as above for channels B-D. 966 * 967 * PHY_MSE_CAP_WORST_CHANNEL 968 * The PHY or driver can identify and report the single worst-performing 969 * channel without querying each one individually. 970 * 971 * PHY_MSE_CAP_LINK 972 * The PHY provides only a link-wide aggregate measurement or cannot map 973 * results to a specific pair (for example 100BASE-TX with unknown 974 * MDI/MDI-X). 975 * 976 * PHY_MSE_CAP_AVG 977 * Average MSE (mean DCQ metric) is supported. For 100/1000BASE-T1 the OA 978 * recommends 2^16 symbols, scaled 0..511, but the exact scaling is 979 * vendor-specific. 980 * 981 * PHY_MSE_CAP_PEAK 982 * Peak MSE (current peak within the measurement window) is supported. 983 * Defined as pMSE for 100BASE-T1; vendor-specific for others. 984 * 985 * PHY_MSE_CAP_WORST_PEAK 986 * Latched worst-case peak MSE since the last read (read-to-clear if 987 * implemented). Optional in OA 100BASE-T1 TC1 6.1.3. 988 */ 989 #define PHY_MSE_CAP_CHANNEL_A BIT(0) 990 #define PHY_MSE_CAP_CHANNEL_B BIT(1) 991 #define PHY_MSE_CAP_CHANNEL_C BIT(2) 992 #define PHY_MSE_CAP_CHANNEL_D BIT(3) 993 #define PHY_MSE_CAP_WORST_CHANNEL BIT(4) 994 #define PHY_MSE_CAP_LINK BIT(5) 995 #define PHY_MSE_CAP_AVG BIT(6) 996 #define PHY_MSE_CAP_PEAK BIT(7) 997 #define PHY_MSE_CAP_WORST_PEAK BIT(8) 998 999 /* 1000 * enum phy_mse_channel - Identifiers for selecting MSE measurement channels 1001 * 1002 * PHY_MSE_CHANNEL_A - PHY_MSE_CHANNEL_D 1003 * Select per-pair measurement for the corresponding channel. 1004 * 1005 * PHY_MSE_CHANNEL_WORST 1006 * Select the single worst-performing channel reported by hardware. 1007 * 1008 * PHY_MSE_CHANNEL_LINK 1009 * Select link-wide aggregate data (used when per-pair results are 1010 * unavailable). 1011 */ 1012 enum phy_mse_channel { 1013 PHY_MSE_CHANNEL_A, 1014 PHY_MSE_CHANNEL_B, 1015 PHY_MSE_CHANNEL_C, 1016 PHY_MSE_CHANNEL_D, 1017 PHY_MSE_CHANNEL_WORST, 1018 PHY_MSE_CHANNEL_LINK, 1019 }; 1020 1021 /** 1022 * struct phy_mse_capability - Capabilities of Mean Square Error (MSE) 1023 * measurement interface 1024 * 1025 * Standardization notes: 1026 * 1027 * - Presence of MSE/SQI/pMSE is defined by OPEN Alliance specs, but numeric 1028 * scaling, refresh/update rate and aggregation windows are not fixed and 1029 * are vendor-/product-specific. (OA 100BASE-T1 TC1 v1.0 6.1.*; 1030 * OA 1000BASE-T1 TC12 v2.2 6.1.*) 1031 * 1032 * - Typical recommendations: 2^16 symbols and 0..511 scaling for MSE; pMSE only 1033 * defined for 100BASE-T1 (sliding window example), others are vendor 1034 * extensions. Drivers must report actual scale/limits here. 1035 * 1036 * Describes the MSE measurement capabilities for the current link mode. These 1037 * properties are dynamic and may change when link settings are modified. 1038 * Callers should re-query this capability after any link state change to 1039 * ensure they have the most up-to-date information. 1040 * 1041 * Callers should only request measurements for channels and types that are 1042 * indicated as supported by the @supported_caps bitmask. If @supported_caps 1043 * is 0, the device provides no MSE diagnostics, and driver operations should 1044 * typically return -EOPNOTSUPP. 1045 * 1046 * Snapshot values for average and peak MSE can be normalized to a 0..1 ratio 1047 * by dividing the raw snapshot by the corresponding @max_average_mse or 1048 * @max_peak_mse value. 1049 * 1050 * @max_average_mse: The maximum value for an average MSE snapshot. This 1051 * defines the scale for the measurement. If the PHY_MSE_CAP_AVG capability is 1052 * supported, this value MUST be greater than 0. (vendor-specific units). 1053 * @max_peak_mse: The maximum value for a peak MSE snapshot. If either 1054 * PHY_MSE_CAP_PEAK or PHY_MSE_CAP_WORST_PEAK is supported, this value MUST 1055 * be greater than 0. (vendor-specific units). 1056 * @refresh_rate_ps: The typical interval, in picoseconds, between hardware 1057 * updates of the MSE values. This is an estimate, and callers should not 1058 * assume synchronous sampling. (vendor-specific units). 1059 * @num_symbols: The number of symbols aggregated per hardware sample to 1060 * calculate the MSE. (vendor-specific units). 1061 * @supported_caps: A bitmask of PHY_MSE_CAP_* values indicating which 1062 * measurement types (e.g., average, peak) and channels 1063 * (e.g., per-pair or link-wide) are supported. 1064 */ 1065 struct phy_mse_capability { 1066 u64 max_average_mse; 1067 u64 max_peak_mse; 1068 u64 refresh_rate_ps; 1069 u64 num_symbols; 1070 u32 supported_caps; 1071 }; 1072 1073 /** 1074 * struct phy_mse_snapshot - A snapshot of Mean Square Error (MSE) diagnostics 1075 * 1076 * Holds a set of MSE diagnostic values that were all captured from a single 1077 * measurement window. 1078 * 1079 * Values are raw, device-scaled and not normalized. Use struct 1080 * phy_mse_capability to interpret the scale and sampling window. 1081 * 1082 * @average_mse: The average MSE value over the measurement window. 1083 * OPEN Alliance references MSE as a DCQ metric; recommends 2^16 symbols and 1084 * 0..511 scaling. Exact scale and refresh are vendor-specific. 1085 * (100BASE-T1 TC1 v1.0 6.1.1; 1000BASE-T1 TC12 v2.2 6.1.1). 1086 * 1087 * @peak_mse: The peak MSE value observed within the measurement window. 1088 * For 100BASE-T1, "pMSE" is optional and may be implemented via a sliding 1089 * 128-symbol window with periodic capture; not standardized for 1000BASE-T1. 1090 * (100BASE-T1 TC1 v1.0 6.1.3, Table "DCQ.peakMSE"). 1091 * 1092 * @worst_peak_mse: A latched high-water mark of the peak MSE since last read 1093 * (read-to-clear if implemented). OPEN Alliance shows a latched "worst case 1094 * peak MSE" for 100BASE-T1 pMSE; availability/semantics outside that are 1095 * vendor-specific. (100BASE-T1 TC1 v1.0 6.1.3, DCQ.peakMSE high byte; 1096 * 1000BASE-T1 TC12 v2.2 treats DCQ details as vendor-specific.) 1097 */ 1098 struct phy_mse_snapshot { 1099 u64 average_mse; 1100 u64 peak_mse; 1101 u64 worst_peak_mse; 1102 }; 1103 1104 /** 1105 * struct phy_driver - Driver structure for a particular PHY type 1106 * 1107 * @mdiodrv: Data common to all MDIO devices 1108 * @phy_id: The result of reading the UID registers of this PHY 1109 * type, and ANDing them with the phy_id_mask. This driver 1110 * only works for PHYs with IDs which match this field 1111 * @name: The friendly name of this PHY type 1112 * @phy_id_mask: Defines the important bits of the phy_id 1113 * @features: A mandatory list of features (speed, duplex, etc) 1114 * supported by this PHY 1115 * @flags: A bitfield defining certain other features this PHY 1116 * supports (like interrupts) 1117 * @driver_data: Static driver data 1118 * 1119 * All functions are optional. If config_aneg or read_status 1120 * are not implemented, the phy core uses the genphy versions. 1121 * Note that none of these functions should be called from 1122 * interrupt time. The goal is for the bus read/write functions 1123 * to be able to block when the bus transaction is happening, 1124 * and be freed up by an interrupt (The MPC85xx has this ability, 1125 * though it is not currently supported in the driver). 1126 */ 1127 struct phy_driver { 1128 struct mdio_driver_common mdiodrv; 1129 u32 phy_id; 1130 char *name; 1131 u32 phy_id_mask; 1132 const unsigned long * const features; 1133 u32 flags; 1134 const void *driver_data; 1135 1136 /** 1137 * @soft_reset: Called to issue a PHY software reset 1138 */ 1139 int (*soft_reset)(struct phy_device *phydev); 1140 1141 /** 1142 * @config_init: Called to initialize the PHY, 1143 * including after a reset 1144 */ 1145 int (*config_init)(struct phy_device *phydev); 1146 1147 /** 1148 * @probe: Called during discovery. Used to set 1149 * up device-specific structures, if any 1150 */ 1151 int (*probe)(struct phy_device *phydev); 1152 1153 /** 1154 * @get_features: Probe the hardware to determine what 1155 * abilities it has. Should only set phydev->supported. 1156 */ 1157 int (*get_features)(struct phy_device *phydev); 1158 1159 /** 1160 * @inband_caps: query whether in-band is supported for the given PHY 1161 * interface mode. Returns a bitmask of bits defined by enum 1162 * link_inband_signalling. 1163 */ 1164 unsigned int (*inband_caps)(struct phy_device *phydev, 1165 phy_interface_t interface); 1166 1167 /** 1168 * @config_inband: configure in-band mode for the PHY 1169 */ 1170 int (*config_inband)(struct phy_device *phydev, unsigned int modes); 1171 1172 /** 1173 * @get_rate_matching: Get the supported type of rate matching for a 1174 * particular phy interface. This is used by phy consumers to determine 1175 * whether to advertise lower-speed modes for that interface. It is 1176 * assumed that if a rate matching mode is supported on an interface, 1177 * then that interface's rate can be adapted to all slower link speeds 1178 * supported by the phy. If the interface is not supported, this should 1179 * return %RATE_MATCH_NONE. 1180 */ 1181 int (*get_rate_matching)(struct phy_device *phydev, 1182 phy_interface_t iface); 1183 1184 /* PHY Power Management */ 1185 /** @suspend: Suspend the hardware, saving state if needed */ 1186 int (*suspend)(struct phy_device *phydev); 1187 /** @resume: Resume the hardware, restoring state if needed */ 1188 int (*resume)(struct phy_device *phydev); 1189 1190 /** 1191 * @config_aneg: Configures the advertisement and resets 1192 * autonegotiation if phydev->autoneg is on, 1193 * forces the speed to the current settings in phydev 1194 * if phydev->autoneg is off 1195 */ 1196 int (*config_aneg)(struct phy_device *phydev); 1197 1198 /** @aneg_done: Determines the auto negotiation result */ 1199 int (*aneg_done)(struct phy_device *phydev); 1200 1201 /** @read_status: Determines the negotiated speed and duplex */ 1202 int (*read_status)(struct phy_device *phydev); 1203 1204 /** 1205 * @config_intr: Enables or disables interrupts. 1206 * It should also clear any pending interrupts prior to enabling the 1207 * IRQs and after disabling them. 1208 */ 1209 int (*config_intr)(struct phy_device *phydev); 1210 1211 /** @handle_interrupt: Override default interrupt handling */ 1212 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 1213 1214 /** @remove: Clears up any memory if needed */ 1215 void (*remove)(struct phy_device *phydev); 1216 1217 /** 1218 * @match_phy_device: Returns true if this is a suitable 1219 * driver for the given phydev. If NULL, matching is based on 1220 * phy_id and phy_id_mask. 1221 */ 1222 int (*match_phy_device)(struct phy_device *phydev, 1223 const struct phy_driver *phydrv); 1224 1225 /** 1226 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 1227 * register changes to enable Wake on LAN, so set_wol is 1228 * provided to be called in the ethernet driver's set_wol 1229 * function. 1230 */ 1231 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1232 1233 /** 1234 * @get_wol: See set_wol, but for checking whether Wake on LAN 1235 * is enabled. 1236 */ 1237 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1238 1239 /** 1240 * @link_change_notify: Called to inform a PHY device driver 1241 * when the core is about to change the link state. This 1242 * callback is supposed to be used as fixup hook for drivers 1243 * that need to take action when the link state 1244 * changes. Drivers are by no means allowed to mess with the 1245 * PHY device structure in their implementations. 1246 */ 1247 void (*link_change_notify)(struct phy_device *dev); 1248 1249 /** 1250 * @read_mmd: PHY specific driver override for reading a MMD 1251 * register. This function is optional for PHY specific 1252 * drivers. When not provided, the default MMD read function 1253 * will be used by phy_read_mmd(), which will use either a 1254 * direct read for Clause 45 PHYs or an indirect read for 1255 * Clause 22 PHYs. devnum is the MMD device number within the 1256 * PHY device, regnum is the register within the selected MMD 1257 * device. 1258 */ 1259 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1260 1261 /** 1262 * @write_mmd: PHY specific driver override for writing a MMD 1263 * register. This function is optional for PHY specific 1264 * drivers. When not provided, the default MMD write function 1265 * will be used by phy_write_mmd(), which will use either a 1266 * direct write for Clause 45 PHYs, or an indirect write for 1267 * Clause 22 PHYs. devnum is the MMD device number within the 1268 * PHY device, regnum is the register within the selected MMD 1269 * device. val is the value to be written. 1270 */ 1271 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1272 u16 val); 1273 1274 /** @read_page: Return the current PHY register page number */ 1275 int (*read_page)(struct phy_device *dev); 1276 /** @write_page: Set the current PHY register page number */ 1277 int (*write_page)(struct phy_device *dev, int page); 1278 1279 /** 1280 * @module_info: Get the size and type of the eeprom contained 1281 * within a plug-in module 1282 */ 1283 int (*module_info)(struct phy_device *dev, 1284 struct ethtool_modinfo *modinfo); 1285 1286 /** 1287 * @module_eeprom: Get the eeprom information from the plug-in 1288 * module 1289 */ 1290 int (*module_eeprom)(struct phy_device *dev, 1291 struct ethtool_eeprom *ee, u8 *data); 1292 1293 /** @cable_test_start: Start a cable test */ 1294 int (*cable_test_start)(struct phy_device *dev); 1295 1296 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1297 int (*cable_test_tdr_start)(struct phy_device *dev, 1298 const struct phy_tdr_config *config); 1299 1300 /** 1301 * @cable_test_get_status: Once per second, or on interrupt, 1302 * request the status of the test. 1303 */ 1304 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1305 1306 /* Get statistics from the PHY using ethtool */ 1307 /** 1308 * @get_phy_stats: Retrieve PHY statistics. 1309 * @dev: The PHY device for which the statistics are retrieved. 1310 * @eth_stats: structure where Ethernet PHY stats will be stored. 1311 * @stats: structure where additional PHY-specific stats will be stored. 1312 * 1313 * Retrieves the supported PHY statistics and populates the provided 1314 * structures. The input structures are pre-initialized with 1315 * `ETHTOOL_STAT_NOT_SET`, and the driver must only modify members 1316 * corresponding to supported statistics. Unmodified members will remain 1317 * set to `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace. 1318 */ 1319 void (*get_phy_stats)(struct phy_device *dev, 1320 struct ethtool_eth_phy_stats *eth_stats, 1321 struct ethtool_phy_stats *stats); 1322 1323 /** 1324 * @get_link_stats: Retrieve link statistics. 1325 * @dev: The PHY device for which the statistics are retrieved. 1326 * @link_stats: structure where link-specific stats will be stored. 1327 * 1328 * Retrieves link-related statistics for the given PHY device. The input 1329 * structure is pre-initialized with `ETHTOOL_STAT_NOT_SET`, and the 1330 * driver must only modify members corresponding to supported 1331 * statistics. Unmodified members will remain set to 1332 * `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace. 1333 */ 1334 void (*get_link_stats)(struct phy_device *dev, 1335 struct ethtool_link_ext_stats *link_stats); 1336 1337 /** 1338 * @update_stats: Trigger periodic statistics updates. 1339 * @dev: The PHY device for which statistics updates are triggered. 1340 * 1341 * Periodically gathers statistics from the PHY device to update locally 1342 * maintained 64-bit counters. This is necessary for PHYs that implement 1343 * reduced-width counters (e.g., 16-bit or 32-bit) which can overflow 1344 * more frequently compared to 64-bit counters. By invoking this 1345 * callback, drivers can fetch the current counter values, handle 1346 * overflow detection, and accumulate the results into local 64-bit 1347 * counters for accurate reporting through the `get_phy_stats` and 1348 * `get_link_stats` interfaces. 1349 * 1350 * Return: 0 on success or a negative error code on failure. 1351 */ 1352 int (*update_stats)(struct phy_device *dev); 1353 1354 /** @get_sset_count: Number of statistic counters */ 1355 int (*get_sset_count)(struct phy_device *dev); 1356 /** @get_strings: Names of the statistic counters */ 1357 void (*get_strings)(struct phy_device *dev, u8 *data); 1358 /** @get_stats: Return the statistic counter values */ 1359 void (*get_stats)(struct phy_device *dev, 1360 struct ethtool_stats *stats, u64 *data); 1361 1362 /* Get and Set PHY tunables */ 1363 /** @get_tunable: Return the value of a tunable */ 1364 int (*get_tunable)(struct phy_device *dev, 1365 struct ethtool_tunable *tuna, void *data); 1366 /** @set_tunable: Set the value of a tunable */ 1367 int (*set_tunable)(struct phy_device *dev, 1368 struct ethtool_tunable *tuna, 1369 const void *data); 1370 /** 1371 * @set_loopback: Set the loopback mode of the PHY 1372 * enable selects if the loopback mode is enabled or disabled. If the 1373 * loopback mode is enabled, then the speed of the loopback mode can be 1374 * requested with the speed argument. If the speed argument is zero, 1375 * then any speed can be selected. If the speed argument is > 0, then 1376 * this speed shall be selected for the loopback mode or EOPNOTSUPP 1377 * shall be returned if speed selection is not supported. 1378 */ 1379 int (*set_loopback)(struct phy_device *dev, bool enable, int speed); 1380 /** @get_sqi: Get the signal quality indication */ 1381 int (*get_sqi)(struct phy_device *dev); 1382 /** @get_sqi_max: Get the maximum signal quality indication */ 1383 int (*get_sqi_max)(struct phy_device *dev); 1384 1385 /** 1386 * @get_mse_capability: Get capabilities and scale of MSE measurement 1387 * @dev: PHY device 1388 * @cap: Output (filled on success) 1389 * 1390 * Fill @cap with the PHY's MSE capability for the current 1391 * link mode: scale limits (max_average_mse, max_peak_mse), update 1392 * interval (refresh_rate_ps), sample length (num_symbols) and the 1393 * capability bitmask (supported_caps). 1394 * 1395 * Implementations may defer capability report until hardware has 1396 * converged; in that case they should return -EAGAIN and allow the 1397 * caller to retry later. 1398 * 1399 * Return: 0 on success. On failure, returns a negative errno code, such 1400 * as -EOPNOTSUPP if MSE measurement is not supported by the PHY or in 1401 * the current link mode, or -EAGAIN if the capability information is 1402 * not yet available. 1403 */ 1404 int (*get_mse_capability)(struct phy_device *dev, 1405 struct phy_mse_capability *cap); 1406 1407 /** 1408 * @get_mse_snapshot: Retrieve a snapshot of MSE diagnostic values 1409 * @dev: PHY device 1410 * @channel: Channel identifier (PHY_MSE_CHANNEL_*) 1411 * @snapshot: Output (filled on success) 1412 * 1413 * Fill @snapshot with a correlated set of MSE values from the most 1414 * recent measurement window. 1415 * 1416 * Callers must validate @channel against supported_caps returned by 1417 * get_mse_capability(). Drivers must not coerce @channel; if the 1418 * requested selector is not implemented by the device or current link 1419 * mode, the operation must fail. 1420 * 1421 * worst_peak_mse is latched and must be treated as read-to-clear. 1422 * 1423 * Return: 0 on success. On failure, returns a negative errno code, such 1424 * as -EOPNOTSUPP if MSE measurement is not supported by the PHY or in 1425 * the current link mode, or -EAGAIN if measurements are not yet 1426 * available. 1427 */ 1428 int (*get_mse_snapshot)(struct phy_device *dev, 1429 enum phy_mse_channel channel, 1430 struct phy_mse_snapshot *snapshot); 1431 1432 /* PLCA RS interface */ 1433 /** @get_plca_cfg: Return the current PLCA configuration */ 1434 int (*get_plca_cfg)(struct phy_device *dev, 1435 struct phy_plca_cfg *plca_cfg); 1436 /** @set_plca_cfg: Set the PLCA configuration */ 1437 int (*set_plca_cfg)(struct phy_device *dev, 1438 const struct phy_plca_cfg *plca_cfg); 1439 /** @get_plca_status: Return the current PLCA status info */ 1440 int (*get_plca_status)(struct phy_device *dev, 1441 struct phy_plca_status *plca_st); 1442 1443 /** 1444 * @led_brightness_set: Set a PHY LED brightness. Index 1445 * indicates which of the PHYs led should be set. Value 1446 * follows the standard LED class meaning, e.g. LED_OFF, 1447 * LED_HALF, LED_FULL. 1448 */ 1449 int (*led_brightness_set)(struct phy_device *dev, 1450 u8 index, enum led_brightness value); 1451 1452 /** 1453 * @led_blink_set: Set a PHY LED blinking. Index indicates 1454 * which of the PHYs led should be configured to blink. Delays 1455 * are in milliseconds and if both are zero then a sensible 1456 * default should be chosen. The call should adjust the 1457 * timings in that case and if it can't match the values 1458 * specified exactly. 1459 */ 1460 int (*led_blink_set)(struct phy_device *dev, u8 index, 1461 unsigned long *delay_on, 1462 unsigned long *delay_off); 1463 /** 1464 * @led_hw_is_supported: Can the HW support the given rules. 1465 * @dev: PHY device which has the LED 1466 * @index: Which LED of the PHY device 1467 * @rules The core is interested in these rules 1468 * 1469 * Return 0 if yes, -EOPNOTSUPP if not, or an error code. 1470 */ 1471 int (*led_hw_is_supported)(struct phy_device *dev, u8 index, 1472 unsigned long rules); 1473 /** 1474 * @led_hw_control_set: Set the HW to control the LED 1475 * @dev: PHY device which has the LED 1476 * @index: Which LED of the PHY device 1477 * @rules The rules used to control the LED 1478 * 1479 * Returns 0, or a an error code. 1480 */ 1481 int (*led_hw_control_set)(struct phy_device *dev, u8 index, 1482 unsigned long rules); 1483 /** 1484 * @led_hw_control_get: Get how the HW is controlling the LED 1485 * @dev: PHY device which has the LED 1486 * @index: Which LED of the PHY device 1487 * @rules Pointer to the rules used to control the LED 1488 * 1489 * Set *@rules to how the HW is currently blinking. Returns 0 1490 * on success, or a error code if the current blinking cannot 1491 * be represented in rules, or some other error happens. 1492 */ 1493 int (*led_hw_control_get)(struct phy_device *dev, u8 index, 1494 unsigned long *rules); 1495 1496 /** 1497 * @led_polarity_set: Set the LED polarity modes 1498 * @dev: PHY device which has the LED 1499 * @index: Which LED of the PHY device 1500 * @modes: bitmap of LED polarity modes 1501 * 1502 * Configure LED with all the required polarity modes in @modes 1503 * to make it correctly turn ON or OFF. 1504 * 1505 * Returns 0, or an error code. 1506 */ 1507 int (*led_polarity_set)(struct phy_device *dev, int index, 1508 unsigned long modes); 1509 1510 /** 1511 * @get_next_update_time: Get the time until the next update event 1512 * @dev: PHY device 1513 * 1514 * Callback to determine the time (in jiffies) until the next 1515 * update event for the PHY state machine. Allows PHY drivers to 1516 * dynamically adjust polling intervals based on link state or other 1517 * conditions. 1518 * 1519 * Returns the time in jiffies until the next update event. 1520 */ 1521 unsigned int (*get_next_update_time)(struct phy_device *dev); 1522 1523 /** 1524 * @attach_mii_port: Attach the given MII port to the PHY device 1525 * @dev: PHY device to notify 1526 * @port: The port being added 1527 * 1528 * Called when an MII port that needs to be driven by the PHY is found. 1529 * 1530 * The port that is being passed may or may not be initialized. If it is 1531 * already initialized, it is by the generic port representation from 1532 * devicetree, which superseeds any strapping or vendor-specific 1533 * properties. 1534 * 1535 * If the port isn't initialized, the port->mediums and port->lanes 1536 * fields must be set, possibly according to strapping information. 1537 * 1538 * The PHY driver must set the port->interfaces field to indicate the 1539 * possible MII modes that this PHY can output on the port. 1540 * 1541 * Returns 0, or an error code. 1542 */ 1543 int (*attach_mii_port)(struct phy_device *dev, struct phy_port *port); 1544 1545 /** 1546 * @attach_mdi_port: Attach the given MII port to the PHY device 1547 * @dev: PHY device to notify 1548 * @port: The port being added 1549 * 1550 * Called when a port that needs to be driven by the PHY is found. The 1551 * number of time this will be called depends on phydev->max_n_ports, 1552 * which the driver can change in .probe(). 1553 * 1554 * The port that is being passed may or may not be initialized. If it is 1555 * already initialized, it is by the generic port representation from 1556 * devicetree, which superseeds any strapping or vendor-specific 1557 * properties. 1558 * 1559 * If the port isn't initialized, the port->mediums and port->lanes 1560 * fields must be set, possibly according to strapping information. 1561 * 1562 * Returns 0, or an error code. 1563 */ 1564 int (*attach_mdi_port)(struct phy_device *dev, struct phy_port *port); 1565 }; 1566 #define to_phy_driver(d) container_of_const(to_mdio_common_driver(d), \ 1567 struct phy_driver, mdiodrv) 1568 1569 #define PHY_ID_MATCH_EXTACT_MASK GENMASK(31, 0) 1570 #define PHY_ID_MATCH_MODEL_MASK GENMASK(31, 4) 1571 #define PHY_ID_MATCH_VENDOR_MASK GENMASK(31, 10) 1572 1573 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = PHY_ID_MATCH_EXTACT_MASK 1574 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = PHY_ID_MATCH_MODEL_MASK 1575 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = PHY_ID_MATCH_VENDOR_MASK 1576 1577 /** 1578 * phy_id_compare - compare @id1 with @id2 taking account of @mask 1579 * @id1: first PHY ID 1580 * @id2: second PHY ID 1581 * @mask: the PHY ID mask, set bits are significant in matching 1582 * 1583 * Return true if the bits from @id1 and @id2 specified by @mask match. 1584 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). 1585 */ 1586 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) 1587 { 1588 return !((id1 ^ id2) & mask); 1589 } 1590 1591 /** 1592 * phy_id_compare_vendor - compare @id with @vendor mask 1593 * @id: PHY ID 1594 * @vendor_mask: PHY Vendor mask 1595 * 1596 * Return: true if the bits from @id match @vendor using the 1597 * generic PHY Vendor mask. 1598 */ 1599 static inline bool phy_id_compare_vendor(u32 id, u32 vendor_mask) 1600 { 1601 return phy_id_compare(id, vendor_mask, PHY_ID_MATCH_VENDOR_MASK); 1602 } 1603 1604 /** 1605 * phy_id_compare_model - compare @id with @model mask 1606 * @id: PHY ID 1607 * @model_mask: PHY Model mask 1608 * 1609 * Return: true if the bits from @id match @model using the 1610 * generic PHY Model mask. 1611 */ 1612 static inline bool phy_id_compare_model(u32 id, u32 model_mask) 1613 { 1614 return phy_id_compare(id, model_mask, PHY_ID_MATCH_MODEL_MASK); 1615 } 1616 1617 /** 1618 * phydev_id_compare - compare @id with the PHY's Clause 22 ID 1619 * @phydev: the PHY device 1620 * @id: the PHY ID to be matched 1621 * 1622 * Compare the @phydev clause 22 ID with the provided @id and return true or 1623 * false depending whether it matches, using the bound driver mask. The 1624 * @phydev must be bound to a driver. 1625 */ 1626 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) 1627 { 1628 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); 1629 } 1630 1631 const char *phy_speed_to_str(int speed); 1632 const char *phy_duplex_to_str(unsigned int duplex); 1633 const char *phy_rate_matching_to_str(int rate_matching); 1634 1635 int phy_interface_num_ports(phy_interface_t interface); 1636 1637 /** 1638 * phy_is_started - Convenience function to check whether PHY is started 1639 * @phydev: The phy_device struct 1640 */ 1641 static inline bool phy_is_started(struct phy_device *phydev) 1642 { 1643 return phydev->state >= PHY_UP; 1644 } 1645 1646 /** 1647 * phy_driver_is_genphy - Convenience function to check whether PHY is driven 1648 * by one of the generic PHY drivers 1649 * @phydev: The phy_device struct 1650 * Return: true if PHY is driven by one of the genphy drivers 1651 */ 1652 static inline bool phy_driver_is_genphy(struct phy_device *phydev) 1653 { 1654 return phydev->is_genphy_driven; 1655 } 1656 1657 /** 1658 * phy_disable_eee_mode - Don't advertise an EEE mode. 1659 * @phydev: The phy_device struct 1660 * @link_mode: The EEE mode to be disabled 1661 */ 1662 static inline void phy_disable_eee_mode(struct phy_device *phydev, u32 link_mode) 1663 { 1664 WARN_ON(phy_is_started(phydev)); 1665 1666 linkmode_set_bit(link_mode, phydev->eee_disabled_modes); 1667 linkmode_clear_bit(link_mode, phydev->advertising_eee); 1668 } 1669 1670 /** 1671 * phy_can_wakeup() - indicate whether PHY has driver model wakeup capabilities 1672 * @phydev: The phy_device struct 1673 * 1674 * Returns: true/false depending on the PHY driver's device_set_wakeup_capable() 1675 * setting. 1676 */ 1677 static inline bool phy_can_wakeup(struct phy_device *phydev) 1678 { 1679 return device_can_wakeup(&phydev->mdio.dev); 1680 } 1681 1682 /** 1683 * phy_may_wakeup() - indicate whether PHY has wakeup enabled 1684 * @phydev: The phy_device struct 1685 * 1686 * Returns: true/false depending on the PHY driver's device_set_wakeup_enabled() 1687 * setting if using the driver model, otherwise the legacy determination. 1688 */ 1689 bool phy_may_wakeup(struct phy_device *phydev); 1690 1691 void phy_resolve_aneg_pause(struct phy_device *phydev); 1692 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1693 1694 /** 1695 * phy_read - Convenience function for reading a given PHY register 1696 * @phydev: the phy_device struct 1697 * @regnum: register number to read 1698 * 1699 * NOTE: MUST NOT be called from interrupt context, 1700 * because the bus read/write functions may wait for an interrupt 1701 * to conclude the operation. 1702 */ 1703 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1704 { 1705 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1706 } 1707 1708 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1709 timeout_us, sleep_before_read) \ 1710 ({ \ 1711 int __ret, __val; \ 1712 __ret = read_poll_timeout(__val = phy_read, val, \ 1713 __val < 0 || (cond), \ 1714 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1715 if (__val < 0) \ 1716 __ret = __val; \ 1717 if (__ret) \ 1718 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1719 __ret; \ 1720 }) 1721 1722 /** 1723 * __phy_read - convenience function for reading a given PHY register 1724 * @phydev: the phy_device struct 1725 * @regnum: register number to read 1726 * 1727 * The caller must have taken the MDIO bus lock. 1728 */ 1729 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1730 { 1731 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1732 } 1733 1734 /** 1735 * phy_write - Convenience function for writing a given PHY register 1736 * @phydev: the phy_device struct 1737 * @regnum: register number to write 1738 * @val: value to write to @regnum 1739 * 1740 * NOTE: MUST NOT be called from interrupt context, 1741 * because the bus read/write functions may wait for an interrupt 1742 * to conclude the operation. 1743 */ 1744 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1745 { 1746 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1747 } 1748 1749 /** 1750 * __phy_write - Convenience function for writing a given PHY register 1751 * @phydev: the phy_device struct 1752 * @regnum: register number to write 1753 * @val: value to write to @regnum 1754 * 1755 * The caller must have taken the MDIO bus lock. 1756 */ 1757 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1758 { 1759 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1760 val); 1761 } 1762 1763 /** 1764 * __phy_modify_changed() - Convenience function for modifying a PHY register 1765 * @phydev: a pointer to a &struct phy_device 1766 * @regnum: register number 1767 * @mask: bit mask of bits to clear 1768 * @set: bit mask of bits to set 1769 * 1770 * Unlocked helper function which allows a PHY register to be modified as 1771 * new register value = (old register value & ~mask) | set 1772 * 1773 * Returns negative errno, 0 if there was no change, and 1 in case of change 1774 */ 1775 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1776 u16 mask, u16 set) 1777 { 1778 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1779 regnum, mask, set); 1780 } 1781 1782 /* 1783 * phy_read_mmd - Convenience function for reading a register 1784 * from an MMD on a given PHY. 1785 */ 1786 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1787 1788 /** 1789 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1790 * condition is met or a timeout occurs 1791 * 1792 * @phydev: The phy_device struct 1793 * @devaddr: The MMD to read from 1794 * @regnum: The register on the MMD to read 1795 * @val: Variable to read the register into 1796 * @cond: Break condition (usually involving @val) 1797 * @sleep_us: Maximum time to sleep between reads in us (0 tight-loops). Please 1798 * read usleep_range() function description for details and 1799 * limitations. 1800 * @timeout_us: Timeout in us, 0 means never timeout 1801 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1802 * 1803 * Returns: 0 on success and -ETIMEDOUT upon a timeout. In either 1804 * case, the last read value at @args is stored in @val. Must not 1805 * be called from atomic context if sleep_us or timeout_us are used. 1806 */ 1807 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1808 sleep_us, timeout_us, sleep_before_read) \ 1809 ({ \ 1810 int __ret, __val; \ 1811 __ret = read_poll_timeout(__val = phy_read_mmd, val, \ 1812 __val < 0 || (cond), \ 1813 sleep_us, timeout_us, sleep_before_read, \ 1814 phydev, devaddr, regnum); \ 1815 if (__val < 0) \ 1816 __ret = __val; \ 1817 if (__ret) \ 1818 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1819 __ret; \ 1820 }) 1821 1822 /* 1823 * __phy_read_mmd - Convenience function for reading a register 1824 * from an MMD on a given PHY. 1825 */ 1826 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1827 1828 /* 1829 * phy_write_mmd - Convenience function for writing a register 1830 * on an MMD on a given PHY. 1831 */ 1832 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1833 1834 /* 1835 * __phy_write_mmd - Convenience function for writing a register 1836 * on an MMD on a given PHY. 1837 */ 1838 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1839 1840 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1841 u16 set); 1842 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1843 u16 set); 1844 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1845 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1846 1847 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1848 u16 mask, u16 set); 1849 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1850 u16 mask, u16 set); 1851 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1852 u16 mask, u16 set); 1853 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1854 u16 mask, u16 set); 1855 1856 /** 1857 * __phy_set_bits - Convenience function for setting bits in a PHY register 1858 * @phydev: the phy_device struct 1859 * @regnum: register number to write 1860 * @val: bits to set 1861 * 1862 * The caller must have taken the MDIO bus lock. 1863 */ 1864 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1865 { 1866 return __phy_modify(phydev, regnum, 0, val); 1867 } 1868 1869 /** 1870 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1871 * @phydev: the phy_device struct 1872 * @regnum: register number to write 1873 * @val: bits to clear 1874 * 1875 * The caller must have taken the MDIO bus lock. 1876 */ 1877 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1878 u16 val) 1879 { 1880 return __phy_modify(phydev, regnum, val, 0); 1881 } 1882 1883 /** 1884 * phy_set_bits - Convenience function for setting bits in a PHY register 1885 * @phydev: the phy_device struct 1886 * @regnum: register number to write 1887 * @val: bits to set 1888 */ 1889 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1890 { 1891 return phy_modify(phydev, regnum, 0, val); 1892 } 1893 1894 /** 1895 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1896 * @phydev: the phy_device struct 1897 * @regnum: register number to write 1898 * @val: bits to clear 1899 */ 1900 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1901 { 1902 return phy_modify(phydev, regnum, val, 0); 1903 } 1904 1905 /** 1906 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1907 * on MMD 1908 * @phydev: the phy_device struct 1909 * @devad: the MMD containing register to modify 1910 * @regnum: register number to modify 1911 * @val: bits to set 1912 * 1913 * The caller must have taken the MDIO bus lock. 1914 */ 1915 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1916 u32 regnum, u16 val) 1917 { 1918 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1919 } 1920 1921 /** 1922 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1923 * on MMD 1924 * @phydev: the phy_device struct 1925 * @devad: the MMD containing register to modify 1926 * @regnum: register number to modify 1927 * @val: bits to clear 1928 * 1929 * The caller must have taken the MDIO bus lock. 1930 */ 1931 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1932 u32 regnum, u16 val) 1933 { 1934 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1935 } 1936 1937 /** 1938 * phy_set_bits_mmd - Convenience function for setting bits in a register 1939 * on MMD 1940 * @phydev: the phy_device struct 1941 * @devad: the MMD containing register to modify 1942 * @regnum: register number to modify 1943 * @val: bits to set 1944 */ 1945 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1946 u32 regnum, u16 val) 1947 { 1948 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1949 } 1950 1951 /** 1952 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1953 * on MMD 1954 * @phydev: the phy_device struct 1955 * @devad: the MMD containing register to modify 1956 * @regnum: register number to modify 1957 * @val: bits to clear 1958 */ 1959 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1960 u32 regnum, u16 val) 1961 { 1962 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1963 } 1964 1965 /** 1966 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1967 * @phydev: the phy_device struct 1968 * 1969 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1970 * PHY_MAC_INTERRUPT 1971 */ 1972 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1973 { 1974 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1975 } 1976 1977 /** 1978 * phy_polling_mode - Convenience function for testing whether polling is 1979 * used to detect PHY status changes 1980 * @phydev: the phy_device struct 1981 */ 1982 static inline bool phy_polling_mode(struct phy_device *phydev) 1983 { 1984 if (phydev->state == PHY_CABLETEST) 1985 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1986 return true; 1987 1988 if (phydev->drv->update_stats) 1989 return true; 1990 1991 return phydev->irq == PHY_POLL; 1992 } 1993 1994 /** 1995 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1996 * @phydev: the phy_device struct 1997 */ 1998 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1999 { 2000 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp_set; 2001 } 2002 2003 /** 2004 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 2005 * @phydev: the phy_device struct 2006 */ 2007 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 2008 { 2009 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 2010 } 2011 2012 /** 2013 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 2014 * PTP hardware clock capabilities. 2015 * @phydev: the phy_device struct 2016 */ 2017 static inline bool phy_has_tsinfo(struct phy_device *phydev) 2018 { 2019 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 2020 } 2021 2022 /** 2023 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 2024 * @phydev: the phy_device struct 2025 */ 2026 static inline bool phy_has_txtstamp(struct phy_device *phydev) 2027 { 2028 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 2029 } 2030 2031 static inline int phy_hwtstamp(struct phy_device *phydev, 2032 struct kernel_hwtstamp_config *cfg, 2033 struct netlink_ext_ack *extack) 2034 { 2035 return phydev->mii_ts->hwtstamp_set(phydev->mii_ts, cfg, extack); 2036 } 2037 2038 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 2039 int type) 2040 { 2041 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 2042 } 2043 2044 static inline int phy_ts_info(struct phy_device *phydev, 2045 struct kernel_ethtool_ts_info *tsinfo) 2046 { 2047 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 2048 } 2049 2050 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 2051 int type) 2052 { 2053 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 2054 } 2055 2056 /** 2057 * phy_is_default_hwtstamp - Is the PHY hwtstamp the default timestamp 2058 * @phydev: Pointer to phy_device 2059 * 2060 * This is used to get default timestamping device taking into account 2061 * the new API choice, which is selecting the timestamping from MAC by 2062 * default if the phydev does not have default_timestamp flag enabled. 2063 * 2064 * Return: True if phy is the default hw timestamp, false otherwise. 2065 */ 2066 static inline bool phy_is_default_hwtstamp(struct phy_device *phydev) 2067 { 2068 return phy_has_hwtstamp(phydev) && phydev->default_timestamp; 2069 } 2070 2071 /** 2072 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 2073 * @phydev: the phy_device struct 2074 */ 2075 static inline bool phy_on_sfp(struct phy_device *phydev) 2076 { 2077 return phydev->is_on_sfp_module; 2078 } 2079 2080 /** 2081 * phy_interface_mode_is_rgmii - Convenience function for testing if a 2082 * PHY interface mode is RGMII (all variants) 2083 * @mode: the &phy_interface_t enum 2084 */ 2085 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 2086 { 2087 return mode >= PHY_INTERFACE_MODE_RGMII && 2088 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 2089 }; 2090 2091 /** 2092 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 2093 * negotiation 2094 * @mode: one of &enum phy_interface_t 2095 * 2096 * Returns true if the PHY interface mode uses the 16-bit negotiation 2097 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 2098 */ 2099 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 2100 { 2101 return mode == PHY_INTERFACE_MODE_1000BASEX || 2102 mode == PHY_INTERFACE_MODE_2500BASEX; 2103 } 2104 2105 /** 2106 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 2107 * is RGMII (all variants) 2108 * @phydev: the phy_device struct 2109 */ 2110 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 2111 { 2112 return phy_interface_mode_is_rgmii(phydev->interface); 2113 }; 2114 2115 /** 2116 * phy_is_pseudo_fixed_link - Convenience function for testing if this 2117 * PHY is the CPU port facing side of an Ethernet switch, or similar. 2118 * @phydev: the phy_device struct 2119 */ 2120 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 2121 { 2122 return phydev->is_pseudo_fixed_link; 2123 } 2124 2125 phy_interface_t phy_fix_phy_mode_for_mac_delays(phy_interface_t interface, 2126 bool mac_txid, bool mac_rxid); 2127 2128 int phy_save_page(struct phy_device *phydev); 2129 int phy_select_page(struct phy_device *phydev, int page); 2130 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 2131 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 2132 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 2133 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 2134 u16 mask, u16 set); 2135 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 2136 u16 mask, u16 set); 2137 2138 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 2139 bool is_c45, 2140 struct phy_c45_device_ids *c45_ids); 2141 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 2142 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 2143 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 2144 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 2145 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 2146 int phy_device_register(struct phy_device *phy); 2147 void phy_device_free(struct phy_device *phydev); 2148 void phy_device_remove(struct phy_device *phydev); 2149 int phy_get_c45_ids(struct phy_device *phydev); 2150 int phy_init_hw(struct phy_device *phydev); 2151 int phy_suspend(struct phy_device *phydev); 2152 int phy_resume(struct phy_device *phydev); 2153 int __phy_resume(struct phy_device *phydev); 2154 int phy_loopback(struct phy_device *phydev, bool enable, int speed); 2155 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 2156 phy_interface_t interface); 2157 struct phy_device *phy_find_next(struct mii_bus *bus, struct phy_device *pos); 2158 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 2159 u32 flags, phy_interface_t interface); 2160 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 2161 void (*handler)(struct net_device *), 2162 phy_interface_t interface); 2163 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 2164 void (*handler)(struct net_device *), 2165 phy_interface_t interface); 2166 void phy_disconnect(struct phy_device *phydev); 2167 void phy_detach(struct phy_device *phydev); 2168 void phy_start(struct phy_device *phydev); 2169 void phy_stop(struct phy_device *phydev); 2170 int phy_config_aneg(struct phy_device *phydev); 2171 int _phy_start_aneg(struct phy_device *phydev); 2172 int phy_start_aneg(struct phy_device *phydev); 2173 int phy_aneg_done(struct phy_device *phydev); 2174 unsigned int phy_inband_caps(struct phy_device *phydev, 2175 phy_interface_t interface); 2176 int phy_config_inband(struct phy_device *phydev, unsigned int modes); 2177 int phy_speed_down(struct phy_device *phydev, bool sync); 2178 int phy_speed_up(struct phy_device *phydev); 2179 bool phy_check_valid(int speed, int duplex, unsigned long *features); 2180 2181 int phy_restart_aneg(struct phy_device *phydev); 2182 int phy_reset_after_clk_enable(struct phy_device *phydev); 2183 2184 static inline struct phy_device *phy_find_first(struct mii_bus *bus) 2185 { 2186 return phy_find_next(bus, NULL); 2187 } 2188 2189 #define mdiobus_for_each_phy(_bus, _phydev) \ 2190 for (_phydev = phy_find_first(_bus); _phydev; \ 2191 _phydev = phy_find_next(_bus, _phydev)) 2192 2193 #if IS_ENABLED(CONFIG_PHYLIB) 2194 int phy_start_cable_test(struct phy_device *phydev, 2195 struct netlink_ext_ack *extack); 2196 int phy_start_cable_test_tdr(struct phy_device *phydev, 2197 struct netlink_ext_ack *extack, 2198 const struct phy_tdr_config *config); 2199 #else 2200 static inline 2201 int phy_start_cable_test(struct phy_device *phydev, 2202 struct netlink_ext_ack *extack) 2203 { 2204 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 2205 return -EOPNOTSUPP; 2206 } 2207 static inline 2208 int phy_start_cable_test_tdr(struct phy_device *phydev, 2209 struct netlink_ext_ack *extack, 2210 const struct phy_tdr_config *config) 2211 { 2212 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 2213 return -EOPNOTSUPP; 2214 } 2215 #endif 2216 2217 static inline void phy_device_reset(struct phy_device *phydev, int value) 2218 { 2219 mdio_device_reset(&phydev->mdio, value); 2220 } 2221 2222 #define phydev_err(_phydev, format, args...) \ 2223 dev_err(&_phydev->mdio.dev, format, ##args) 2224 2225 #define phydev_err_probe(_phydev, err, format, args...) \ 2226 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 2227 2228 #define phydev_info(_phydev, format, args...) \ 2229 dev_info(&_phydev->mdio.dev, format, ##args) 2230 2231 #define phydev_warn(_phydev, format, args...) \ 2232 dev_warn(&_phydev->mdio.dev, format, ##args) 2233 2234 #define phydev_dbg(_phydev, format, args...) \ 2235 dev_dbg(&_phydev->mdio.dev, format, ##args) 2236 2237 static inline const char *phydev_name(const struct phy_device *phydev) 2238 { 2239 return dev_name(&phydev->mdio.dev); 2240 } 2241 2242 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 2243 { 2244 mutex_lock(&phydev->mdio.bus->mdio_lock); 2245 } 2246 2247 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 2248 { 2249 mutex_unlock(&phydev->mdio.bus->mdio_lock); 2250 } 2251 2252 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 2253 __printf(2, 3); 2254 char *phy_attached_info_irq(struct phy_device *phydev) 2255 __malloc; 2256 void phy_attached_info(struct phy_device *phydev); 2257 2258 int genphy_match_phy_device(struct phy_device *phydev, 2259 const struct phy_driver *phydrv); 2260 2261 /* Clause 22 PHY */ 2262 int genphy_read_abilities(struct phy_device *phydev); 2263 int genphy_setup_forced(struct phy_device *phydev); 2264 int genphy_restart_aneg(struct phy_device *phydev); 2265 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 2266 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 2267 int genphy_aneg_done(struct phy_device *phydev); 2268 int genphy_update_link(struct phy_device *phydev); 2269 int genphy_read_lpa(struct phy_device *phydev); 2270 int genphy_read_status_fixed(struct phy_device *phydev); 2271 int genphy_read_status(struct phy_device *phydev); 2272 int genphy_read_master_slave(struct phy_device *phydev); 2273 int genphy_suspend(struct phy_device *phydev); 2274 int genphy_resume(struct phy_device *phydev); 2275 int genphy_loopback(struct phy_device *phydev, bool enable, int speed); 2276 int genphy_soft_reset(struct phy_device *phydev); 2277 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 2278 2279 static inline int genphy_config_aneg(struct phy_device *phydev) 2280 { 2281 return __genphy_config_aneg(phydev, false); 2282 } 2283 2284 static inline int genphy_no_config_intr(struct phy_device *phydev) 2285 { 2286 return 0; 2287 } 2288 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 2289 u16 regnum); 2290 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 2291 u16 regnum, u16 val); 2292 2293 /* Clause 37 */ 2294 int genphy_c37_config_aneg(struct phy_device *phydev); 2295 int genphy_c37_read_status(struct phy_device *phydev, bool *changed); 2296 2297 /* Clause 45 PHY */ 2298 int genphy_c45_restart_aneg(struct phy_device *phydev); 2299 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 2300 int genphy_c45_aneg_done(struct phy_device *phydev); 2301 int genphy_c45_read_link(struct phy_device *phydev); 2302 int genphy_c45_read_lpa(struct phy_device *phydev); 2303 int genphy_c45_read_pma(struct phy_device *phydev); 2304 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 2305 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 2306 int genphy_c45_an_config_aneg(struct phy_device *phydev); 2307 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 2308 int genphy_c45_read_mdix(struct phy_device *phydev); 2309 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 2310 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev); 2311 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); 2312 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 2313 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 2314 int genphy_c45_read_status(struct phy_device *phydev); 2315 int genphy_c45_baset1_read_status(struct phy_device *phydev); 2316 int genphy_c45_config_aneg(struct phy_device *phydev); 2317 int genphy_c45_loopback(struct phy_device *phydev, bool enable, int speed); 2318 int genphy_c45_pma_resume(struct phy_device *phydev); 2319 int genphy_c45_pma_suspend(struct phy_device *phydev); 2320 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 2321 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 2322 struct phy_plca_cfg *plca_cfg); 2323 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 2324 const struct phy_plca_cfg *plca_cfg); 2325 int genphy_c45_plca_get_status(struct phy_device *phydev, 2326 struct phy_plca_status *plca_st); 2327 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *lp); 2328 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 2329 struct ethtool_keee *data); 2330 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 2331 struct ethtool_keee *data); 2332 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 2333 int genphy_c45_oatc14_cable_test_start(struct phy_device *phydev); 2334 int genphy_c45_oatc14_cable_test_get_status(struct phy_device *phydev, 2335 bool *finished); 2336 int genphy_c45_oatc14_get_sqi_max(struct phy_device *phydev); 2337 int genphy_c45_oatc14_get_sqi(struct phy_device *phydev); 2338 2339 /* The gen10g_* functions are the old Clause 45 stub */ 2340 int gen10g_config_aneg(struct phy_device *phydev); 2341 2342 static inline int phy_read_status(struct phy_device *phydev) 2343 { 2344 if (!phydev->drv) 2345 return -EIO; 2346 2347 if (phydev->drv->read_status) 2348 return phydev->drv->read_status(phydev); 2349 else 2350 return genphy_read_status(phydev); 2351 } 2352 2353 void phy_drivers_unregister(struct phy_driver *drv, int n); 2354 int phy_drivers_register(struct phy_driver *new_driver, int n, 2355 struct module *owner); 2356 void phy_error(struct phy_device *phydev); 2357 void phy_state_machine(struct work_struct *work); 2358 void phy_trigger_machine(struct phy_device *phydev); 2359 void phy_mac_interrupt(struct phy_device *phydev); 2360 void phy_start_machine(struct phy_device *phydev); 2361 void phy_stop_machine(struct phy_device *phydev); 2362 2363 void phy_ethtool_ksettings_get(struct phy_device *phydev, 2364 struct ethtool_link_ksettings *cmd); 2365 int phy_ethtool_ksettings_set(struct phy_device *phydev, 2366 const struct ethtool_link_ksettings *cmd); 2367 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 2368 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 2369 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 2370 int phy_disable_interrupts(struct phy_device *phydev); 2371 void phy_request_interrupt(struct phy_device *phydev); 2372 void phy_free_interrupt(struct phy_device *phydev); 2373 void phy_print_status(struct phy_device *phydev); 2374 int phy_get_rate_matching(struct phy_device *phydev, 2375 phy_interface_t iface); 2376 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 2377 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 2378 void phy_advertise_supported(struct phy_device *phydev); 2379 void phy_advertise_eee_all(struct phy_device *phydev); 2380 void phy_support_sym_pause(struct phy_device *phydev); 2381 void phy_support_asym_pause(struct phy_device *phydev); 2382 void phy_support_eee(struct phy_device *phydev); 2383 void phy_disable_eee(struct phy_device *phydev); 2384 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 2385 bool autoneg); 2386 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 2387 bool phy_validate_pause(struct phy_device *phydev, 2388 struct ethtool_pauseparam *pp); 2389 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 2390 2391 s32 phy_get_internal_delay(struct phy_device *phydev, const int *delay_values, 2392 int size, bool is_rx); 2393 2394 int phy_get_tx_amplitude_gain(struct phy_device *phydev, struct device *dev, 2395 enum ethtool_link_mode_bit_indices linkmode, 2396 u32 *val); 2397 2398 int phy_get_mac_termination(struct phy_device *phydev, struct device *dev, 2399 u32 *val); 2400 2401 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 2402 bool *tx_pause, bool *rx_pause); 2403 2404 int phy_register_fixup_for_id(const char *bus_id, 2405 int (*run)(struct phy_device *)); 2406 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 2407 int (*run)(struct phy_device *)); 2408 2409 int phy_eee_tx_clock_stop_capable(struct phy_device *phydev); 2410 int phy_eee_rx_clock_stop(struct phy_device *phydev, bool clk_stop_enable); 2411 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 2412 int phy_get_eee_err(struct phy_device *phydev); 2413 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data); 2414 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data); 2415 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 2416 void phy_ethtool_get_wol(struct phy_device *phydev, 2417 struct ethtool_wolinfo *wol); 2418 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 2419 struct ethtool_link_ksettings *cmd); 2420 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 2421 const struct ethtool_link_ksettings *cmd); 2422 int phy_ethtool_nway_reset(struct net_device *ndev); 2423 2424 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 2425 int phy_ethtool_get_sset_count(struct phy_device *phydev); 2426 int phy_ethtool_get_stats(struct phy_device *phydev, 2427 struct ethtool_stats *stats, u64 *data); 2428 2429 void __phy_ethtool_get_phy_stats(struct phy_device *phydev, 2430 struct ethtool_eth_phy_stats *phy_stats, 2431 struct ethtool_phy_stats *phydev_stats); 2432 void __phy_ethtool_get_link_ext_stats(struct phy_device *phydev, 2433 struct ethtool_link_ext_stats *link_stats); 2434 2435 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 2436 struct phy_plca_cfg *plca_cfg); 2437 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 2438 const struct phy_plca_cfg *plca_cfg, 2439 struct netlink_ext_ack *extack); 2440 int phy_ethtool_get_plca_status(struct phy_device *phydev, 2441 struct phy_plca_status *plca_st); 2442 2443 int __phy_hwtstamp_get(struct phy_device *phydev, 2444 struct kernel_hwtstamp_config *config); 2445 int __phy_hwtstamp_set(struct phy_device *phydev, 2446 struct kernel_hwtstamp_config *config, 2447 struct netlink_ext_ack *extack); 2448 2449 struct phy_port *phy_get_sfp_port(struct phy_device *phydev); 2450 2451 extern const struct bus_type mdio_bus_type; 2452 extern const struct class mdio_bus_class; 2453 2454 /** 2455 * phy_module_driver() - Helper macro for registering PHY drivers 2456 * @__phy_drivers: array of PHY drivers to register 2457 * @__count: Numbers of members in array 2458 * 2459 * Helper macro for PHY drivers which do not do anything special in module 2460 * init/exit. Each module may only use this macro once, and calling it 2461 * replaces module_init() and module_exit(). 2462 */ 2463 #define phy_module_driver(__phy_drivers, __count) \ 2464 static int __init phy_module_init(void) \ 2465 { \ 2466 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2467 } \ 2468 module_init(phy_module_init); \ 2469 static void __exit phy_module_exit(void) \ 2470 { \ 2471 phy_drivers_unregister(__phy_drivers, __count); \ 2472 } \ 2473 module_exit(phy_module_exit) 2474 2475 #define module_phy_driver(__phy_drivers) \ 2476 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2477 2478 #endif /* __PHY_H */ 2479