1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2014 MediaTek Inc. 4 * Author: Jie Qiu <jie.qiu@mediatek.com> 5 */ 6 #ifndef __MTK_DPI_REGS_H 7 #define __MTK_DPI_REGS_H 8 9 #define DPI_EN 0x00 10 #define EN BIT(0) 11 12 #define DPI_RET 0x04 13 #define RST BIT(0) 14 15 #define DPI_INTEN 0x08 16 #define INT_VSYNC_EN BIT(0) 17 #define INT_VDE_EN BIT(1) 18 #define INT_UNDERFLOW_EN BIT(2) 19 20 #define DPI_INTSTA 0x0C 21 #define INT_VSYNC_STA BIT(0) 22 #define INT_VDE_STA BIT(1) 23 #define INT_UNDERFLOW_STA BIT(2) 24 25 #define DPI_CON 0x10 26 #define BG_ENABLE BIT(0) 27 #define IN_RB_SWAP BIT(1) 28 #define INTL_EN BIT(2) 29 #define TDFP_EN BIT(3) 30 #define CLPF_EN BIT(4) 31 #define YUV422_EN BIT(5) 32 #define CSC_ENABLE BIT(6) 33 #define R601_SEL BIT(7) 34 #define EMBSYNC_EN BIT(8) 35 #define VS_LODD_EN BIT(16) 36 #define VS_LEVEN_EN BIT(17) 37 #define VS_RODD_EN BIT(18) 38 #define VS_REVEN BIT(19) 39 #define FAKE_DE_LODD BIT(20) 40 #define FAKE_DE_LEVEN BIT(21) 41 #define FAKE_DE_RODD BIT(22) 42 #define FAKE_DE_REVEN BIT(23) 43 44 /* DPI_CON: DPI instances */ 45 #define DPI_OUTPUT_1T1P_EN BIT(24) 46 #define DPI_INPUT_2P_EN BIT(25) 47 /* DPI_CON: DPINTF instances */ 48 #define DPINTF_YUV422_EN BIT(24) 49 #define DPINTF_CSC_ENABLE BIT(26) 50 #define DPINTF_INPUT_2P_EN BIT(29) 51 52 #define DPI_OUTPUT_SETTING 0x14 53 #define CH_SWAP 0 54 #define DPINTF_CH_SWAP 1 55 #define CH_SWAP_MASK (0x7 << 0) 56 #define SWAP_RGB 0x00 57 #define SWAP_GBR 0x01 58 #define SWAP_BRG 0x02 59 #define SWAP_RBG 0x03 60 #define SWAP_GRB 0x04 61 #define SWAP_BGR 0x05 62 #define BIT_SWAP BIT(3) 63 #define B_MASK BIT(4) 64 #define G_MASK BIT(5) 65 #define R_MASK BIT(6) 66 #define DE_MASK BIT(8) 67 #define HS_MASK BIT(9) 68 #define VS_MASK BIT(10) 69 #define DE_POL BIT(12) 70 #define HSYNC_POL BIT(13) 71 #define VSYNC_POL BIT(14) 72 #define CK_POL BIT(15) 73 #define OEN_OFF BIT(16) 74 #define EDGE_SEL BIT(17) 75 #define OUT_BIT 18 76 #define OUT_BIT_MASK (0x3 << 18) 77 #define OUT_BIT_8 0x00 78 #define OUT_BIT_10 0x01 79 #define OUT_BIT_12 0x02 80 #define OUT_BIT_16 0x03 81 #define YC_MAP 20 82 #define YC_MAP_MASK (0x7 << 20) 83 #define YC_MAP_RGB 0x00 84 #define YC_MAP_CYCY 0x04 85 #define YC_MAP_YCYC 0x05 86 #define YC_MAP_CY 0x06 87 #define YC_MAP_YC 0x07 88 89 #define DPI_SIZE 0x18 90 #define HSIZE 0 91 #define HSIZE_MASK (0x1FFF << 0) 92 #define DPINTF_HSIZE_MASK (0xFFFF << 0) 93 #define VSIZE 16 94 #define VSIZE_MASK (0x1FFF << 16) 95 #define DPINTF_VSIZE_MASK (0xFFFF << 16) 96 97 #define DPI_DDR_SETTING 0x1C 98 #define DDR_EN BIT(0) 99 #define DDDR_SEL BIT(1) 100 #define DDR_4PHASE BIT(2) 101 #define DDR_WIDTH (0x3 << 4) 102 #define DDR_PAD_MODE (0x1 << 8) 103 104 #define DPI_TGEN_HWIDTH 0x20 105 #define HPW 0 106 #define HPW_MASK (0xFFF << 0) 107 #define DPINTF_HPW_MASK (0xFFFF << 0) 108 109 #define DPI_TGEN_HPORCH 0x24 110 #define HBP 0 111 #define HBP_MASK (0xFFF << 0) 112 #define DPINTF_HBP_MASK (0xFFFF << 0) 113 #define HFP 16 114 #define HFP_MASK (0xFFF << 16) 115 #define DPINTF_HFP_MASK (0xFFFF << 16) 116 117 #define DPI_TGEN_VWIDTH 0x28 118 #define DPI_TGEN_VPORCH 0x2C 119 120 #define VSYNC_WIDTH_SHIFT 0 121 #define VSYNC_WIDTH_MASK (0xFFF << 0) 122 #define DPINTF_VSYNC_WIDTH_MASK (0xFFFF << 0) 123 #define VSYNC_HALF_LINE_SHIFT 16 124 #define VSYNC_HALF_LINE_MASK BIT(16) 125 #define VSYNC_BACK_PORCH_SHIFT 0 126 #define VSYNC_BACK_PORCH_MASK (0xFFF << 0) 127 #define DPINTF_VSYNC_BACK_PORCH_MASK (0xFFFF << 0) 128 #define VSYNC_FRONT_PORCH_SHIFT 16 129 #define VSYNC_FRONT_PORCH_MASK (0xFFF << 16) 130 #define DPINTF_VSYNC_FRONT_PORCH_MASK (0xFFFF << 16) 131 132 #define DPI_BG_HCNTL 0x30 133 #define BG_RIGHT (0x1FFF << 0) 134 #define BG_LEFT (0x1FFF << 16) 135 136 #define DPI_BG_VCNTL 0x34 137 #define BG_BOT (0x1FFF << 0) 138 #define BG_TOP (0x1FFF << 16) 139 140 #define DPI_BG_COLOR 0x38 141 #define BG_B (0xF << 0) 142 #define BG_G (0xF << 8) 143 #define BG_R (0xF << 16) 144 145 #define DPI_FIFO_CTL 0x3C 146 #define FIFO_VALID_SET (0x1F << 0) 147 #define FIFO_RST_SEL (0x1 << 8) 148 149 #define DPI_STATUS 0x40 150 #define VCOUNTER (0x1FFF << 0) 151 #define DPI_BUSY BIT(16) 152 #define OUTEN BIT(17) 153 #define FIELD BIT(20) 154 #define TDLR BIT(21) 155 156 #define DPI_TMODE 0x44 157 #define DPI_OEN_ON BIT(0) 158 159 #define DPI_CHECKSUM 0x48 160 #define DPI_CHECKSUM_MASK (0xFFFFFF << 0) 161 #define DPI_CHECKSUM_READY BIT(30) 162 #define DPI_CHECKSUM_EN BIT(31) 163 164 #define DPI_DUMMY 0x50 165 #define DPI_DUMMY_MASK (0xFFFFFFFF << 0) 166 167 #define DPI_TGEN_VWIDTH_LEVEN 0x68 168 #define DPI_TGEN_VPORCH_LEVEN 0x6C 169 #define DPI_TGEN_VWIDTH_RODD 0x70 170 #define DPI_TGEN_VPORCH_RODD 0x74 171 #define DPI_TGEN_VWIDTH_REVEN 0x78 172 #define DPI_TGEN_VPORCH_REVEN 0x7C 173 174 #define DPI_ESAV_VTIMING_LODD 0x80 175 #define ESAV_VOFST_LODD (0xFFF << 0) 176 #define ESAV_VWID_LODD (0xFFF << 16) 177 178 #define DPI_ESAV_VTIMING_LEVEN 0x84 179 #define ESAV_VOFST_LEVEN (0xFFF << 0) 180 #define ESAV_VWID_LEVEN (0xFFF << 16) 181 182 #define DPI_ESAV_VTIMING_RODD 0x88 183 #define ESAV_VOFST_RODD (0xFFF << 0) 184 #define ESAV_VWID_RODD (0xFFF << 16) 185 186 #define DPI_ESAV_VTIMING_REVEN 0x8C 187 #define ESAV_VOFST_REVEN (0xFFF << 0) 188 #define ESAV_VWID_REVEN (0xFFF << 16) 189 190 #define DPI_ESAV_FTIMING 0x90 191 #define ESAV_FOFST_ODD (0xFFF << 0) 192 #define ESAV_FOFST_EVEN (0xFFF << 16) 193 194 #define DPI_CLPF_SETTING 0x94 195 #define CLPF_TYPE (0x3 << 0) 196 #define ROUND_EN BIT(4) 197 198 #define DPI_Y_LIMIT 0x98 199 #define Y_LIMINT_BOT 0 200 #define Y_LIMINT_BOT_MASK (0xFFF << 0) 201 #define Y_LIMINT_TOP 16 202 #define Y_LIMINT_TOP_MASK (0xFFF << 16) 203 204 #define DPI_C_LIMIT 0x9C 205 #define C_LIMIT_BOT 0 206 #define C_LIMIT_BOT_MASK (0xFFF << 0) 207 #define C_LIMIT_TOP 16 208 #define C_LIMIT_TOP_MASK (0xFFF << 16) 209 210 #define DPI_YUV422_SETTING 0xA0 211 #define UV_SWAP BIT(0) 212 #define CR_DELSEL BIT(4) 213 #define CB_DELSEL BIT(5) 214 #define Y_DELSEL BIT(6) 215 #define DE_DELSEL BIT(7) 216 217 #define DPI_EMBSYNC_SETTING 0xA4 218 #define EMBSYNC_R_CR_EN BIT(0) 219 #define EMPSYNC_G_Y_EN BIT(1) 220 #define EMPSYNC_B_CB_EN BIT(2) 221 #define ESAV_F_INV BIT(4) 222 #define ESAV_V_INV BIT(5) 223 #define ESAV_H_INV BIT(6) 224 #define ESAV_CODE_MAN BIT(8) 225 #define VS_OUT_SEL (0x7 << 12) 226 227 #define DPI_ESAV_CODE_SET0 0xA8 228 #define ESAV_CODE0 (0xFFF << 0) 229 #define ESAV_CODE1 (0xFFF << 16) 230 231 #define DPI_ESAV_CODE_SET1 0xAC 232 #define ESAV_CODE2 (0xFFF << 0) 233 #define ESAV_CODE3_MSB BIT(16) 234 235 #define EDGE_SEL_EN BIT(5) 236 #define H_FRE_2N BIT(25) 237 238 #define DPI_MATRIX_SET 0xB4 239 #define INT_MATRIX_SEL_MASK GENMASK(4, 0) 240 #define MATRIX_SEL_RGB_TO_JPEG 0 241 #define MATRIX_SEL_RGB_TO_BT601 2 242 243 #define DPI_PATTERN0 0xf00 244 #define DPI_PAT_EN BIT(0) 245 #define DPI_PAT_SEL GENMASK(6, 4) 246 247 #endif /* __MTK_DPI_REGS_H */ 248