1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Copyright (C) 2016 BayLibre, SAS
4  * Author: Neil Armstrong <narmstrong@baylibre.com>
5  */
6 
7 /* Video Input Unit */
8 
9 #ifndef __MESON_VIU_H
10 #define __MESON_VIU_H
11 
12 /* OSDx_BLKx_CFG */
13 #define OSD_MALI_SRC_EN		BIT(30)
14 
15 #define OSD_CANVAS_SEL		16
16 
17 #define OSD_ENDIANNESS_LE	BIT(15)
18 #define OSD_ENDIANNESS_BE	(0)
19 
20 #define OSD_BLK_MODE_422	(0x03 << 8)
21 #define OSD_BLK_MODE_16		(0x04 << 8)
22 #define OSD_BLK_MODE_32		(0x05 << 8)
23 #define OSD_BLK_MODE_24		(0x07 << 8)
24 
25 #define OSD_OUTPUT_COLOR_RGB	BIT(7)
26 #define OSD_OUTPUT_COLOR_YUV	(0)
27 
28 #define OSD_COLOR_MATRIX_32_RGBA	(0x00 << 2)
29 #define OSD_COLOR_MATRIX_32_ARGB	(0x01 << 2)
30 #define OSD_COLOR_MATRIX_32_ABGR	(0x02 << 2)
31 #define OSD_COLOR_MATRIX_32_BGRA	(0x03 << 2)
32 
33 #define OSD_COLOR_MATRIX_24_RGB		(0x00 << 2)
34 
35 #define OSD_COLOR_MATRIX_16_RGB655	(0x00 << 2)
36 #define OSD_COLOR_MATRIX_16_RGB565	(0x04 << 2)
37 
38 #define OSD_MALI_COLOR_MODE_R8		(0 << 8)
39 #define OSD_MALI_COLOR_MODE_YUV422	(1 << 8)
40 #define OSD_MALI_COLOR_MODE_RGB565	(2 << 8)
41 #define OSD_MALI_COLOR_MODE_RGBA5551	(3 << 8)
42 #define OSD_MALI_COLOR_MODE_RGBA4444	(4 << 8)
43 #define OSD_MALI_COLOR_MODE_RGBA8888	(5 << 8)
44 #define OSD_MALI_COLOR_MODE_RGB888	(7 << 8)
45 #define OSD_MALI_COLOR_MODE_YUV422_10B	(8 << 8)
46 #define OSD_MALI_COLOR_MODE_RGBA1010102	(9 << 8)
47 
48 #define OSD_INTERLACE_ENABLED	BIT(1)
49 #define OSD_INTERLACE_ODD	BIT(0)
50 #define OSD_INTERLACE_EVEN	(0)
51 
52 /* OSDx_CTRL_STAT */
53 #define OSD_ENABLE		BIT(21)
54 #define OSD_MEM_LINEAR_ADDR	BIT(2)
55 #define OSD_BLK0_ENABLE		BIT(0)
56 
57 #define OSD_GLOBAL_ALPHA_SHIFT	12
58 
59 /* OSDx_CTRL_STAT2 */
60 #define OSD_DPATH_MALI_AFBCD	BIT(15)
61 #define OSD_REPLACE_EN		BIT(14)
62 #define OSD_REPLACE_SHIFT	6
63 #define OSD_PENDING_STAT_CLEAN	BIT(1)
64 
65 void meson_viu_osd1_reset(struct meson_drm *priv);
66 void meson_viu_g12a_enable_osd1_afbc(struct meson_drm *priv);
67 void meson_viu_g12a_disable_osd1_afbc(struct meson_drm *priv);
68 void meson_viu_gxm_enable_osd1_afbc(struct meson_drm *priv);
69 void meson_viu_gxm_disable_osd1_afbc(struct meson_drm *priv);
70 void meson_viu_init(struct meson_drm *priv);
71 
72 #endif /* __MESON_VIU_H */
73