xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/priv.h (revision ab93e0dd72c37d378dd936f031ffb83ff2bd87ce)
1 /* SPDX-License-Identifier: MIT */
2 #ifndef __NVKM_GSP_PRIV_H__
3 #define __NVKM_GSP_PRIV_H__
4 #include <subdev/gsp.h>
5 #include <rm/gpu.h>
6 enum nvkm_acr_lsf_id;
7 
8 int nvkm_gsp_fwsec_frts(struct nvkm_gsp *);
9 int nvkm_gsp_fwsec_sb(struct nvkm_gsp *);
10 
11 struct nvkm_gsp_fwif {
12 	int version;
13 	int (*load)(struct nvkm_gsp *, int ver, const struct nvkm_gsp_fwif *);
14 	const struct nvkm_gsp_func *func;
15 	const struct nvkm_rm_impl *rm;
16 	const char *ver;
17 	bool enable;
18 };
19 
20 int nvkm_gsp_load_fw(struct nvkm_gsp *, const char *name, const char *ver,
21 		     const struct firmware **);
22 void nvkm_gsp_dtor_fws(struct nvkm_gsp *);
23 
24 int gv100_gsp_nofw(struct nvkm_gsp *, int, const struct nvkm_gsp_fwif *);
25 
26 int tu102_gsp_load(struct nvkm_gsp *, int, const struct nvkm_gsp_fwif *);
27 int tu102_gsp_load_rm(struct nvkm_gsp *, const struct nvkm_gsp_fwif *);
28 
29 int gh100_gsp_load(struct nvkm_gsp *, int, const struct nvkm_gsp_fwif *);
30 
31 #define NVKM_GSP_FIRMWARE_BOOTER(chip,vers)                      \
32 MODULE_FIRMWARE("nvidia/"#chip"/gsp/booter_load-"#vers".bin");   \
33 MODULE_FIRMWARE("nvidia/"#chip"/gsp/booter_unload-"#vers".bin"); \
34 MODULE_FIRMWARE("nvidia/"#chip"/gsp/bootloader-"#vers".bin");    \
35 MODULE_FIRMWARE("nvidia/"#chip"/gsp/gsp-"#vers".bin")
36 
37 #define NVKM_GSP_FIRMWARE_FMC(chip,vers)                      \
38 MODULE_FIRMWARE("nvidia/"#chip"/gsp/fmc-"#vers".bin");        \
39 MODULE_FIRMWARE("nvidia/"#chip"/gsp/bootloader-"#vers".bin"); \
40 MODULE_FIRMWARE("nvidia/"#chip"/gsp/gsp-"#vers".bin")
41 
42 struct nvkm_gsp_func {
43 	const struct nvkm_falcon_func *flcn;
44 	const struct nvkm_falcon_fw_func *fwsec;
45 
46 	char *sig_section;
47 
48 	struct {
49 		int (*ctor)(struct nvkm_gsp *, const char *name, const struct firmware *,
50 			    struct nvkm_falcon *, struct nvkm_falcon_fw *);
51 	} booter;
52 
53 	void (*dtor)(struct nvkm_gsp *);
54 	int (*oneinit)(struct nvkm_gsp *);
55 	int (*init)(struct nvkm_gsp *);
56 	int (*fini)(struct nvkm_gsp *, bool suspend);
57 	int (*reset)(struct nvkm_gsp *);
58 
59 	struct {
60 		const struct nvkm_rm_gpu *gpu;
61 	} rm;
62 };
63 
64 extern const struct nvkm_falcon_func tu102_gsp_flcn;
65 extern const struct nvkm_falcon_fw_func tu102_gsp_fwsec;
66 int tu102_gsp_booter_ctor(struct nvkm_gsp *, const char *, const struct firmware *,
67 			  struct nvkm_falcon *, struct nvkm_falcon_fw *);
68 int tu102_gsp_oneinit(struct nvkm_gsp *);
69 int tu102_gsp_init(struct nvkm_gsp *);
70 int tu102_gsp_fini(struct nvkm_gsp *, bool suspend);
71 int tu102_gsp_reset(struct nvkm_gsp *);
72 u64 tu102_gsp_wpr_heap_size(struct nvkm_gsp *);
73 
74 extern const struct nvkm_falcon_func ga102_gsp_flcn;
75 extern const struct nvkm_falcon_fw_func ga102_gsp_fwsec;
76 int ga102_gsp_booter_ctor(struct nvkm_gsp *, const char *, const struct firmware *,
77 			  struct nvkm_falcon *, struct nvkm_falcon_fw *);
78 int ga102_gsp_reset(struct nvkm_gsp *);
79 
80 int gh100_gsp_oneinit(struct nvkm_gsp *);
81 int gh100_gsp_init(struct nvkm_gsp *);
82 int gh100_gsp_fini(struct nvkm_gsp *, bool suspend);
83 
84 void r535_gsp_dtor(struct nvkm_gsp *);
85 int r535_gsp_oneinit(struct nvkm_gsp *);
86 int r535_gsp_init(struct nvkm_gsp *);
87 int r535_gsp_fini(struct nvkm_gsp *, bool suspend);
88 
89 int nvkm_gsp_new_(const struct nvkm_gsp_fwif *, struct nvkm_device *, enum nvkm_subdev_type, int,
90 		  struct nvkm_gsp **);
91 
92 extern const struct nvkm_gsp_func gv100_gsp;
93 #endif
94