xref: /linux/drivers/gpu/drm/nouveau/include/nvhw/class/clc97b.h (revision ab93e0dd72c37d378dd936f031ffb83ff2bd87ce)
1 /* SPDX-License-Identifier: MIT
2  *
3  * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
4  */
5 #ifndef _clc97b_h_
6 #define _clc97b_h_
7 
8 // dma opcode instructions
9 #define NVC97B_DMA
10 #define NVC97B_DMA_OPCODE                                                        31:29
11 #define NVC97B_DMA_OPCODE_METHOD                                            0x00000000
12 #define NVC97B_DMA_OPCODE_JUMP                                              0x00000001
13 #define NVC97B_DMA_OPCODE_NONINC_METHOD                                     0x00000002
14 #define NVC97B_DMA_OPCODE_SET_SUBDEVICE_MASK                                0x00000003
15 #define NVC97B_DMA_METHOD_COUNT                                                  27:18
16 #define NVC97B_DMA_METHOD_OFFSET                                                  15:2
17 #define NVC97B_DMA_DATA                                                           31:0
18 #define NVC97B_DMA_DATA_NOP                                                 0x00000000
19 #define NVC97B_DMA_JUMP_OFFSET                                                    15:2
20 #define NVC97B_DMA_SET_SUBDEVICE_MASK_VALUE                                       11:0
21 
22 #endif // _clc97b_h
23