1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 /** 27 * DOC: overview 28 * 29 * Multiple Pipe/Plane Combiner (MPC) is a component in the hardware pipeline 30 * that performs blending of multiple planes, using global and per-pixel alpha. 31 * It also performs post-blending color correction operations according to the 32 * hardware capabilities, such as color transformation matrix and gamma 1D and 33 * 3D LUT. 34 * 35 * MPC receives output from all DPP pipes and combines them to multiple outputs 36 * supporting "M MPC inputs -> N MPC outputs" flexible composition 37 * architecture. It features: 38 * 39 * - Programmable blending structure to allow software controlled blending and 40 * cascading; 41 * - Programmable window location of each DPP in active region of display; 42 * - Combining multiple DPP pipes in one active region when a single DPP pipe 43 * cannot process very large surface; 44 * - Combining multiple DPP from different SLS with blending; 45 * - Stereo formats from single DPP in top-bottom or side-by-side modes; 46 * - Stereo formats from 2 DPPs; 47 * - Alpha blending of multiple layers from different DPP pipes; 48 * - Programmable background color; 49 */ 50 51 #ifndef __DC_MPCC_H__ 52 #define __DC_MPCC_H__ 53 54 #include "dc_hw_types.h" 55 #include "hw_shared.h" 56 #include "transform.h" 57 58 #define MAX_MPCC 6 59 #define MAX_OPP 6 60 61 #define MAX_DWB 2 62 63 enum mpc_output_csc_mode { 64 MPC_OUTPUT_CSC_DISABLE = 0, 65 MPC_OUTPUT_CSC_COEF_A, 66 MPC_OUTPUT_CSC_COEF_B 67 }; 68 69 70 enum mpcc_blend_mode { 71 MPCC_BLEND_MODE_BYPASS, 72 MPCC_BLEND_MODE_TOP_LAYER_PASSTHROUGH, 73 MPCC_BLEND_MODE_TOP_LAYER_ONLY, 74 MPCC_BLEND_MODE_TOP_BOT_BLENDING 75 }; 76 77 /** 78 * enum mpcc_alpha_blend_mode - define the alpha blend mode regarding pixel 79 * alpha and plane alpha values 80 */ 81 enum mpcc_alpha_blend_mode { 82 /** 83 * @MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA: per pixel alpha using DPP 84 * alpha value 85 */ 86 MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA, 87 /** 88 * @MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN: per 89 * pixel alpha using DPP alpha value multiplied by a global gain (plane 90 * alpha) 91 */ 92 MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN, 93 /** 94 * @MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA: global alpha value, ignores 95 * pixel alpha and consider only plane alpha 96 */ 97 MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA 98 }; 99 100 enum mpcc_movable_cm_location { 101 MPCC_MOVABLE_CM_LOCATION_BEFORE, 102 MPCC_MOVABLE_CM_LOCATION_AFTER, 103 }; 104 105 enum MCM_LUT_XABLE { 106 MCM_LUT_DISABLE, 107 MCM_LUT_DISABLED = MCM_LUT_DISABLE, 108 MCM_LUT_ENABLE, 109 MCM_LUT_ENABLED = MCM_LUT_ENABLE, 110 }; 111 112 enum MCM_LUT_ID { 113 MCM_LUT_3DLUT, 114 MCM_LUT_1DLUT, 115 MCM_LUT_SHAPER 116 }; 117 118 union mcm_lut_params { 119 const struct pwl_params *pwl; 120 const struct tetrahedral_params *lut3d; 121 }; 122 123 /** 124 * struct mpcc_blnd_cfg - MPCC blending configuration 125 */ 126 struct mpcc_blnd_cfg { 127 /** 128 * @black_color: background color. 129 */ 130 struct tg_color black_color; 131 132 /** 133 * @alpha_mode: alpha blend mode (MPCC_ALPHA_BLND_MODE). 134 */ 135 enum mpcc_alpha_blend_mode alpha_mode; 136 137 /** 138 * @pre_multiplied_alpha: 139 * Whether pixel color values were pre-multiplied by the alpha channel 140 * (MPCC_ALPHA_MULTIPLIED_MODE). 141 */ 142 bool pre_multiplied_alpha; 143 144 /** 145 * @global_gain: Used when blend mode considers both pixel alpha and plane. 146 */ 147 int global_gain; 148 149 /** 150 * @global_alpha: Plane alpha value. 151 */ 152 int global_alpha; 153 154 /** 155 * @overlap_only: Whether overlapping of different planes is allowed. 156 */ 157 bool overlap_only; 158 159 /* MPCC top/bottom gain settings */ 160 161 /** 162 * @bottom_gain_mode: Blend mode for bottom gain setting. 163 */ 164 int bottom_gain_mode; 165 166 /** 167 * @background_color_bpc: Background color for bpc. 168 */ 169 int background_color_bpc; 170 171 /** 172 * @top_gain: Top gain setting. 173 */ 174 int top_gain; 175 176 /** 177 * @bottom_inside_gain: Blend mode for bottom inside. 178 */ 179 int bottom_inside_gain; 180 181 /** 182 * @bottom_outside_gain: Blend mode for bottom outside. 183 */ 184 int bottom_outside_gain; 185 }; 186 187 struct mpc_grph_gamut_adjustment { 188 struct fixed31_32 temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE]; 189 enum graphics_gamut_adjust_type gamut_adjust_type; 190 enum mpcc_gamut_remap_id mpcc_gamut_remap_block_id; 191 }; 192 193 struct mpc_rmcm_regs { 194 uint32_t rmcm_3dlut_mem_pwr_state; 195 uint32_t rmcm_3dlut_mem_pwr_force; 196 uint32_t rmcm_3dlut_mem_pwr_dis; 197 uint32_t rmcm_3dlut_mem_pwr_mode; 198 uint32_t rmcm_3dlut_size; 199 uint32_t rmcm_3dlut_mode; 200 uint32_t rmcm_3dlut_mode_cur; 201 uint32_t rmcm_3dlut_read_sel; 202 uint32_t rmcm_3dlut_30bit_en; 203 uint32_t rmcm_3dlut_wr_en_mask; 204 uint32_t rmcm_3dlut_ram_sel; 205 uint32_t rmcm_3dlut_out_norm_factor; 206 uint32_t rmcm_3dlut_fl_sel; 207 uint32_t rmcm_3dlut_out_offset_r; 208 uint32_t rmcm_3dlut_out_scale_r; 209 uint32_t rmcm_3dlut_fl_done; 210 uint32_t rmcm_3dlut_fl_soft_underflow; 211 uint32_t rmcm_3dlut_fl_hard_underflow; 212 uint32_t rmcm_cntl; 213 uint32_t rmcm_shaper_mem_pwr_state; 214 uint32_t rmcm_shaper_mem_pwr_force; 215 uint32_t rmcm_shaper_mem_pwr_dis; 216 uint32_t rmcm_shaper_mem_pwr_mode; 217 uint32_t rmcm_shaper_lut_mode; 218 uint32_t rmcm_shaper_mode_cur; 219 uint32_t rmcm_shaper_lut_write_en_mask; 220 uint32_t rmcm_shaper_lut_write_sel; 221 uint32_t rmcm_shaper_offset_b; 222 uint32_t rmcm_shaper_scale_b; 223 uint32_t rmcm_shaper_rama_exp_region_start_b; 224 uint32_t rmcm_shaper_rama_exp_region_start_seg_b; 225 uint32_t rmcm_shaper_rama_exp_region_end_b; 226 uint32_t rmcm_shaper_rama_exp_region_end_base_b; 227 }; 228 229 struct mpcc_sm_cfg { 230 bool enable; 231 /* 0-single plane,2-row subsampling,4-column subsampling,6-checkboard subsampling */ 232 int sm_mode; 233 /* 0- disable frame alternate, 1- enable frame alternate */ 234 bool frame_alt; 235 /* 0- disable field alternate, 1- enable field alternate */ 236 bool field_alt; 237 /* 0-no force,2-force frame polarity from top,3-force frame polarity from bottom */ 238 int force_next_frame_porlarity; 239 /* 0-no force,2-force field polarity from top,3-force field polarity from bottom */ 240 int force_next_field_polarity; 241 }; 242 243 struct mpc_denorm_clamp { 244 int clamp_max_r_cr; 245 int clamp_min_r_cr; 246 int clamp_max_g_y; 247 int clamp_min_g_y; 248 int clamp_max_b_cb; 249 int clamp_min_b_cb; 250 }; 251 252 struct mpc_dwb_flow_control { 253 int flow_ctrl_mode; 254 int flow_ctrl_cnt0; 255 int flow_ctrl_cnt1; 256 }; 257 258 /** 259 * struct mpcc - MPCC connection and blending configuration for a single MPCC instance. 260 * 261 * This struct is used as a node in an MPC tree. 262 */ 263 struct mpcc { 264 /** 265 * @mpcc_id: MPCC physical instance. 266 */ 267 int mpcc_id; 268 269 /** 270 * @dpp_id: DPP input to this MPCC 271 */ 272 int dpp_id; 273 274 /** 275 * @mpcc_bot: Pointer to bottom layer MPCC. NULL when not connected. 276 */ 277 struct mpcc *mpcc_bot; 278 279 /** 280 * @blnd_cfg: The blending configuration for this MPCC. 281 */ 282 struct mpcc_blnd_cfg blnd_cfg; 283 284 /** 285 * @sm_cfg: stereo mix setting for this MPCC 286 */ 287 struct mpcc_sm_cfg sm_cfg; 288 289 /** 290 * @shared_bottom: 291 * 292 * If MPCC output to both OPP and DWB endpoints, true. Otherwise, false. 293 */ 294 bool shared_bottom; 295 }; 296 297 /** 298 * struct mpc_tree - MPC tree represents all MPCC connections for a pipe. 299 * 300 * 301 */ 302 struct mpc_tree { 303 /** 304 * @opp_id: The OPP instance that owns this MPC tree. 305 */ 306 int opp_id; 307 308 /** 309 * @opp_list: the top MPCC layer of the MPC tree that outputs to OPP endpoint 310 */ 311 struct mpcc *opp_list; 312 }; 313 314 struct mpc { 315 const struct mpc_funcs *funcs; 316 struct dc_context *ctx; 317 318 struct mpcc mpcc_array[MAX_MPCC]; 319 struct pwl_params blender_params; 320 bool cm_bypass_mode; 321 }; 322 323 struct mpcc_state { 324 uint32_t opp_id; 325 uint32_t dpp_id; 326 uint32_t bot_mpcc_id; 327 uint32_t mode; 328 uint32_t alpha_mode; 329 uint32_t pre_multiplied_alpha; 330 uint32_t overlap_only; 331 uint32_t idle; 332 uint32_t busy; 333 uint32_t shaper_lut_mode; 334 uint32_t lut3d_mode; 335 uint32_t lut3d_bit_depth; 336 uint32_t lut3d_size; 337 uint32_t rgam_mode; 338 uint32_t rgam_lut; 339 struct mpc_grph_gamut_adjustment gamut_remap; 340 struct mpc_rmcm_regs rmcm_regs; 341 }; 342 343 /** 344 * struct mpc_funcs - funcs 345 */ 346 struct mpc_funcs { 347 /** 348 * @read_mpcc_state: 349 * 350 * Read register content from given MPCC physical instance. 351 * 352 * Parameters: 353 * 354 * - [in/out] mpc - MPC context 355 * - [in] mpcc_instance - MPC context instance 356 * - [in] mpcc_state - MPC context state 357 * 358 * Return: 359 * 360 * void 361 */ 362 void (*read_mpcc_state)( 363 struct mpc *mpc, 364 int mpcc_inst, 365 struct mpcc_state *s); 366 367 /** 368 * @insert_plane: 369 * 370 * Insert DPP into MPC tree based on specified blending position. 371 * Only used for planes that are part of blending chain for OPP output 372 * 373 * Parameters: 374 * 375 * - [in/out] mpc - MPC context. 376 * - [in/out] tree - MPC tree structure that plane will be added to. 377 * - [in] blnd_cfg - MPCC blending configuration for the new blending layer. 378 * - [in] sm_cfg - MPCC stereo mix configuration for the new blending layer. 379 * stereo mix must disable for the very bottom layer of the tree config. 380 * - [in] insert_above_mpcc - Insert new plane above this MPCC. 381 * If NULL, insert as bottom plane. 382 * - [in] dpp_id - DPP instance for the plane to be added. 383 * - [in] mpcc_id - The MPCC physical instance to use for blending. 384 * 385 * Return: 386 * 387 * struct mpcc* - MPCC that was added. 388 */ 389 struct mpcc* (*insert_plane)( 390 struct mpc *mpc, 391 struct mpc_tree *tree, 392 struct mpcc_blnd_cfg *blnd_cfg, 393 struct mpcc_sm_cfg *sm_cfg, 394 struct mpcc *insert_above_mpcc, 395 int dpp_id, 396 int mpcc_id); 397 398 /** 399 * @remove_mpcc: 400 * 401 * Remove a specified MPCC from the MPC tree. 402 * 403 * Parameters: 404 * 405 * - [in/out] mpc - MPC context. 406 * - [in/out] tree - MPC tree structure that plane will be removed from. 407 * - [in/out] mpcc - MPCC to be removed from tree. 408 * 409 * Return: 410 * 411 * void 412 */ 413 void (*remove_mpcc)( 414 struct mpc *mpc, 415 struct mpc_tree *tree, 416 struct mpcc *mpcc); 417 418 /** 419 * @mpc_init: 420 * 421 * Reset the MPCC HW status by disconnecting all muxes. 422 * 423 * Parameters: 424 * 425 * - [in/out] mpc - MPC context. 426 * 427 * Return: 428 * 429 * void 430 */ 431 void (*mpc_init)(struct mpc *mpc); 432 433 /** 434 * @mpc_init_single_inst: 435 * 436 * Initialize given MPCC physical instance. 437 * 438 * Parameters: 439 * - [in/out] mpc - MPC context. 440 * - [in] mpcc_id - The MPCC physical instance to be initialized. 441 */ 442 void (*mpc_init_single_inst)( 443 struct mpc *mpc, 444 unsigned int mpcc_id); 445 446 /** 447 * @update_blending: 448 * 449 * Update the blending configuration for a specified MPCC. 450 * 451 * Parameters: 452 * 453 * - [in/out] mpc - MPC context. 454 * - [in] blnd_cfg - MPCC blending configuration. 455 * - [in] mpcc_id - The MPCC physical instance. 456 * 457 * Return: 458 * 459 * void 460 */ 461 void (*update_blending)( 462 struct mpc *mpc, 463 struct mpcc_blnd_cfg *blnd_cfg, 464 int mpcc_id); 465 466 /** 467 * @cursor_lock: 468 * 469 * Lock cursor updates for the specified OPP. OPP defines the set of 470 * MPCC that are locked together for cursor. 471 * 472 * Parameters: 473 * 474 * - [in] mpc - MPC context. 475 * - [in] opp_id - The OPP to lock cursor updates on 476 * - [in] lock - lock/unlock the OPP 477 * 478 * Return: 479 * 480 * void 481 */ 482 void (*cursor_lock)( 483 struct mpc *mpc, 484 int opp_id, 485 bool lock); 486 487 /** 488 * @insert_plane_to_secondary: 489 * 490 * Add DPP into secondary MPC tree based on specified blending 491 * position. Only used for planes that are part of blending chain for 492 * DWB output 493 * 494 * Parameters: 495 * 496 * - [in/out] mpc - MPC context. 497 * - [in/out] tree - MPC tree structure that plane will be added to. 498 * - [in] blnd_cfg - MPCC blending configuration for the new blending layer. 499 * - [in] sm_cfg - MPCC stereo mix configuration for the new blending layer. 500 * stereo mix must disable for the very bottom layer of the tree config. 501 * - [in] insert_above_mpcc - Insert new plane above this MPCC. If 502 * NULL, insert as bottom plane. 503 * - [in] dpp_id - DPP instance for the plane to be added. 504 * - [in] mpcc_id - The MPCC physical instance to use for blending. 505 * 506 * Return: 507 * 508 * struct mpcc* - MPCC that was added. 509 */ 510 struct mpcc* (*insert_plane_to_secondary)( 511 struct mpc *mpc, 512 struct mpc_tree *tree, 513 struct mpcc_blnd_cfg *blnd_cfg, 514 struct mpcc_sm_cfg *sm_cfg, 515 struct mpcc *insert_above_mpcc, 516 int dpp_id, 517 int mpcc_id); 518 519 /** 520 * @remove_mpcc_from_secondary: 521 * 522 * Remove a specified DPP from the 'secondary' MPC tree. 523 * 524 * Parameters: 525 * 526 * - [in/out] mpc - MPC context. 527 * - [in/out] tree - MPC tree structure that plane will be removed from. 528 * - [in] mpcc - MPCC to be removed from tree. 529 * 530 * Return: 531 * 532 * void 533 */ 534 void (*remove_mpcc_from_secondary)( 535 struct mpc *mpc, 536 struct mpc_tree *tree, 537 struct mpcc *mpcc); 538 539 /** 540 * @get_mpcc_for_dpp_from_secondary: 541 * 542 * Find, if it exists, a MPCC from a given 'secondary' MPC tree that 543 * is associated with specified plane. 544 * 545 * Parameters: 546 * - [in/out] tree - MPC tree structure to search for plane. 547 * - [in] dpp_id - DPP to be searched. 548 * 549 * Return: 550 * 551 * struct mpcc* - pointer to plane or NULL if no plane found. 552 */ 553 struct mpcc* (*get_mpcc_for_dpp_from_secondary)( 554 struct mpc_tree *tree, 555 int dpp_id); 556 557 /** 558 * @get_mpcc_for_dpp: 559 * 560 * Find, if it exists, a MPCC from a given MPC tree that 561 * is associated with specified plane. 562 * 563 * Parameters: 564 * - [in/out] tree - MPC tree structure to search for plane. 565 * - [in] dpp_id - DPP to be searched. 566 * 567 * Return: 568 * 569 * struct mpcc* - pointer to plane or NULL if no plane found. 570 */ 571 struct mpcc* (*get_mpcc_for_dpp)( 572 struct mpc_tree *tree, 573 int dpp_id); 574 575 /** 576 * @wait_for_idle: 577 * 578 * Wait for a MPCC in MPC context to enter idle state. 579 * 580 * Parameters: 581 * - [in/out] mpc - MPC Context. 582 * - [in] id - MPCC to wait for idle state. 583 * 584 * Return: 585 * 586 * void 587 */ 588 void (*wait_for_idle)(struct mpc *mpc, int id); 589 590 /** 591 * @assert_mpcc_idle_before_connect: 592 * 593 * Assert if MPCC in MPC context is in idle state. 594 * 595 * Parameters: 596 * - [in/out] mpc - MPC context. 597 * - [in] id - MPCC to assert idle state. 598 * 599 * Return: 600 * 601 * void 602 */ 603 void (*assert_mpcc_idle_before_connect)(struct mpc *mpc, int mpcc_id); 604 605 /** 606 * @init_mpcc_list_from_hw: 607 * 608 * Iterate through the MPCC array from a given MPC context struct 609 * and configure each MPCC according to its registers' values. 610 * 611 * Parameters: 612 * - [in/out] mpc - MPC context to initialize MPCC array. 613 * - [in/out] tree - MPC tree structure containing MPCC contexts to initialize. 614 * 615 * Return: 616 * 617 * void 618 */ 619 void (*init_mpcc_list_from_hw)( 620 struct mpc *mpc, 621 struct mpc_tree *tree); 622 623 /** 624 * @set_denorm: 625 * 626 * Set corresponding OPP DENORM_CONTROL register value to specific denorm_mode 627 * based on given color depth. 628 * 629 * Parameters: 630 * - [in/out] mpc - MPC context. 631 * - [in] opp_id - Corresponding OPP to update register. 632 * - [in] output_depth - Arbitrary color depth to set denorm_mode. 633 * 634 * Return: 635 * 636 * void 637 */ 638 void (*set_denorm)(struct mpc *mpc, 639 int opp_id, 640 enum dc_color_depth output_depth); 641 642 /** 643 * @set_denorm_clamp: 644 * 645 * Set denorm clamp values on corresponding OPP DENORM CONTROL register. 646 * 647 * Parameters: 648 * - [in/out] mpc - MPC context. 649 * - [in] opp_id - Corresponding OPP to update register. 650 * - [in] denorm_clamp - Arbitrary denorm clamp to be set. 651 * 652 * Return: 653 * 654 * void 655 */ 656 void (*set_denorm_clamp)( 657 struct mpc *mpc, 658 int opp_id, 659 struct mpc_denorm_clamp denorm_clamp); 660 661 /** 662 * @set_output_csc: 663 * 664 * Set the Output Color Space Conversion matrix 665 * with given values and mode. 666 * 667 * Parameters: 668 * - [in/out] mpc - MPC context. 669 * - [in] opp_id - Corresponding OPP to update register. 670 * - [in] regval - Values to set in CSC matrix. 671 * - [in] ocsc_mode - Mode to set CSC. 672 * 673 * Return: 674 * 675 * void 676 */ 677 void (*set_output_csc)(struct mpc *mpc, 678 int opp_id, 679 const uint16_t *regval, 680 enum mpc_output_csc_mode ocsc_mode); 681 682 /** 683 * @set_ocsc_default: 684 * 685 * Set the Output Color Space Conversion matrix 686 * to default values according to color space. 687 * 688 * Parameters: 689 * - [in/out] mpc - MPC context. 690 * - [in] opp_id - Corresponding OPP to update register. 691 * - [in] color_space - OCSC color space. 692 * - [in] ocsc_mode - Mode to set CSC. 693 * 694 * Return: 695 * 696 * void 697 * 698 */ 699 void (*set_ocsc_default)(struct mpc *mpc, 700 int opp_id, 701 enum dc_color_space color_space, 702 enum mpc_output_csc_mode ocsc_mode); 703 704 /** 705 * @set_output_gamma: 706 * 707 * Set Output Gamma with given curve parameters. 708 * 709 * Parameters: 710 * - [in/out] mpc - MPC context. 711 * - [in] mpcc_id - Corresponding MPC to update registers. 712 * - [in] params - Parameters. 713 * 714 * Return: 715 * 716 * void 717 * 718 */ 719 void (*set_output_gamma)( 720 struct mpc *mpc, 721 int mpcc_id, 722 const struct pwl_params *params); 723 /** 724 * @power_on_mpc_mem_pwr: 725 * 726 * Power on/off memory LUT for given MPCC. 727 * Powering on enables LUT to be updated. 728 * Powering off allows entering low power mode. 729 * 730 * Parameters: 731 * - [in/out] mpc - MPC context. 732 * - [in] mpcc_id - MPCC to power on. 733 * - [in] power_on 734 * 735 * Return: 736 * 737 * void 738 */ 739 void (*power_on_mpc_mem_pwr)( 740 struct mpc *mpc, 741 int mpcc_id, 742 bool power_on); 743 /** 744 * @set_dwb_mux: 745 * 746 * Set corresponding Display Writeback mux 747 * MPC register field to given MPCC id. 748 * 749 * Parameters: 750 * - [in/out] mpc - MPC context. 751 * - [in] dwb_id - DWB to be set. 752 * - [in] mpcc_id - MPCC id to be stored in DWB mux register. 753 * 754 * Return: 755 * 756 * void 757 */ 758 void (*set_dwb_mux)( 759 struct mpc *mpc, 760 int dwb_id, 761 int mpcc_id); 762 763 /** 764 * @disable_dwb_mux: 765 * 766 * Reset corresponding Display Writeback mux 767 * MPC register field. 768 * 769 * Parameters: 770 * - [in/out] mpc - MPC context. 771 * - [in] dwb_id - DWB to be set. 772 * 773 * Return: 774 * 775 * void 776 */ 777 void (*disable_dwb_mux)( 778 struct mpc *mpc, 779 int dwb_id); 780 781 /** 782 * @is_dwb_idle: 783 * 784 * Check DWB status on MPC_DWB0_MUX_STATUS register field. 785 * Return if it is null. 786 * 787 * Parameters: 788 * - [in/out] mpc - MPC context. 789 * - [in] dwb_id - DWB to be checked. 790 * 791 * Return: 792 * 793 * bool - wheter DWB is idle or not 794 */ 795 bool (*is_dwb_idle)( 796 struct mpc *mpc, 797 int dwb_id); 798 799 /** 800 * @set_out_rate_control: 801 * 802 * Set display output rate control. 803 * 804 * Parameters: 805 * - [in/out] mpc - MPC context. 806 * - [in] opp_id - OPP to be set. 807 * - [in] enable 808 * - [in] rate_2x_mode 809 * - [in] flow_control 810 * 811 * Return: 812 * 813 * void 814 */ 815 void (*set_out_rate_control)( 816 struct mpc *mpc, 817 int opp_id, 818 bool enable, 819 bool rate_2x_mode, 820 struct mpc_dwb_flow_control *flow_control); 821 822 /** 823 * @set_gamut_remap: 824 * 825 * Set post-blending CTM for given MPCC. 826 * 827 * Parameters: 828 * - [in] mpc - MPC context. 829 * - [in] mpcc_id - MPCC to set gamut map. 830 * - [in] adjust 831 * 832 * Return: 833 * 834 * void 835 */ 836 void (*set_gamut_remap)( 837 struct mpc *mpc, 838 int mpcc_id, 839 const struct mpc_grph_gamut_adjustment *adjust); 840 841 /** 842 * @program_1dlut: 843 * 844 * Set 1 dimensional Lookup Table. 845 * 846 * Parameters: 847 * - [in/out] mpc - MPC context 848 * - [in] params - curve parameters for the LUT configuration 849 * - [in] rmu_idx 850 * 851 * bool - wheter LUT was set (set with given parameters) or not (params is NULL and LUT is disabled). 852 */ 853 bool (*program_1dlut)( 854 struct mpc *mpc, 855 const struct pwl_params *params, 856 uint32_t rmu_idx); 857 858 /** 859 * @program_shaper: 860 * 861 * Set shaper. 862 * 863 * Parameters: 864 * - [in/out] mpc - MPC context 865 * - [in] params - curve parameters to be set 866 * - [in] rmu_idx 867 * 868 * Return: 869 * 870 * bool - wheter shaper was set (set with given parameters) or not (params is NULL and LUT is disabled). 871 */ 872 bool (*program_shaper)( 873 struct mpc *mpc, 874 const struct pwl_params *params, 875 uint32_t rmu_idx); 876 877 /** 878 * @acquire_rmu: 879 * 880 * Set given MPCC to be multiplexed to given RMU unit. 881 * 882 * Parameters: 883 * - [in/out] mpc - MPC context 884 * - [in] mpcc_id - MPCC 885 * - [in] rmu_idx - Given RMU unit to set MPCC to be multiplexed to. 886 * 887 * Return: 888 * 889 * unit32_t - rmu_idx if operation was successful, -1 else. 890 */ 891 uint32_t (*acquire_rmu)(struct mpc *mpc, int mpcc_id, int rmu_idx); 892 893 /** 894 * @program_3dlut: 895 * 896 * Set 3 dimensional Lookup Table. 897 * 898 * Parameters: 899 * - [in/out] mpc - MPC context 900 * - [in] params - tetrahedral parameters for the LUT configuration 901 * - [in] rmu_idx 902 * 903 * bool - wheter LUT was set (set with given parameters) or not (params is NULL and LUT is disabled). 904 */ 905 bool (*program_3dlut)( 906 struct mpc *mpc, 907 const struct tetrahedral_params *params, 908 int rmu_idx); 909 910 /** 911 * @release_rmu: 912 * 913 * For a given MPCC, release the RMU unit it muliplexes to. 914 * 915 * Parameters: 916 * - [in/out] mpc - MPC context 917 * - [in] mpcc_id - MPCC 918 * 919 * Return: 920 * 921 * int - a valid rmu_idx representing released RMU unit or -1 if there was no RMU unit to release. 922 */ 923 int (*release_rmu)(struct mpc *mpc, int mpcc_id); 924 925 /** 926 * @get_mpc_out_mux: 927 * 928 * Return MPC out mux. 929 * 930 * Parameters: 931 * - [in] mpc - MPC context. 932 * - [in] opp_id - OPP 933 * 934 * Return: 935 * 936 * unsigned int - Out Mux 937 */ 938 unsigned int (*get_mpc_out_mux)( 939 struct mpc *mpc, 940 int opp_id); 941 942 /** 943 * @set_bg_color: 944 * 945 * Find corresponding bottommost MPCC and 946 * set its bg color. 947 * 948 * Parameters: 949 * - [in/out] mpc - MPC context. 950 * - [in] bg_color - background color to be set. 951 * - [in] mpcc_id 952 * 953 * Return: 954 * 955 * void 956 */ 957 void (*set_bg_color)(struct mpc *mpc, 958 struct tg_color *bg_color, 959 int mpcc_id); 960 961 /** 962 * @set_mpc_mem_lp_mode: 963 * 964 * Set mpc_mem_lp_mode. 965 * 966 * Parameters: 967 * - [in/out] mpc - MPC context. 968 * 969 * Return: 970 * 971 * void 972 */ 973 974 void (*set_mpc_mem_lp_mode)(struct mpc *mpc); 975 /** 976 * @set_movable_cm_location: 977 * 978 * Set Movable CM Location. 979 * 980 * Parameters: 981 * - [in/out] mpc - MPC context. 982 * - [in] location 983 * - [in] mpcc_id 984 * 985 * Return: 986 * 987 * void 988 */ 989 990 void (*set_movable_cm_location)(struct mpc *mpc, enum mpcc_movable_cm_location location, int mpcc_id); 991 /** 992 * @update_3dlut_fast_load_select: 993 * 994 * Update 3D LUT fast load select. 995 * 996 * Parameters: 997 * - [in/out] mpc - MPC context. 998 * - [in] mpcc_id 999 * - [in] hubp_idx 1000 * 1001 * Return: 1002 * 1003 * void 1004 */ 1005 1006 void (*update_3dlut_fast_load_select)(struct mpc *mpc, int mpcc_id, int hubp_idx); 1007 1008 /** 1009 * @populate_lut: 1010 * 1011 * Populate LUT with given tetrahedral parameters. 1012 * 1013 * Parameters: 1014 * - [in/out] mpc - MPC context. 1015 * - [in] id 1016 * - [in] params 1017 * - [in] lut_bank_a 1018 * - [in] mpcc_id 1019 * 1020 * Return: 1021 * 1022 * void 1023 */ 1024 void (*populate_lut)(struct mpc *mpc, const enum MCM_LUT_ID id, const union mcm_lut_params params, 1025 bool lut_bank_a, int mpcc_id); 1026 1027 /** 1028 * @program_lut_read_write_control: 1029 * 1030 * Program LUT RW control. 1031 * 1032 * Parameters: 1033 * - [in/out] mpc - MPC context. 1034 * - [in] id 1035 * - [in] lut_bank_a 1036 * - [in] mpcc_id 1037 * 1038 * Return: 1039 * 1040 * void 1041 */ 1042 void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id, bool lut_bank_a, int mpcc_id); 1043 1044 /** 1045 * @program_lut_mode: 1046 * 1047 * Program LUT mode. 1048 * 1049 * Parameters: 1050 * - [in/out] mpc - MPC context. 1051 * - [in] id 1052 * - [in] xable 1053 * - [in] lut_bank_a 1054 * - [in] mpcc_id 1055 * 1056 * Return: 1057 * 1058 * void 1059 */ 1060 void (*program_lut_mode)(struct mpc *mpc, const enum MCM_LUT_ID id, const enum MCM_LUT_XABLE xable, 1061 bool lut_bank_a, int mpcc_id); 1062 /** 1063 * @program_3dlut_size: 1064 * 1065 * Program 3D LUT size. 1066 * 1067 * Parameters: 1068 * - [in/out] mpc - MPC context. 1069 * - [in] is_17x17x17 - is 3dlut 17x17x17 1070 * - [in] mpcc_id 1071 * 1072 * Return: 1073 * 1074 * void 1075 */ 1076 void (*program_3dlut_size)(struct mpc *mpc, bool is_17x17x17, int mpcc_id); 1077 1078 /** 1079 * @mcm: 1080 * 1081 * MPC MCM new HW sequential programming functions 1082 */ 1083 struct { 1084 void (*program_3dlut_size)(struct mpc *mpc, uint32_t width, int mpcc_id); 1085 void (*program_bias_scale)(struct mpc *mpc, uint16_t bias, uint16_t scale, int mpcc_id); 1086 void (*program_bit_depth)(struct mpc *mpc, uint16_t bit_depth, int mpcc_id); 1087 bool (*is_config_supported)(uint32_t width); 1088 void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id, 1089 bool lut_bank_a, bool enabled, int mpcc_id); 1090 1091 void (*populate_lut)(struct mpc *mpc, const union mcm_lut_params params, 1092 bool lut_bank_a, int mpcc_id); 1093 } mcm; 1094 1095 /** 1096 * @rmcm: 1097 * 1098 * MPC RMCM new HW sequential programming functions 1099 */ 1100 struct { 1101 void (*enable_3dlut_fl)(struct mpc *mpc, bool enable, int mpcc_id); 1102 void (*update_3dlut_fast_load_select)(struct mpc *mpc, int mpcc_id, int hubp_idx); 1103 void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id, 1104 bool lut_bank_a, bool enabled, int mpcc_id); 1105 void (*program_lut_mode)(struct mpc *mpc, const enum MCM_LUT_XABLE xable, 1106 bool lut_bank_a, int mpcc_id); 1107 void (*program_3dlut_size)(struct mpc *mpc, uint32_t width, int mpcc_id); 1108 void (*program_bias_scale)(struct mpc *mpc, uint16_t bias, uint16_t scale, int mpcc_id); 1109 void (*program_bit_depth)(struct mpc *mpc, uint16_t bit_depth, int mpcc_id); 1110 bool (*is_config_supported)(uint32_t width); 1111 1112 void (*power_on_shaper_3dlut)(struct mpc *mpc, uint32_t mpcc_id, bool power_on); 1113 void (*populate_lut)(struct mpc *mpc, const union mcm_lut_params params, 1114 bool lut_bank_a, int mpcc_id); 1115 } rmcm; 1116 }; 1117 1118 #endif 1119