1 /* 2 * Copyright 2021 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 #ifndef __SMU_13_0_6_PPT_H__ 24 #define __SMU_13_0_6_PPT_H__ 25 26 #define SMU_13_0_6_UMD_PSTATE_GFXCLK_LEVEL 0x2 27 #define SMU_13_0_6_UMD_PSTATE_SOCCLK_LEVEL 0x4 28 #define SMU_13_0_6_UMD_PSTATE_MCLK_LEVEL 0x2 29 #define SMU_CAP(x) SMU_13_0_6_CAPS_##x 30 31 typedef enum { 32 /*0*/ METRICS_VERSION_V0 = 0, 33 /*1*/ METRICS_VERSION_V1 = 1, 34 /*2*/ METRICS_VERSION_V2 = 2, 35 36 /*3*/ NUM_METRICS = 3 37 } METRICS_LIST_e; 38 39 struct PPTable_t { 40 uint32_t MaxSocketPowerLimit; 41 uint32_t MaxGfxclkFrequency; 42 uint32_t MinGfxclkFrequency; 43 uint32_t FclkFrequencyTable[4]; 44 uint32_t UclkFrequencyTable[4]; 45 uint32_t SocclkFrequencyTable[4]; 46 uint32_t VclkFrequencyTable[4]; 47 uint32_t DclkFrequencyTable[4]; 48 uint32_t LclkFrequencyTable[4]; 49 uint32_t MaxLclkDpmRange; 50 uint32_t MinLclkDpmRange; 51 uint64_t PublicSerialNumber_AID; 52 bool Init; 53 }; 54 55 enum smu_v13_0_6_caps { 56 SMU_CAP(DPM), 57 SMU_CAP(DPM_POLICY), 58 SMU_CAP(OTHER_END_METRICS), 59 SMU_CAP(SET_UCLK_MAX), 60 SMU_CAP(PCIE_METRICS), 61 SMU_CAP(MCA_DEBUG_MODE), 62 SMU_CAP(PER_INST_METRICS), 63 SMU_CAP(CTF_LIMIT), 64 SMU_CAP(RMA_MSG), 65 SMU_CAP(ACA_SYND), 66 SMU_CAP(SDMA_RESET), 67 SMU_CAP(STATIC_METRICS), 68 SMU_CAP(HST_LIMIT_METRICS), 69 SMU_CAP(BOARD_VOLTAGE), 70 SMU_CAP(PLDM_VERSION), 71 SMU_CAP(ALL), 72 }; 73 74 extern void smu_v13_0_6_set_ppt_funcs(struct smu_context *smu); 75 bool smu_v13_0_6_cap_supported(struct smu_context *smu, enum smu_v13_0_6_caps cap); 76 int smu_v13_0_6_get_static_metrics_table(struct smu_context *smu); 77 int smu_v13_0_6_get_metrics_table(struct smu_context *smu, void *metrics_table, 78 bool bypass_cache); 79 80 bool smu_v13_0_12_is_dpm_running(struct smu_context *smu); 81 int smu_v13_0_12_get_max_metrics_size(void); 82 int smu_v13_0_12_setup_driver_pptable(struct smu_context *smu); 83 int smu_v13_0_12_get_smu_metrics_data(struct smu_context *smu, 84 MetricsMember_t member, uint32_t *value); 85 ssize_t smu_v13_0_12_get_gpu_metrics(struct smu_context *smu, void **table, void *smu_metrics); 86 ssize_t smu_v13_0_12_get_xcp_metrics(struct smu_context *smu, 87 struct amdgpu_xcp *xcp, void *table, 88 void *smu_metrics); 89 extern const struct cmn2asic_mapping smu_v13_0_12_feature_mask_map[]; 90 extern const struct cmn2asic_msg_mapping smu_v13_0_12_message_map[]; 91 #endif 92