Searched defs:MDMA_D0_IRQ_STATUS (Results 1 – 7 of 7) sorted by relevance
337 #define MDMA_D0_IRQ_STATUS 0xFFC00E28 /* MemDMA Stream 0 Destination Interrupt/Status Register */ macro
398 #define MDMA_D0_IRQ_STATUS 0xFFC00F28 /* MemDMA Stream 0 Destination Interrupt/Status Register */ macro
719 #define MDMA_D0_IRQ_STATUS 0xFFC00F28 /*MemDMA2 Stream 0 Dest Interrupt/Status Register */ macro
374 #define MDMA_D0_IRQ_STATUS 0xFFC00F28 /* MemDMA Stream 0 Destination Interrupt/Status Register … macro
319 #define MDMA_D0_IRQ_STATUS 0xFFC00E28 /* MemDMA0 Stream 0 Destination Interrupt/Status Register */ macro
408 #define MDMA_D0_IRQ_STATUS 0xffc00f28 /* Memory DMA Stream 0 Destination Interrupt… macro