1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3 * Copyright (C) 2008-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
7 #ifndef __iwl_fw_file_h__
8 #define __iwl_fw_file_h__
9
10 #include <linux/netdevice.h>
11 #include <linux/nl80211.h>
12
13 /* v1/v2 uCode file layout */
14 struct iwl_ucode_header {
15 __le32 ver; /* major/minor/API/serial */
16 union {
17 struct {
18 __le32 inst_size; /* bytes of runtime code */
19 __le32 data_size; /* bytes of runtime data */
20 __le32 init_size; /* bytes of init code */
21 __le32 init_data_size; /* bytes of init data */
22 __le32 boot_size; /* bytes of bootstrap code */
23 u8 data[]; /* in same order as sizes */
24 } v1;
25 struct {
26 __le32 build; /* build number */
27 __le32 inst_size; /* bytes of runtime code */
28 __le32 data_size; /* bytes of runtime data */
29 __le32 init_size; /* bytes of init code */
30 __le32 init_data_size; /* bytes of init data */
31 __le32 boot_size; /* bytes of bootstrap code */
32 u8 data[]; /* in same order as sizes */
33 } v2;
34 } u;
35 };
36
37 #define IWL_UCODE_TLV_DEBUG_BASE 0x1000005
38 #define IWL_UCODE_TLV_CONST_BASE 0x100
39
40 /*
41 * new TLV uCode file layout
42 *
43 * The new TLV file format contains TLVs, that each specify
44 * some piece of data.
45 */
46
47 enum iwl_ucode_tlv_type {
48 IWL_UCODE_TLV_INVALID = 0, /* unused */
49 IWL_UCODE_TLV_INST = 1,
50 IWL_UCODE_TLV_DATA = 2,
51 IWL_UCODE_TLV_INIT = 3,
52 IWL_UCODE_TLV_INIT_DATA = 4,
53 IWL_UCODE_TLV_BOOT = 5,
54 IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */
55 IWL_UCODE_TLV_PAN = 7, /* deprecated -- only used in DVM */
56 IWL_UCODE_TLV_MEM_DESC = 7, /* replaces PAN in non-DVM */
57 IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8,
58 IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9,
59 IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10,
60 IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11,
61 IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12,
62 IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13,
63 IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14,
64 IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
65 IWL_UCODE_TLV_WOWLAN_INST = 16,
66 IWL_UCODE_TLV_WOWLAN_DATA = 17,
67 IWL_UCODE_TLV_FLAGS = 18,
68 IWL_UCODE_TLV_SEC_RT = 19,
69 IWL_UCODE_TLV_SEC_INIT = 20,
70 IWL_UCODE_TLV_SEC_WOWLAN = 21,
71 IWL_UCODE_TLV_DEF_CALIB = 22,
72 IWL_UCODE_TLV_PHY_SKU = 23,
73 IWL_UCODE_TLV_SECURE_SEC_RT = 24,
74 IWL_UCODE_TLV_SECURE_SEC_INIT = 25,
75 IWL_UCODE_TLV_SECURE_SEC_WOWLAN = 26,
76 IWL_UCODE_TLV_NUM_OF_CPU = 27,
77 IWL_UCODE_TLV_CSCHEME = 28,
78 IWL_UCODE_TLV_API_CHANGES_SET = 29,
79 IWL_UCODE_TLV_ENABLED_CAPABILITIES = 30,
80 IWL_UCODE_TLV_N_SCAN_CHANNELS = 31,
81 IWL_UCODE_TLV_PAGING = 32,
82 IWL_UCODE_TLV_SEC_RT_USNIFFER = 34,
83 /* 35 is unused */
84 IWL_UCODE_TLV_FW_VERSION = 36,
85 IWL_UCODE_TLV_FW_DBG_DEST = 38,
86 IWL_UCODE_TLV_FW_DBG_CONF = 39,
87 IWL_UCODE_TLV_FW_DBG_TRIGGER = 40,
88 IWL_UCODE_TLV_CMD_VERSIONS = 48,
89 IWL_UCODE_TLV_FW_GSCAN_CAPA = 50,
90 IWL_UCODE_TLV_FW_MEM_SEG = 51,
91 IWL_UCODE_TLV_IML = 52,
92 IWL_UCODE_TLV_UMAC_DEBUG_ADDRS = 54,
93 IWL_UCODE_TLV_LMAC_DEBUG_ADDRS = 55,
94 IWL_UCODE_TLV_FW_RECOVERY_INFO = 57,
95 IWL_UCODE_TLV_HW_TYPE = 58,
96 IWL_UCODE_TLV_FW_FSEQ_VERSION = 60,
97 IWL_UCODE_TLV_PHY_INTEGRATION_VERSION = 61,
98
99 IWL_UCODE_TLV_PNVM_VERSION = 62,
100 IWL_UCODE_TLV_PNVM_SKU = 64,
101
102 IWL_UCODE_TLV_SEC_TABLE_ADDR = 66,
103 IWL_UCODE_TLV_D3_KEK_KCK_ADDR = 67,
104 IWL_UCODE_TLV_CURRENT_PC = 68,
105 IWL_UCODE_TLV_FSEQ_BIN_VERSION = 72,
106
107 /* contains sub-sections like PNVM file does (did) */
108 IWL_UCODE_TLV_PNVM_DATA = 74,
109
110 IWL_UCODE_TLV_FW_NUM_STATIONS = IWL_UCODE_TLV_CONST_BASE + 0,
111 IWL_UCODE_TLV_FW_NUM_LINKS = IWL_UCODE_TLV_CONST_BASE + 1,
112 IWL_UCODE_TLV_FW_NUM_BEACONS = IWL_UCODE_TLV_CONST_BASE + 2,
113
114 IWL_UCODE_TLV_TYPE_DEBUG_INFO = IWL_UCODE_TLV_DEBUG_BASE + 0,
115 IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION = IWL_UCODE_TLV_DEBUG_BASE + 1,
116 IWL_UCODE_TLV_TYPE_HCMD = IWL_UCODE_TLV_DEBUG_BASE + 2,
117 IWL_UCODE_TLV_TYPE_REGIONS = IWL_UCODE_TLV_DEBUG_BASE + 3,
118 IWL_UCODE_TLV_TYPE_TRIGGERS = IWL_UCODE_TLV_DEBUG_BASE + 4,
119 IWL_UCODE_TLV_TYPE_CONF_SET = IWL_UCODE_TLV_DEBUG_BASE + 5,
120 IWL_UCODE_TLV_DEBUG_MAX = IWL_UCODE_TLV_TYPE_TRIGGERS,
121
122 /* TLVs 0x1000-0x2000 are for internal driver usage */
123 IWL_UCODE_TLV_FW_DBG_DUMP_LST = 0x1000,
124 };
125
126 struct iwl_ucode_tlv {
127 __le32 type; /* see above */
128 __le32 length; /* not including type/length fields */
129 u8 data[];
130 };
131
132 #define IWL_TLV_UCODE_MAGIC 0x0a4c5749
133 #define FW_VER_HUMAN_READABLE_SZ 64
134
135 struct iwl_tlv_ucode_header {
136 /*
137 * The TLV style ucode header is distinguished from
138 * the v1/v2 style header by first four bytes being
139 * zero, as such is an invalid combination of
140 * major/minor/API/serial versions.
141 */
142 __le32 zero;
143 __le32 magic;
144 u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
145 /* major/minor/API/serial or major in new format */
146 __le32 ver;
147 __le32 build;
148 __le64 ignore;
149 /*
150 * The data contained herein has a TLV layout,
151 * see above for the TLV header and types.
152 * Note that each TLV is padded to a length
153 * that is a multiple of 4 for alignment.
154 */
155 u8 data[];
156 };
157
158 /*
159 * ucode TLVs
160 *
161 * ability to get extension for: flags & capabilities from ucode binaries files
162 */
163 struct iwl_ucode_api {
164 __le32 api_index;
165 __le32 api_flags;
166 } __packed;
167
168 struct iwl_ucode_capa {
169 __le32 api_index;
170 __le32 api_capa;
171 } __packed;
172
173 /**
174 * enum iwl_ucode_tlv_flag - ucode API flags
175 * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously
176 * was a separate TLV but moved here to save space.
177 * @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behavior on hidden SSID,
178 * treats good CRC threshold as a boolean
179 * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w).
180 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: This uCode image supports uAPSD
181 * @IWL_UCODE_TLV_FLAGS_SHORT_BL: 16 entries of block list instead of 64 in scan
182 * offload profile config command.
183 * @IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS: D3 image supports up to six
184 * (rather than two) IPv6 addresses
185 * @IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID: not sending a probe with the SSID element
186 * from the probe request template.
187 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL: new NS offload (small version)
188 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version)
189 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD
190 * @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save
191 * @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS.
192 */
193 enum iwl_ucode_tlv_flag {
194 IWL_UCODE_TLV_FLAGS_PAN = BIT(0),
195 IWL_UCODE_TLV_FLAGS_NEWSCAN = BIT(1),
196 IWL_UCODE_TLV_FLAGS_MFP = BIT(2),
197 IWL_UCODE_TLV_FLAGS_SHORT_BL = BIT(7),
198 IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS = BIT(10),
199 IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID = BIT(12),
200 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL = BIT(15),
201 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE = BIT(16),
202 IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT = BIT(24),
203 IWL_UCODE_TLV_FLAGS_EBS_SUPPORT = BIT(25),
204 IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD = BIT(26),
205 };
206
207 typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
208
209 /**
210 * enum iwl_ucode_tlv_api - ucode api
211 * @IWL_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time
212 * longer than the passive one, which is essential for fragmented scan.
213 * @IWL_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source.
214 * @IWL_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params
215 * @IWL_UCODE_TLV_API_NEW_VERSION: new versioning format
216 * @IWL_UCODE_TLV_API_SCAN_TSF_REPORT: Scan start time reported in scan
217 * iteration complete notification, and the timestamp reported for RX
218 * received during scan, are reported in TSF of the mac specified in the
219 * scan request.
220 * @IWL_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of
221 * ADD_MODIFY_STA_KEY_API_S_VER_2.
222 * @IWL_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement.
223 * @IWL_UCODE_TLV_API_NAN2_VER2: This ucode supports NAN API version 2
224 * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL: support for adaptive dwell in scanning
225 * @IWL_UCODE_TLV_API_OCE: support for OCE
226 * @IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE: new beacon template
227 * @IWL_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used
228 * @IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL: WoWLAN key material support
229 * @IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY: Quota command includes a field
230 * indicating low latency direction.
231 * @IWL_UCODE_TLV_API_DEPRECATE_TTAK: RX status flag TTAK ok (bit 7) is
232 * deprecated.
233 * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2: This ucode supports version 8
234 * of scan request: SCAN_REQUEST_CMD_UMAC_API_S_VER_8
235 * @IWL_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS
236 * @IWL_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of
237 * the REDUCE_TX_POWER_CMD.
238 * @IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF: This ucode supports the short
239 * version of the beacon notification.
240 * @IWL_UCODE_TLV_API_BEACON_FILTER_V4: This ucode supports v4 of
241 * BEACON_FILTER_CONFIG_API_S_VER_4.
242 * @IWL_UCODE_TLV_API_REGULATORY_NVM_INFO: This ucode supports v4 of
243 * REGULATORY_NVM_GET_INFO_RSP_API_S.
244 * @IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ: This ucode supports v7 of
245 * LOCATION_RANGE_REQ_CMD_API_S and v6 of LOCATION_RANGE_RESP_NTFY_API_S.
246 * @IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS: This ucode supports v2 of
247 * SCAN_OFFLOAD_PROFILE_MATCH_RESULTS_S and v3 of
248 * SCAN_OFFLOAD_PROFILES_QUERY_RSP_S.
249 * @IWL_UCODE_TLV_API_MBSSID_HE: This ucode supports v2 of
250 * STA_CONTEXT_DOT11AX_API_S
251 * @IWL_UCODE_TLV_API_WOWLAN_TCP_SYN_WAKE: WoWLAN TCP-SYN wake support
252 * @IWL_UCODE_TLV_API_FTM_RTT_ACCURACY: version 7 of the range response API
253 * is supported by FW, this indicates the RTT confidence value
254 * @IWL_UCODE_TLV_API_SAR_TABLE_VER: This ucode supports different sar
255 * version tables.
256 * @IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG: This ucode supports v3 of
257 * SCAN_CONFIG_DB_CMD_API_S.
258 * @IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP: support for setting adaptive dwell
259 * number of APs in the 5 GHz band
260 * @IWL_UCODE_TLV_API_SCAN_EXT_CHAN_VER: extended channel config in scan
261 * @IWL_UCODE_TLV_API_BAND_IN_RX_DATA: FW reports band number in RX notification
262 * @IWL_UCODE_TLV_API_NO_HOST_DISABLE_TX: Firmware offloaded the station disable tx
263 * logic.
264 * @IWL_UCODE_TLV_API_INT_DBG_BUF_CLEAR: Firmware supports clearing the debug
265 * internal buffer
266 * @IWL_UCODE_TLV_API_SMART_FIFO_OFFLOAD: Firmware doesn't need the host to
267 * configure the smart fifo
268 *
269 * @NUM_IWL_UCODE_TLV_API: number of bits used
270 */
271 enum iwl_ucode_tlv_api {
272 /* API Set 0 */
273 IWL_UCODE_TLV_API_FRAGMENTED_SCAN = (__force iwl_ucode_tlv_api_t)8,
274 IWL_UCODE_TLV_API_WIFI_MCC_UPDATE = (__force iwl_ucode_tlv_api_t)9,
275 IWL_UCODE_TLV_API_LQ_SS_PARAMS = (__force iwl_ucode_tlv_api_t)18,
276 IWL_UCODE_TLV_API_NEW_VERSION = (__force iwl_ucode_tlv_api_t)20,
277 IWL_UCODE_TLV_API_SCAN_TSF_REPORT = (__force iwl_ucode_tlv_api_t)28,
278 IWL_UCODE_TLV_API_TKIP_MIC_KEYS = (__force iwl_ucode_tlv_api_t)29,
279 IWL_UCODE_TLV_API_STA_TYPE = (__force iwl_ucode_tlv_api_t)30,
280 IWL_UCODE_TLV_API_NAN2_VER2 = (__force iwl_ucode_tlv_api_t)31,
281 /* API Set 1 */
282 IWL_UCODE_TLV_API_ADAPTIVE_DWELL = (__force iwl_ucode_tlv_api_t)32,
283 IWL_UCODE_TLV_API_OCE = (__force iwl_ucode_tlv_api_t)33,
284 IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE = (__force iwl_ucode_tlv_api_t)34,
285 IWL_UCODE_TLV_API_NEW_RX_STATS = (__force iwl_ucode_tlv_api_t)35,
286 IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL = (__force iwl_ucode_tlv_api_t)36,
287 IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY = (__force iwl_ucode_tlv_api_t)38,
288 IWL_UCODE_TLV_API_DEPRECATE_TTAK = (__force iwl_ucode_tlv_api_t)41,
289 IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2 = (__force iwl_ucode_tlv_api_t)42,
290 IWL_UCODE_TLV_API_FRAG_EBS = (__force iwl_ucode_tlv_api_t)44,
291 IWL_UCODE_TLV_API_REDUCE_TX_POWER = (__force iwl_ucode_tlv_api_t)45,
292 IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF = (__force iwl_ucode_tlv_api_t)46,
293 IWL_UCODE_TLV_API_BEACON_FILTER_V4 = (__force iwl_ucode_tlv_api_t)47,
294 IWL_UCODE_TLV_API_REGULATORY_NVM_INFO = (__force iwl_ucode_tlv_api_t)48,
295 IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ = (__force iwl_ucode_tlv_api_t)49,
296 IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS = (__force iwl_ucode_tlv_api_t)50,
297 IWL_UCODE_TLV_API_MBSSID_HE = (__force iwl_ucode_tlv_api_t)52,
298 IWL_UCODE_TLV_API_WOWLAN_TCP_SYN_WAKE = (__force iwl_ucode_tlv_api_t)53,
299 IWL_UCODE_TLV_API_FTM_RTT_ACCURACY = (__force iwl_ucode_tlv_api_t)54,
300 IWL_UCODE_TLV_API_SAR_TABLE_VER = (__force iwl_ucode_tlv_api_t)55,
301 IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG = (__force iwl_ucode_tlv_api_t)56,
302 IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP = (__force iwl_ucode_tlv_api_t)57,
303 IWL_UCODE_TLV_API_SCAN_EXT_CHAN_VER = (__force iwl_ucode_tlv_api_t)58,
304 IWL_UCODE_TLV_API_BAND_IN_RX_DATA = (__force iwl_ucode_tlv_api_t)59,
305 /* API Set 2 */
306 IWL_UCODE_TLV_API_NO_HOST_DISABLE_TX = (__force iwl_ucode_tlv_api_t)66,
307 IWL_UCODE_TLV_API_INT_DBG_BUF_CLEAR = (__force iwl_ucode_tlv_api_t)67,
308 IWL_UCODE_TLV_API_SMART_FIFO_OFFLOAD = (__force iwl_ucode_tlv_api_t)68,
309
310 NUM_IWL_UCODE_TLV_API
311 /*
312 * This construction make both sparse (which cannot increment the previous
313 * member due to its bitwise type) and kernel-doc (which doesn't understand
314 * the ifdef/else properly) work.
315 */
316 #ifdef __CHECKER__
317 #define __CHECKER_NUM_IWL_UCODE_TLV_API 128
318 = (__force iwl_ucode_tlv_api_t)__CHECKER_NUM_IWL_UCODE_TLV_API,
319 #define NUM_IWL_UCODE_TLV_API __CHECKER_NUM_IWL_UCODE_TLV_API
320 #endif
321 };
322
323 typedef unsigned int __bitwise iwl_ucode_tlv_capa_t;
324
325 /**
326 * enum iwl_ucode_tlv_capa - ucode capabilities
327 * @IWL_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3
328 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT: supports Location Aware Regulatory
329 * @IWL_UCODE_TLV_CAPA_UMAC_SCAN: supports UMAC scan.
330 * @IWL_UCODE_TLV_CAPA_BEAMFORMER: supports Beamformer
331 * @IWL_UCODE_TLV_CAPA_TDLS_SUPPORT: support basic TDLS functionality
332 * @IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT: supports insertion of current
333 * tx power value into TPC Report action frame and Link Measurement Report
334 * action frame
335 * @IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT: supports updating current
336 * channel in DS parameter set element in probe requests.
337 * @IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT: supports adding TPC Report IE in
338 * probe requests.
339 * @IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT: supports Quiet Period requests
340 * @IWL_UCODE_TLV_CAPA_DQA_SUPPORT: supports dynamic queue allocation (DQA),
341 * which also implies support for the scheduler configuration command
342 * @IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching
343 * @IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image
344 * @IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command
345 * @IWL_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload
346 * @IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics
347 * @IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD: supports U-APSD on p2p interface when it
348 * is standalone or with a BSS station interface in the same binding.
349 * @IWL_UCODE_TLV_CAPA_BT_COEX_PLCR: enabled BT Coex packet level co-running
350 * @IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different
351 * sources for the MCC. This TLV bit is a future replacement to
352 * IWL_UCODE_TLV_API_WIFI_MCC_UPDATE. When either is set, multi-source LAR
353 * is supported.
354 * @IWL_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC
355 * @IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan (no longer used)
356 * @IWL_UCODE_TLV_CAPA_FRAGMENTED_PNVM_IMG: supports fragmented PNVM image
357 * @IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT: the firmware supports setting
358 * stabilization latency for SoCs.
359 * @IWL_UCODE_TLV_CAPA_STA_PM_NOTIF: firmware will send STA PM notification
360 * @IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT: binding CDB support
361 * @IWL_UCODE_TLV_CAPA_CDB_SUPPORT: CDB support
362 * @IWL_UCODE_TLV_CAPA_D0I3_END_FIRST: D0I3 end command comes first
363 * @IWL_UCODE_TLV_CAPA_TLC_OFFLOAD: firmware implements rate scaling algorithm
364 * @IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA: firmware implements quota related
365 * @IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2: firmware implements Coex Schema 2
366 * @IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD: firmware supports CSA command
367 * @IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS: firmware supports ultra high band
368 * (6 GHz).
369 * @IWL_UCODE_TLV_CAPA_CS_MODIFY: firmware supports modify action CSA command
370 * @IWL_UCODE_TLV_CAPA_SET_LTR_GEN2: LTR gen2 support
371 * @IWL_UCODE_TLV_CAPA_TAS_CFG: TAS configuration support
372 * @IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD: session protection command
373 * @IWL_UCODE_TLV_CAPA_SET_PPAG: PPAG support
374 * @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement
375 * @IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts
376 * @IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT: supports bt-coex Multi-priority LUT
377 * @IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT: MQ RX support
378 * @IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD: the firmware supports CSA
379 * countdown offloading. Beacon notifications are not sent to the host.
380 * The fw also offloads TBTT alignment.
381 * @IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION: firmware will decide on what
382 * antenna the beacon should be transmitted
383 * @IWL_UCODE_TLV_CAPA_BEACON_STORING: firmware will store the latest beacon
384 * from AP and will send it upon d0i3 exit.
385 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3: support LAR API V3
386 * @IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW: firmware responsible for CT-kill
387 * @IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT: supports temperature
388 * thresholds reporting
389 * @IWL_UCODE_TLV_CAPA_CTDP_SUPPORT: supports cTDP command
390 * @IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED: supports usniffer enabled in
391 * regular image.
392 * @IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG: support getting more shared
393 * memory addresses from the firmware.
394 * @IWL_UCODE_TLV_CAPA_LQM_SUPPORT: supports Link Quality Measurement
395 * @IWL_UCODE_TLV_CAPA_TX_POWER_ACK: reduced TX power API has larger
396 * command size (command version 4) that supports toggling ACK TX
397 * power reduction.
398 * @IWL_UCODE_TLV_CAPA_D3_DEBUG: supports debug recording during D3
399 * @IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT: LED command support
400 * @IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT: MCC response support 11ax
401 * capability.
402 * @IWL_UCODE_TLV_CAPA_CSI_REPORTING: firmware is capable of being configured
403 * to report the CSI information with (certain) RX frames
404 * @IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP: suspend/resume command
405 * @IWL_UCODE_TLV_CAPA_DBG_BUF_ALLOC_CMD_SUPP: support for DBGC
406 * buffer allocation command
407 * @IWL_UCODE_TLV_CAPA_FTM_CALIBRATED: has FTM calibrated and thus supports both
408 * initiator and responder
409 * @IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_UNII4_US_CA: supports (de)activating UNII-4
410 * for US/CA/WW from BIOS
411 * @IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT: supports PSC channels
412 * @IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT: BIGTK support
413 * @IWL_UCODE_TLV_CAPA_PROTECTED_TWT: Supports protection of TWT action frames
414 * @IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE: Supports the firmware handshake in
415 * reset flow
416 * @IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN: Support for passive scan on 6GHz PSC
417 * channels even when these are not enabled.
418 * @IWL_UCODE_TLV_CAPA_HIDDEN_6GHZ_SCAN: hidden SSID 6 GHz scan support
419 * @IWL_UCODE_TLV_CAPA_BROADCAST_TWT: broadcast TWT support
420 * @IWL_UCODE_TLV_CAPA_COEX_HIGH_PRIO: support for BT-coex high
421 * priority for 802.1X/4-way-HS
422 * @IWL_UCODE_TLV_CAPA_BAID_ML_SUPPORT: multi-link BAID support
423 * @IWL_UCODE_TLV_CAPA_SYNCED_TIME: synced time command support
424 * @IWL_UCODE_TLV_CAPA_TIME_SYNC_BOTH_FTM_TM: time sync support
425 * @IWL_UCODE_TLV_CAPA_BIGTK_TX_SUPPORT: BIGTK TX support
426 * @IWL_UCODE_TLV_CAPA_MLD_API_SUPPORT: MLD API support
427 * @IWL_UCODE_TLV_CAPA_SCAN_DONT_TOGGLE_ANT: fixed antenna scan support
428 * @IWL_UCODE_TLV_CAPA_PPAG_CHINA_BIOS_SUPPORT: PPAG China BIOS support
429 * @IWL_UCODE_TLV_CAPA_OFFLOAD_BTM_SUPPORT: BTM protocol offload support
430 * @IWL_UCODE_TLV_CAPA_STA_EXP_MFP_SUPPORT: STA command MFP support
431 * @IWL_UCODE_TLV_CAPA_SNIFF_VALIDATE_SUPPORT: sniffer validate bits support
432 * @IWL_UCODE_TLV_CAPA_CHINA_22_REG_SUPPORT: China 2022 regulator support
433 * @IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT: Support for indicating dump collection
434 * complete to FW.
435 * @IWL_UCODE_TLV_CAPA_SPP_AMSDU_SUPPORT: Support SPP (signaling and payload
436 * protected) A-MSDU.
437 * @IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT: support for DBGC fragmented
438 * DRAM buffers
439 * @IWL_UCODE_TLV_CAPA_SECURE_LTF_SUPPORT: Support secure LTF measurement.
440 * @IWL_UCODE_TLV_CAPA_MONITOR_PASSIVE_CHANS: Support monitor mode on otherwise
441 * passive channels
442 * @IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_5G9_FOR_CA: supports (de)activating 5G9
443 * for CA from BIOS.
444 * @IWL_UCODE_TLV_CAPA_UHB_CANADA_TAS_SUPPORT: supports %TAS_UHB_ALLOWED_CANADA
445 * @IWL_UCODE_TLV_CAPA_EXT_FSEQ_IMAGE_SUPPORT: external FSEQ image support
446 * @IWL_UCODE_TLV_CAPA_RESET_DURING_ASSERT: FW reset handshake is needed
447 * during assert handling even if the dump isn't split
448 * @IWL_UCODE_TLV_CAPA_FW_ACCEPTS_RAW_DSM_TABLE: Firmware has capability of
449 * handling raw DSM table data.
450 *
451 * @NUM_IWL_UCODE_TLV_CAPA: number of bits used
452 */
453 enum iwl_ucode_tlv_capa {
454 /* set 0 */
455 IWL_UCODE_TLV_CAPA_D0I3_SUPPORT = (__force iwl_ucode_tlv_capa_t)0,
456 IWL_UCODE_TLV_CAPA_LAR_SUPPORT = (__force iwl_ucode_tlv_capa_t)1,
457 IWL_UCODE_TLV_CAPA_UMAC_SCAN = (__force iwl_ucode_tlv_capa_t)2,
458 IWL_UCODE_TLV_CAPA_BEAMFORMER = (__force iwl_ucode_tlv_capa_t)3,
459 IWL_UCODE_TLV_CAPA_TDLS_SUPPORT = (__force iwl_ucode_tlv_capa_t)6,
460 IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT = (__force iwl_ucode_tlv_capa_t)8,
461 IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)9,
462 IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)10,
463 IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT = (__force iwl_ucode_tlv_capa_t)11,
464 IWL_UCODE_TLV_CAPA_DQA_SUPPORT = (__force iwl_ucode_tlv_capa_t)12,
465 IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH = (__force iwl_ucode_tlv_capa_t)13,
466 IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG = (__force iwl_ucode_tlv_capa_t)17,
467 IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT = (__force iwl_ucode_tlv_capa_t)18,
468 IWL_UCODE_TLV_CAPA_CSUM_SUPPORT = (__force iwl_ucode_tlv_capa_t)21,
469 IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS = (__force iwl_ucode_tlv_capa_t)22,
470 IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD = (__force iwl_ucode_tlv_capa_t)26,
471 IWL_UCODE_TLV_CAPA_BT_COEX_PLCR = (__force iwl_ucode_tlv_capa_t)28,
472 IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC = (__force iwl_ucode_tlv_capa_t)29,
473 IWL_UCODE_TLV_CAPA_BT_COEX_RRC = (__force iwl_ucode_tlv_capa_t)30,
474 IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)31,
475
476 /* set 1 */
477 IWL_UCODE_TLV_CAPA_FRAGMENTED_PNVM_IMG = (__force iwl_ucode_tlv_capa_t)32,
478 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT = (__force iwl_ucode_tlv_capa_t)37,
479 IWL_UCODE_TLV_CAPA_STA_PM_NOTIF = (__force iwl_ucode_tlv_capa_t)38,
480 IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)39,
481 IWL_UCODE_TLV_CAPA_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)40,
482 IWL_UCODE_TLV_CAPA_D0I3_END_FIRST = (__force iwl_ucode_tlv_capa_t)41,
483 IWL_UCODE_TLV_CAPA_TLC_OFFLOAD = (__force iwl_ucode_tlv_capa_t)43,
484 IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA = (__force iwl_ucode_tlv_capa_t)44,
485 IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2 = (__force iwl_ucode_tlv_capa_t)45,
486 IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD = (__force iwl_ucode_tlv_capa_t)46,
487 IWL_UCODE_TLV_CAPA_FTM_CALIBRATED = (__force iwl_ucode_tlv_capa_t)47,
488 IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS = (__force iwl_ucode_tlv_capa_t)48,
489 IWL_UCODE_TLV_CAPA_CS_MODIFY = (__force iwl_ucode_tlv_capa_t)49,
490 IWL_UCODE_TLV_CAPA_SET_LTR_GEN2 = (__force iwl_ucode_tlv_capa_t)50,
491 IWL_UCODE_TLV_CAPA_SET_PPAG = (__force iwl_ucode_tlv_capa_t)52,
492 IWL_UCODE_TLV_CAPA_TAS_CFG = (__force iwl_ucode_tlv_capa_t)53,
493 IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD = (__force iwl_ucode_tlv_capa_t)54,
494 IWL_UCODE_TLV_CAPA_PROTECTED_TWT = (__force iwl_ucode_tlv_capa_t)56,
495 IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE = (__force iwl_ucode_tlv_capa_t)57,
496 IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN = (__force iwl_ucode_tlv_capa_t)58,
497 IWL_UCODE_TLV_CAPA_HIDDEN_6GHZ_SCAN = (__force iwl_ucode_tlv_capa_t)59,
498 IWL_UCODE_TLV_CAPA_BROADCAST_TWT = (__force iwl_ucode_tlv_capa_t)60,
499 IWL_UCODE_TLV_CAPA_COEX_HIGH_PRIO = (__force iwl_ucode_tlv_capa_t)61,
500 IWL_UCODE_TLV_CAPA_RFIM_SUPPORT = (__force iwl_ucode_tlv_capa_t)62,
501 IWL_UCODE_TLV_CAPA_BAID_ML_SUPPORT = (__force iwl_ucode_tlv_capa_t)63,
502
503 /* set 2 */
504 IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE = (__force iwl_ucode_tlv_capa_t)64,
505 IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS = (__force iwl_ucode_tlv_capa_t)65,
506 IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT = (__force iwl_ucode_tlv_capa_t)67,
507 IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT = (__force iwl_ucode_tlv_capa_t)68,
508 IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD = (__force iwl_ucode_tlv_capa_t)70,
509 IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION = (__force iwl_ucode_tlv_capa_t)71,
510 IWL_UCODE_TLV_CAPA_BEACON_STORING = (__force iwl_ucode_tlv_capa_t)72,
511 IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3 = (__force iwl_ucode_tlv_capa_t)73,
512 IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW = (__force iwl_ucode_tlv_capa_t)74,
513 IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT = (__force iwl_ucode_tlv_capa_t)75,
514 IWL_UCODE_TLV_CAPA_CTDP_SUPPORT = (__force iwl_ucode_tlv_capa_t)76,
515 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED = (__force iwl_ucode_tlv_capa_t)77,
516 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG = (__force iwl_ucode_tlv_capa_t)80,
517 IWL_UCODE_TLV_CAPA_LQM_SUPPORT = (__force iwl_ucode_tlv_capa_t)81,
518 IWL_UCODE_TLV_CAPA_TX_POWER_ACK = (__force iwl_ucode_tlv_capa_t)84,
519 IWL_UCODE_TLV_CAPA_D3_DEBUG = (__force iwl_ucode_tlv_capa_t)87,
520 IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT = (__force iwl_ucode_tlv_capa_t)88,
521 IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT = (__force iwl_ucode_tlv_capa_t)89,
522 IWL_UCODE_TLV_CAPA_CSI_REPORTING = (__force iwl_ucode_tlv_capa_t)90,
523 IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP = (__force iwl_ucode_tlv_capa_t)92,
524 IWL_UCODE_TLV_CAPA_DBG_BUF_ALLOC_CMD_SUPP = (__force iwl_ucode_tlv_capa_t)93,
525
526 /* set 3 */
527 IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_UNII4_US_CA = (__force iwl_ucode_tlv_capa_t)96,
528 IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)98,
529 IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT = (__force iwl_ucode_tlv_capa_t)100,
530 IWL_UCODE_TLV_CAPA_SPP_AMSDU_SUPPORT = (__force iwl_ucode_tlv_capa_t)103,
531 IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT = (__force iwl_ucode_tlv_capa_t)104,
532 IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT = (__force iwl_ucode_tlv_capa_t)105,
533 IWL_UCODE_TLV_CAPA_SYNCED_TIME = (__force iwl_ucode_tlv_capa_t)106,
534 IWL_UCODE_TLV_CAPA_TIME_SYNC_BOTH_FTM_TM = (__force iwl_ucode_tlv_capa_t)108,
535 IWL_UCODE_TLV_CAPA_BIGTK_TX_SUPPORT = (__force iwl_ucode_tlv_capa_t)109,
536 IWL_UCODE_TLV_CAPA_MLD_API_SUPPORT = (__force iwl_ucode_tlv_capa_t)110,
537 IWL_UCODE_TLV_CAPA_SCAN_DONT_TOGGLE_ANT = (__force iwl_ucode_tlv_capa_t)111,
538 IWL_UCODE_TLV_CAPA_PPAG_CHINA_BIOS_SUPPORT = (__force iwl_ucode_tlv_capa_t)112,
539 IWL_UCODE_TLV_CAPA_OFFLOAD_BTM_SUPPORT = (__force iwl_ucode_tlv_capa_t)113,
540 IWL_UCODE_TLV_CAPA_STA_EXP_MFP_SUPPORT = (__force iwl_ucode_tlv_capa_t)114,
541 IWL_UCODE_TLV_CAPA_SNIFF_VALIDATE_SUPPORT = (__force iwl_ucode_tlv_capa_t)116,
542 IWL_UCODE_TLV_CAPA_CHINA_22_REG_SUPPORT = (__force iwl_ucode_tlv_capa_t)117,
543 IWL_UCODE_TLV_CAPA_SECURE_LTF_SUPPORT = (__force iwl_ucode_tlv_capa_t)121,
544 IWL_UCODE_TLV_CAPA_MONITOR_PASSIVE_CHANS = (__force iwl_ucode_tlv_capa_t)122,
545 IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_5G9_FOR_CA = (__force iwl_ucode_tlv_capa_t)123,
546 IWL_UCODE_TLV_CAPA_UHB_CANADA_TAS_SUPPORT = (__force iwl_ucode_tlv_capa_t)124,
547 IWL_UCODE_TLV_CAPA_EXT_FSEQ_IMAGE_SUPPORT = (__force iwl_ucode_tlv_capa_t)125,
548
549 /* set 4 */
550
551 IWL_UCODE_TLV_CAPA_RESET_DURING_ASSERT = (__force iwl_ucode_tlv_capa_t)(4 * 32 + 0),
552 IWL_UCODE_TLV_CAPA_FW_ACCEPTS_RAW_DSM_TABLE = (__force iwl_ucode_tlv_capa_t)(4 * 32 + 1),
553 NUM_IWL_UCODE_TLV_CAPA
554 /*
555 * This construction make both sparse (which cannot increment the previous
556 * member due to its bitwise type) and kernel-doc (which doesn't understand
557 * the ifdef/else properly) work.
558 */
559 #ifdef __CHECKER__
560 #define __CHECKER_NUM_IWL_UCODE_TLV_CAPA 128
561 = (__force iwl_ucode_tlv_capa_t)__CHECKER_NUM_IWL_UCODE_TLV_CAPA,
562 #define NUM_IWL_UCODE_TLV_CAPA __CHECKER_NUM_IWL_UCODE_TLV_CAPA
563 #endif
564 };
565
566 /* The default calibrate table size if not specified by firmware file */
567 #define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18
568 #define IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE 19
569 #define IWL_MAX_PHY_CALIBRATE_TBL_SIZE 253
570
571 /* The default max probe length if not specified by the firmware file */
572 #define IWL_DEFAULT_MAX_PROBE_LENGTH 200
573
574 /*
575 * For 16.0 uCode and above, there is no differentiation between sections,
576 * just an offset to the HW address.
577 */
578 #define CPU1_CPU2_SEPARATOR_SECTION 0xFFFFCCCC
579 #define PAGING_SEPARATOR_SECTION 0xAAAABBBB
580
581 /* uCode version contains 4 values: Major/Minor/API/Serial */
582 #define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24)
583 #define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16)
584 #define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8)
585 #define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF)
586
587 /**
588 * struct iwl_tlv_calib_ctrl - Calibration control struct.
589 * Sent as part of the phy configuration command.
590 * @flow_trigger: bitmap for which calibrations to perform according to
591 * flow triggers.
592 * @event_trigger: bitmap for which calibrations to perform according to
593 * event triggers.
594 */
595 struct iwl_tlv_calib_ctrl {
596 __le32 flow_trigger;
597 __le32 event_trigger;
598 } __packed;
599
600 enum iwl_fw_phy_cfg {
601 FW_PHY_CFG_RADIO_TYPE_POS = 0,
602 FW_PHY_CFG_RADIO_TYPE = 0x3 << FW_PHY_CFG_RADIO_TYPE_POS,
603 FW_PHY_CFG_RADIO_STEP_POS = 2,
604 FW_PHY_CFG_RADIO_STEP = 0x3 << FW_PHY_CFG_RADIO_STEP_POS,
605 FW_PHY_CFG_RADIO_DASH_POS = 4,
606 FW_PHY_CFG_RADIO_DASH = 0x3 << FW_PHY_CFG_RADIO_DASH_POS,
607 FW_PHY_CFG_TX_CHAIN_POS = 16,
608 FW_PHY_CFG_TX_CHAIN = 0xf << FW_PHY_CFG_TX_CHAIN_POS,
609 FW_PHY_CFG_RX_CHAIN_POS = 20,
610 FW_PHY_CFG_RX_CHAIN = 0xf << FW_PHY_CFG_RX_CHAIN_POS,
611 FW_PHY_CFG_CHAIN_SAD_POS = 23,
612 FW_PHY_CFG_CHAIN_SAD_ENABLED = 0x1 << FW_PHY_CFG_CHAIN_SAD_POS,
613 FW_PHY_CFG_CHAIN_SAD_ANT_A = 0x2 << FW_PHY_CFG_CHAIN_SAD_POS,
614 FW_PHY_CFG_CHAIN_SAD_ANT_B = 0x4 << FW_PHY_CFG_CHAIN_SAD_POS,
615 FW_PHY_CFG_SHARED_CLK = BIT(31),
616 };
617
618 enum iwl_fw_dbg_reg_operator {
619 CSR_ASSIGN,
620 CSR_SETBIT,
621 CSR_CLEARBIT,
622
623 PRPH_ASSIGN,
624 PRPH_SETBIT,
625 PRPH_CLEARBIT,
626
627 INDIRECT_ASSIGN,
628 INDIRECT_SETBIT,
629 INDIRECT_CLEARBIT,
630
631 PRPH_BLOCKBIT,
632 };
633
634 /**
635 * struct iwl_fw_dbg_reg_op - an operation on a register
636 *
637 * @op: &enum iwl_fw_dbg_reg_operator
638 * @reserved: reserved
639 * @addr: offset of the register
640 * @val: value
641 */
642 struct iwl_fw_dbg_reg_op {
643 u8 op;
644 u8 reserved[3];
645 __le32 addr;
646 __le32 val;
647 } __packed;
648
649 /**
650 * enum iwl_fw_dbg_monitor_mode - available monitor recording modes
651 *
652 * @SMEM_MODE: monitor stores the data in SMEM
653 * @EXTERNAL_MODE: monitor stores the data in allocated DRAM
654 * @MARBH_MODE: monitor stores the data in MARBH buffer
655 * @MIPI_MODE: monitor outputs the data through the MIPI interface
656 */
657 enum iwl_fw_dbg_monitor_mode {
658 SMEM_MODE = 0,
659 EXTERNAL_MODE = 1,
660 MARBH_MODE = 2,
661 MIPI_MODE = 3,
662 };
663
664 /**
665 * struct iwl_fw_dbg_mem_seg_tlv - configures the debug data memory segments
666 *
667 * @data_type: the memory segment type to record
668 * @ofs: the memory segment offset
669 * @len: the memory segment length, in bytes
670 *
671 * This parses IWL_UCODE_TLV_FW_MEM_SEG
672 */
673 struct iwl_fw_dbg_mem_seg_tlv {
674 __le32 data_type;
675 __le32 ofs;
676 __le32 len;
677 } __packed;
678
679 /**
680 * struct iwl_fw_dbg_dest_tlv_v1 - configures the destination of the debug data
681 *
682 * @version: version of the TLV - currently 0
683 * @monitor_mode: &enum iwl_fw_dbg_monitor_mode
684 * @size_power: buffer size will be 2^(size_power + 11)
685 * @reserved: reserved
686 * @base_reg: addr of the base addr register (PRPH)
687 * @end_reg: addr of the end addr register (PRPH)
688 * @write_ptr_reg: the addr of the reg of the write pointer
689 * @wrap_count: the addr of the reg of the wrap_count
690 * @base_shift: shift right of the base addr reg
691 * @end_shift: shift right of the end addr reg
692 * @reg_ops: array of registers operations
693 *
694 * This parses IWL_UCODE_TLV_FW_DBG_DEST
695 */
696 struct iwl_fw_dbg_dest_tlv_v1 {
697 u8 version;
698 u8 monitor_mode;
699 u8 size_power;
700 u8 reserved;
701 __le32 base_reg;
702 __le32 end_reg;
703 __le32 write_ptr_reg;
704 __le32 wrap_count;
705 u8 base_shift;
706 u8 end_shift;
707 struct iwl_fw_dbg_reg_op reg_ops[];
708 } __packed;
709
710 /* Mask of the register for defining the LDBG MAC2SMEM buffer SMEM size */
711 #define IWL_LDBG_M2S_BUF_SIZE_MSK 0x0fff0000
712 /* Mask of the register for defining the LDBG MAC2SMEM SMEM base address */
713 #define IWL_LDBG_M2S_BUF_BA_MSK 0x00000fff
714 /* The smem buffer chunks are in units of 256 bits */
715 #define IWL_M2S_UNIT_SIZE 0x100
716
717 struct iwl_fw_dbg_dest_tlv {
718 u8 version;
719 u8 monitor_mode;
720 u8 size_power;
721 u8 reserved;
722 __le32 cfg_reg;
723 __le32 write_ptr_reg;
724 __le32 wrap_count;
725 u8 base_shift;
726 u8 size_shift;
727 struct iwl_fw_dbg_reg_op reg_ops[];
728 } __packed;
729
730 struct iwl_fw_dbg_conf_hcmd {
731 u8 id;
732 u8 reserved;
733 __le16 len;
734 u8 data[];
735 } __packed;
736
737 /**
738 * enum iwl_fw_dbg_trigger_mode - triggers functionalities
739 *
740 * @IWL_FW_DBG_TRIGGER_START: when trigger occurs re-conf the dbg mechanism
741 * @IWL_FW_DBG_TRIGGER_STOP: when trigger occurs pull the dbg data
742 * @IWL_FW_DBG_TRIGGER_MONITOR_ONLY: when trigger occurs trigger is set to
743 * collect only monitor data
744 */
745 enum iwl_fw_dbg_trigger_mode {
746 IWL_FW_DBG_TRIGGER_START = BIT(0),
747 IWL_FW_DBG_TRIGGER_STOP = BIT(1),
748 IWL_FW_DBG_TRIGGER_MONITOR_ONLY = BIT(2),
749 };
750
751 /**
752 * enum iwl_fw_dbg_trigger_flags - the flags supported by wrt triggers
753 * @IWL_FW_DBG_FORCE_RESTART: force a firmware restart
754 */
755 enum iwl_fw_dbg_trigger_flags {
756 IWL_FW_DBG_FORCE_RESTART = BIT(0),
757 };
758
759 /**
760 * enum iwl_fw_dbg_trigger_vif_type - define the VIF type for a trigger
761 * @IWL_FW_DBG_CONF_VIF_ANY: any vif type
762 * @IWL_FW_DBG_CONF_VIF_IBSS: IBSS mode
763 * @IWL_FW_DBG_CONF_VIF_STATION: BSS mode
764 * @IWL_FW_DBG_CONF_VIF_AP: AP mode
765 * @IWL_FW_DBG_CONF_VIF_P2P_CLIENT: P2P Client mode
766 * @IWL_FW_DBG_CONF_VIF_P2P_GO: P2P GO mode
767 * @IWL_FW_DBG_CONF_VIF_P2P_DEVICE: P2P device
768 */
769 enum iwl_fw_dbg_trigger_vif_type {
770 IWL_FW_DBG_CONF_VIF_ANY = NL80211_IFTYPE_UNSPECIFIED,
771 IWL_FW_DBG_CONF_VIF_IBSS = NL80211_IFTYPE_ADHOC,
772 IWL_FW_DBG_CONF_VIF_STATION = NL80211_IFTYPE_STATION,
773 IWL_FW_DBG_CONF_VIF_AP = NL80211_IFTYPE_AP,
774 IWL_FW_DBG_CONF_VIF_P2P_CLIENT = NL80211_IFTYPE_P2P_CLIENT,
775 IWL_FW_DBG_CONF_VIF_P2P_GO = NL80211_IFTYPE_P2P_GO,
776 IWL_FW_DBG_CONF_VIF_P2P_DEVICE = NL80211_IFTYPE_P2P_DEVICE,
777 };
778
779 /**
780 * struct iwl_fw_dbg_trigger_tlv - a TLV that describes the trigger
781 * @id: &enum iwl_fw_dbg_trigger
782 * @vif_type: &enum iwl_fw_dbg_trigger_vif_type
783 * @stop_conf_ids: bitmap of configurations this trigger relates to.
784 * if the mode is %IWL_FW_DBG_TRIGGER_STOP, then if the bit corresponding
785 * to the currently running configuration is set, the data should be
786 * collected.
787 * @stop_delay: how many milliseconds to wait before collecting the data
788 * after the STOP trigger fires.
789 * @mode: &enum iwl_fw_dbg_trigger_mode - can be stop / start of both
790 * @start_conf_id: if mode is %IWL_FW_DBG_TRIGGER_START, this defines what
791 * configuration should be applied when the triggers kicks in.
792 * @occurrences: number of occurrences. 0 means the trigger will never fire.
793 * @trig_dis_ms: the time, in milliseconds, after an occurrence of this
794 * trigger in which another occurrence should be ignored.
795 * @flags: &enum iwl_fw_dbg_trigger_flags
796 * @reserved: reserved (for alignment)
797 * @data: trigger data
798 */
799 struct iwl_fw_dbg_trigger_tlv {
800 __le32 id;
801 __le32 vif_type;
802 __le32 stop_conf_ids;
803 __le32 stop_delay;
804 u8 mode;
805 u8 start_conf_id;
806 __le16 occurrences;
807 __le16 trig_dis_ms;
808 u8 flags;
809 u8 reserved[5];
810
811 u8 data[];
812 } __packed;
813
814 #define FW_DBG_START_FROM_ALIVE 0
815 #define FW_DBG_CONF_MAX 32
816 #define FW_DBG_INVALID 0xff
817
818 /**
819 * struct iwl_fw_dbg_trigger_missed_bcon - configures trigger for missed beacons
820 * @stop_consec_missed_bcon: stop recording if threshold is crossed.
821 * @stop_consec_missed_bcon_since_rx: stop recording if threshold is crossed.
822 * @start_consec_missed_bcon: start recording if threshold is crossed.
823 * @start_consec_missed_bcon_since_rx: start recording if threshold is crossed.
824 * @reserved1: reserved
825 * @reserved2: reserved
826 */
827 struct iwl_fw_dbg_trigger_missed_bcon {
828 __le32 stop_consec_missed_bcon;
829 __le32 stop_consec_missed_bcon_since_rx;
830 __le32 reserved2[2];
831 __le32 start_consec_missed_bcon;
832 __le32 start_consec_missed_bcon_since_rx;
833 __le32 reserved1[2];
834 } __packed;
835
836 /**
837 * struct iwl_fw_dbg_trigger_cmd - configures trigger for messages from FW.
838 * @cmds: the list of commands to trigger the collection on
839 */
840 struct iwl_fw_dbg_trigger_cmd {
841 struct cmd {
842 u8 cmd_id;
843 u8 group_id;
844 } __packed cmds[16];
845 } __packed;
846
847 /**
848 * struct iwl_fw_dbg_trigger_stats - configures trigger for statistics
849 * @stop_offset: the offset of the value to be monitored
850 * @stop_threshold: the threshold above which to collect
851 * @start_offset: the offset of the value to be monitored
852 * @start_threshold: the threshold above which to start recording
853 */
854 struct iwl_fw_dbg_trigger_stats {
855 __le32 stop_offset;
856 __le32 stop_threshold;
857 __le32 start_offset;
858 __le32 start_threshold;
859 } __packed;
860
861 /**
862 * struct iwl_fw_dbg_trigger_low_rssi - trigger for low beacon RSSI
863 * @rssi: RSSI value to trigger at
864 */
865 struct iwl_fw_dbg_trigger_low_rssi {
866 __le32 rssi;
867 } __packed;
868
869 /**
870 * struct iwl_fw_dbg_trigger_mlme - configures trigger for mlme events
871 * @stop_auth_denied: number of denied authentication to collect
872 * @stop_auth_timeout: number of authentication timeout to collect
873 * @stop_rx_deauth: number of Rx deauth before to collect
874 * @stop_tx_deauth: number of Tx deauth before to collect
875 * @stop_assoc_denied: number of denied association to collect
876 * @stop_assoc_timeout: number of association timeout to collect
877 * @stop_connection_loss: number of connection loss to collect
878 * @start_auth_denied: number of denied authentication to start recording
879 * @start_auth_timeout: number of authentication timeout to start recording
880 * @start_rx_deauth: number of Rx deauth to start recording
881 * @start_tx_deauth: number of Tx deauth to start recording
882 * @start_assoc_denied: number of denied association to start recording
883 * @start_assoc_timeout: number of association timeout to start recording
884 * @start_connection_loss: number of connection loss to start recording
885 * @reserved: reserved
886 * @reserved2: reserved
887 */
888 struct iwl_fw_dbg_trigger_mlme {
889 u8 stop_auth_denied;
890 u8 stop_auth_timeout;
891 u8 stop_rx_deauth;
892 u8 stop_tx_deauth;
893
894 u8 stop_assoc_denied;
895 u8 stop_assoc_timeout;
896 u8 stop_connection_loss;
897 u8 reserved;
898
899 u8 start_auth_denied;
900 u8 start_auth_timeout;
901 u8 start_rx_deauth;
902 u8 start_tx_deauth;
903
904 u8 start_assoc_denied;
905 u8 start_assoc_timeout;
906 u8 start_connection_loss;
907 u8 reserved2;
908 } __packed;
909
910 /**
911 * struct iwl_fw_dbg_trigger_txq_timer - configures the Tx queue's timer
912 * @command_queue: timeout for the command queue in ms
913 * @bss: timeout for the queues of a BSS (except for TDLS queues) in ms
914 * @softap: timeout for the queues of a softAP in ms
915 * @p2p_go: timeout for the queues of a P2P GO in ms
916 * @p2p_client: timeout for the queues of a P2P client in ms
917 * @p2p_device: timeout for the queues of a P2P device in ms
918 * @ibss: timeout for the queues of an IBSS in ms
919 * @tdls: timeout for the queues of a TDLS station in ms
920 * @reserved: reserved
921 */
922 struct iwl_fw_dbg_trigger_txq_timer {
923 __le32 command_queue;
924 __le32 bss;
925 __le32 softap;
926 __le32 p2p_go;
927 __le32 p2p_client;
928 __le32 p2p_device;
929 __le32 ibss;
930 __le32 tdls;
931 __le32 reserved[4];
932 } __packed;
933
934 /**
935 * struct iwl_fw_dbg_trigger_time_event - configures a time event trigger
936 * @time_events: a list of tuples <id, action_bitmap>. The driver will issue a
937 * trigger each time a time event notification that relates to time event
938 * id with one of the actions in the bitmap is received and
939 * BIT(notif->status) is set in status_bitmap.
940 *
941 */
942 struct iwl_fw_dbg_trigger_time_event {
943 struct {
944 __le32 id;
945 __le32 action_bitmap;
946 __le32 status_bitmap;
947 } __packed time_events[16];
948 } __packed;
949
950 /**
951 * struct iwl_fw_dbg_trigger_ba - configures BlockAck related trigger
952 * @rx_ba_start: tid bitmap to configure on what tid the trigger should occur
953 * when an Rx BlockAck session is started.
954 * @rx_ba_stop: tid bitmap to configure on what tid the trigger should occur
955 * when an Rx BlockAck session is stopped.
956 * @tx_ba_start: tid bitmap to configure on what tid the trigger should occur
957 * when a Tx BlockAck session is started.
958 * @tx_ba_stop: tid bitmap to configure on what tid the trigger should occur
959 * when a Tx BlockAck session is stopped.
960 * @rx_bar: tid bitmap to configure on what tid the trigger should occur
961 * when a BAR is received (for a Tx BlockAck session).
962 * @tx_bar: tid bitmap to configure on what tid the trigger should occur
963 * when a BAR is send (for an Rx BlocAck session).
964 * @frame_timeout: tid bitmap to configure on what tid the trigger should occur
965 * when a frame times out in the reordering buffer.
966 */
967 struct iwl_fw_dbg_trigger_ba {
968 __le16 rx_ba_start;
969 __le16 rx_ba_stop;
970 __le16 tx_ba_start;
971 __le16 tx_ba_stop;
972 __le16 rx_bar;
973 __le16 tx_bar;
974 __le16 frame_timeout;
975 } __packed;
976
977 /**
978 * struct iwl_fw_dbg_trigger_tdls - configures trigger for TDLS events.
979 * @action_bitmap: the TDLS action to trigger the collection upon
980 * @peer_mode: trigger on specific peer or all
981 * @peer: the TDLS peer to trigger the collection on
982 * @reserved: reserved
983 */
984 struct iwl_fw_dbg_trigger_tdls {
985 u8 action_bitmap;
986 u8 peer_mode;
987 u8 peer[ETH_ALEN];
988 u8 reserved[4];
989 } __packed;
990
991 /**
992 * struct iwl_fw_dbg_trigger_tx_status - configures trigger for tx response
993 * status.
994 * @statuses: the list of statuses to trigger the collection on
995 * @reserved: reserved
996 */
997 struct iwl_fw_dbg_trigger_tx_status {
998 struct tx_status {
999 u8 status;
1000 u8 reserved[3];
1001 } __packed statuses[16];
1002 __le32 reserved[2];
1003 } __packed;
1004
1005 /**
1006 * struct iwl_fw_dbg_conf_tlv - a TLV that describes a debug configuration.
1007 * @id: conf id
1008 * @usniffer: should the uSniffer image be used
1009 * @reserved: reserved
1010 * @num_of_hcmds: how many HCMDs to send are present here
1011 * @hcmd: a variable length host command to be sent to apply the configuration.
1012 * If there is more than one HCMD to send, they will appear one after the
1013 * other and be sent in the order that they appear in.
1014 * This parses IWL_UCODE_TLV_FW_DBG_CONF. The user can add up-to
1015 * %FW_DBG_CONF_MAX configuration per run.
1016 */
1017 struct iwl_fw_dbg_conf_tlv {
1018 u8 id;
1019 u8 usniffer;
1020 u8 reserved;
1021 u8 num_of_hcmds;
1022 struct iwl_fw_dbg_conf_hcmd hcmd;
1023 } __packed;
1024
1025 #define IWL_FW_CMD_VER_UNKNOWN 99
1026
1027 /**
1028 * struct iwl_fw_cmd_version - firmware command version entry
1029 * @cmd: command ID
1030 * @group: group ID
1031 * @cmd_ver: command version
1032 * @notif_ver: notification version
1033 */
1034 struct iwl_fw_cmd_version {
1035 u8 cmd;
1036 u8 group;
1037 u8 cmd_ver;
1038 u8 notif_ver;
1039 } __packed;
1040
1041 struct iwl_fw_tcm_error_addr {
1042 __le32 addr;
1043 }; /* FW_TLV_TCM_ERROR_INFO_ADDRS_S */
1044
1045 struct iwl_fw_dump_exclude {
1046 __le32 addr, size;
1047 };
1048
1049 struct iwl_fw_fseq_bin_version {
1050 __le32 major, minor;
1051 }; /* FW_TLV_FSEQ_BIN_VERSION_S */
1052
_iwl_tlv_array_len(const struct iwl_ucode_tlv * tlv,size_t fixed_size,size_t var_size)1053 static inline size_t _iwl_tlv_array_len(const struct iwl_ucode_tlv *tlv,
1054 size_t fixed_size, size_t var_size)
1055 {
1056 size_t var_len = le32_to_cpu(tlv->length) - fixed_size;
1057
1058 if (WARN_ON(var_len % var_size))
1059 return 0;
1060
1061 return var_len / var_size;
1062 }
1063
1064 #define iwl_tlv_array_len(_tlv_ptr, _struct_ptr, _memb) \
1065 _iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)), \
1066 sizeof(_struct_ptr->_memb[0]))
1067
1068 #define iwl_tlv_array_len_with_size(_tlv_ptr, _struct_ptr, _size) \
1069 _iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)), _size)
1070
1071 /* external FSEQ file */
1072 #define IWL_FSEQ_FILE "intel/fseq-%04x-%04x"
1073 #define IWL_FSEQ_MAGIC "INTEL-CNV-FSEQ\n\0"
1074
1075 struct iwl_fseq_file {
1076 char magic[16];
1077 char version[16];
1078 __le32 bt_len;
1079 __le32 wifi_len;
1080 u8 reserved[8];
1081 u8 data[];
1082 } __packed;
1083
1084 #endif /* __iwl_fw_file_h__ */
1085