1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * 4 * Bluetooth support for Intel devices 5 * 6 * Copyright (C) 2015 Intel Corporation 7 */ 8 9 /* List of tlv type */ 10 enum { 11 INTEL_TLV_CNVI_TOP = 0x10, 12 INTEL_TLV_CNVR_TOP, 13 INTEL_TLV_CNVI_BT, 14 INTEL_TLV_CNVR_BT, 15 INTEL_TLV_CNVI_OTP, 16 INTEL_TLV_CNVR_OTP, 17 INTEL_TLV_DEV_REV_ID, 18 INTEL_TLV_USB_VENDOR_ID, 19 INTEL_TLV_USB_PRODUCT_ID, 20 INTEL_TLV_PCIE_VENDOR_ID, 21 INTEL_TLV_PCIE_DEVICE_ID, 22 INTEL_TLV_PCIE_SUBSYSTEM_ID, 23 INTEL_TLV_IMAGE_TYPE, 24 INTEL_TLV_TIME_STAMP, 25 INTEL_TLV_BUILD_TYPE, 26 INTEL_TLV_BUILD_NUM, 27 INTEL_TLV_FW_BUILD_PRODUCT, 28 INTEL_TLV_FW_BUILD_HW, 29 INTEL_TLV_FW_STEP, 30 INTEL_TLV_BT_SPEC, 31 INTEL_TLV_MFG_NAME, 32 INTEL_TLV_HCI_REV, 33 INTEL_TLV_LMP_SUBVER, 34 INTEL_TLV_OTP_PATCH_VER, 35 INTEL_TLV_SECURE_BOOT, 36 INTEL_TLV_KEY_FROM_HDR, 37 INTEL_TLV_OTP_LOCK, 38 INTEL_TLV_API_LOCK, 39 INTEL_TLV_DEBUG_LOCK, 40 INTEL_TLV_MIN_FW, 41 INTEL_TLV_LIMITED_CCE, 42 INTEL_TLV_SBE_TYPE, 43 INTEL_TLV_OTP_BDADDR, 44 INTEL_TLV_UNLOCKED_STATE, 45 INTEL_TLV_GIT_SHA1, 46 INTEL_TLV_FW_ID = 0x50 47 }; 48 49 struct intel_tlv { 50 u8 type; 51 u8 len; 52 u8 val[]; 53 } __packed; 54 55 #define BTINTEL_HCI_OP_RESET 0xfc01 56 57 #define BTINTEL_CNVI_BLAZARI 0x900 /* BlazarI - Lunar Lake */ 58 #define BTINTEL_CNVI_BLAZARIW 0x901 /* BlazarIW - Wildcat Lake */ 59 #define BTINTEL_CNVI_GAP 0x910 /* Gale Peak2 - Meteor Lake */ 60 #define BTINTEL_CNVI_BLAZARU 0x930 /* BlazarU - Meteor Lake */ 61 #define BTINTEL_CNVI_SCP 0xA00 /* Scorpius Peak - Panther Lake */ 62 #define BTINTEL_CNVI_SCP2 0xA10 /* Scorpius Peak2 - Nova Lake */ 63 #define BTINTEL_CNVI_SCP2F 0xA20 /* Scorpius Peak2F - Nova Lake */ 64 65 /* CNVR */ 66 #define BTINTEL_CNVR_FMP2 0x910 67 68 #define BTINTEL_IMG_BOOTLOADER 0x01 /* Bootloader image */ 69 #define BTINTEL_IMG_IML 0x02 /* Intermediate image */ 70 #define BTINTEL_IMG_OP 0x03 /* Operational image */ 71 72 #define BTINTEL_FWID_MAXLEN 64 73 74 /* CNVi Hardware variant */ 75 #define BTINTEL_HWID_GAP 0x1c /* Gale Peak2 - Meteor Lake */ 76 #define BTINTEL_HWID_BZRI 0x1e /* BlazarI - Lunar Lake */ 77 #define BTINTEL_HWID_BZRU 0x1d /* BlazarU - Meteor Lake */ 78 #define BTINTEL_HWID_SCP 0x1f /* Scorpius Peak - Panther Lake */ 79 #define BTINTEL_HWID_SCP2 0x20 /* Scorpius Peak2 - Nova Lake */ 80 #define BTINTEL_HWID_BZRIW 0x22 /* BlazarIW - Wildcat Lake */ 81 82 struct intel_version_tlv { 83 u32 cnvi_top; 84 u32 cnvr_top; 85 u32 cnvi_bt; 86 u32 cnvr_bt; 87 u16 dev_rev_id; 88 u8 img_type; 89 u16 timestamp; 90 u8 build_type; 91 u32 build_num; 92 u8 secure_boot; 93 u8 otp_lock; 94 u8 api_lock; 95 u8 debug_lock; 96 u8 min_fw_build_nn; 97 u8 min_fw_build_cw; 98 u8 min_fw_build_yy; 99 u8 limited_cce; 100 u8 sbe_type; 101 u32 git_sha1; 102 u8 fw_id[BTINTEL_FWID_MAXLEN]; 103 bdaddr_t otp_bd_addr; 104 }; 105 106 struct intel_version { 107 u8 status; 108 u8 hw_platform; 109 u8 hw_variant; 110 u8 hw_revision; 111 u8 fw_variant; 112 u8 fw_revision; 113 u8 fw_build_num; 114 u8 fw_build_ww; 115 u8 fw_build_yy; 116 u8 fw_patch_num; 117 } __packed; 118 119 struct intel_boot_params { 120 __u8 status; 121 __u8 otp_format; 122 __u8 otp_content; 123 __u8 otp_patch; 124 __le16 dev_revid; 125 __u8 secure_boot; 126 __u8 key_from_hdr; 127 __u8 key_type; 128 __u8 otp_lock; 129 __u8 api_lock; 130 __u8 debug_lock; 131 bdaddr_t otp_bdaddr; 132 __u8 min_fw_build_nn; 133 __u8 min_fw_build_cw; 134 __u8 min_fw_build_yy; 135 __u8 limited_cce; 136 __u8 unlocked_state; 137 } __packed; 138 139 struct intel_bootup { 140 __u8 zero; 141 __u8 num_cmds; 142 __u8 source; 143 __u8 reset_type; 144 __u8 reset_reason; 145 __u8 ddc_status; 146 } __packed; 147 148 struct intel_secure_send_result { 149 __u8 result; 150 __le16 opcode; 151 __u8 status; 152 } __packed; 153 154 struct intel_reset { 155 __u8 reset_type; 156 __u8 patch_enable; 157 __u8 ddc_reload; 158 __u8 boot_option; 159 __le32 boot_param; 160 } __packed; 161 162 struct intel_debug_features { 163 __u8 page1[16]; 164 } __packed; 165 166 struct intel_offload_use_cases { 167 __u8 status; 168 __u8 preset[8]; 169 } __packed; 170 171 #define INTEL_OP_PPAG_CMD 0xFE0B 172 struct hci_ppag_enable_cmd { 173 __le32 ppag_enable_flags; 174 } __packed; 175 176 #define INTEL_TLV_TYPE_ID 0x01 177 178 #define INTEL_TLV_SYSTEM_EXCEPTION 0x00 179 #define INTEL_TLV_FATAL_EXCEPTION 0x01 180 #define INTEL_TLV_DEBUG_EXCEPTION 0x02 181 #define INTEL_TLV_TEST_EXCEPTION 0xDE 182 183 struct btintel_cp_ddc_write { 184 u8 len; 185 __le16 id; 186 u8 data[]; 187 } __packed; 188 189 /* Bluetooth SAR feature (BRDS), Revision 1 */ 190 struct btintel_sar_inc_pwr { 191 u8 revision; 192 u32 bt_sar_bios; /* Mode of SAR control to be used, 1:enabled in bios */ 193 u32 inc_power_mode; /* Increased power mode */ 194 u8 sar_2400_chain_a; /* Sar power restriction LB */ 195 u8 br; 196 u8 edr2; 197 u8 edr3; 198 u8 le; 199 u8 le_2mhz; 200 u8 le_lr; 201 }; 202 203 #define INTEL_HW_PLATFORM(cnvx_bt) ((u8)(((cnvx_bt) & 0x0000ff00) >> 8)) 204 #define INTEL_HW_VARIANT(cnvx_bt) ((u8)(((cnvx_bt) & 0x003f0000) >> 16)) 205 #define INTEL_CNVX_TOP_TYPE(cnvx_top) ((cnvx_top) & 0x00000fff) 206 #define INTEL_CNVX_TOP_STEP(cnvx_top) (((cnvx_top) & 0x0f000000) >> 24) 207 #define INTEL_CNVX_TOP_PACK_SWAB(t, s) __swab16(((__u16)(((t) << 4) | (s)))) 208 209 enum { 210 INTEL_BOOTLOADER, 211 INTEL_DOWNLOADING, 212 INTEL_FIRMWARE_LOADED, 213 INTEL_FIRMWARE_FAILED, 214 INTEL_BOOTING, 215 INTEL_BROKEN_INITIAL_NCMD, 216 INTEL_BROKEN_SHUTDOWN_LED, 217 INTEL_ROM_LEGACY, 218 INTEL_ROM_LEGACY_NO_WBS_SUPPORT, 219 INTEL_ACPI_RESET_ACTIVE, 220 INTEL_WAIT_FOR_D0, 221 222 __INTEL_NUM_FLAGS, 223 }; 224 225 struct btintel_data { 226 DECLARE_BITMAP(flags, __INTEL_NUM_FLAGS); 227 int (*acpi_reset_method)(struct hci_dev *hdev); 228 }; 229 230 #define btintel_set_flag(hdev, nr) \ 231 do { \ 232 struct btintel_data *intel = hci_get_priv((hdev)); \ 233 set_bit((nr), intel->flags); \ 234 } while (0) 235 236 #define btintel_clear_flag(hdev, nr) \ 237 do { \ 238 struct btintel_data *intel = hci_get_priv((hdev)); \ 239 clear_bit((nr), intel->flags); \ 240 } while (0) 241 242 #define btintel_wake_up_flag(hdev, nr) \ 243 do { \ 244 struct btintel_data *intel = hci_get_priv((hdev)); \ 245 wake_up_bit(intel->flags, (nr)); \ 246 } while (0) 247 248 #define btintel_get_flag(hdev) \ 249 (((struct btintel_data *)hci_get_priv(hdev))->flags) 250 251 #define btintel_test_flag(hdev, nr) test_bit((nr), btintel_get_flag(hdev)) 252 #define btintel_test_and_clear_flag(hdev, nr) test_and_clear_bit((nr), btintel_get_flag(hdev)) 253 #define btintel_wait_on_flag_timeout(hdev, nr, m, to) \ 254 wait_on_bit_timeout(btintel_get_flag(hdev), (nr), m, to) 255 256 #if IS_ENABLED(CONFIG_BT_INTEL) || IS_ENABLED(CONFIG_BT_INTEL_PCIE) 257 258 int btintel_check_bdaddr(struct hci_dev *hdev); 259 int btintel_enter_mfg(struct hci_dev *hdev); 260 int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched); 261 int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr); 262 int btintel_set_diag(struct hci_dev *hdev, bool enable); 263 264 int btintel_version_info(struct hci_dev *hdev, struct intel_version *ver); 265 int btintel_load_ddc_config(struct hci_dev *hdev, const char *ddc_name); 266 int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug); 267 int btintel_read_version(struct hci_dev *hdev, struct intel_version *ver); 268 struct regmap *btintel_regmap_init(struct hci_dev *hdev, u16 opcode_read, 269 u16 opcode_write); 270 int btintel_send_intel_reset(struct hci_dev *hdev, u32 boot_param); 271 int btintel_read_boot_params(struct hci_dev *hdev, 272 struct intel_boot_params *params); 273 int btintel_download_firmware(struct hci_dev *dev, struct intel_version *ver, 274 const struct firmware *fw, u32 *boot_param); 275 int btintel_configure_setup(struct hci_dev *hdev, const char *driver_name); 276 int btintel_recv_event(struct hci_dev *hdev, struct sk_buff *skb); 277 void btintel_bootup(struct hci_dev *hdev, const void *ptr, unsigned int len); 278 void btintel_secure_send_result(struct hci_dev *hdev, 279 const void *ptr, unsigned int len); 280 int btintel_set_quality_report(struct hci_dev *hdev, bool enable); 281 int btintel_version_info_tlv(struct hci_dev *hdev, 282 struct intel_version_tlv *version); 283 int btintel_parse_version_tlv(struct hci_dev *hdev, 284 struct intel_version_tlv *version, 285 struct sk_buff *skb); 286 void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant); 287 int btintel_bootloader_setup_tlv(struct hci_dev *hdev, 288 struct intel_version_tlv *ver); 289 int btintel_shutdown_combined(struct hci_dev *hdev); 290 void btintel_hw_error(struct hci_dev *hdev, u8 code); 291 void btintel_print_fseq_info(struct hci_dev *hdev); 292 #else 293 294 static inline int btintel_check_bdaddr(struct hci_dev *hdev) 295 { 296 return -EOPNOTSUPP; 297 } 298 299 static inline int btintel_enter_mfg(struct hci_dev *hdev) 300 { 301 return -EOPNOTSUPP; 302 } 303 304 static inline int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched) 305 { 306 return -EOPNOTSUPP; 307 } 308 309 static inline int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr) 310 { 311 return -EOPNOTSUPP; 312 } 313 314 static inline int btintel_set_diag(struct hci_dev *hdev, bool enable) 315 { 316 return -EOPNOTSUPP; 317 } 318 319 static inline int btintel_version_info(struct hci_dev *hdev, 320 struct intel_version *ver) 321 { 322 return -EOPNOTSUPP; 323 } 324 325 static inline int btintel_load_ddc_config(struct hci_dev *hdev, 326 const char *ddc_name) 327 { 328 return -EOPNOTSUPP; 329 } 330 331 static inline int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug) 332 { 333 return -EOPNOTSUPP; 334 } 335 336 static inline int btintel_read_version(struct hci_dev *hdev, 337 struct intel_version *ver) 338 { 339 return -EOPNOTSUPP; 340 } 341 342 static inline struct regmap *btintel_regmap_init(struct hci_dev *hdev, 343 u16 opcode_read, 344 u16 opcode_write) 345 { 346 return ERR_PTR(-EINVAL); 347 } 348 349 static inline int btintel_send_intel_reset(struct hci_dev *hdev, 350 u32 reset_param) 351 { 352 return -EOPNOTSUPP; 353 } 354 355 static inline int btintel_read_boot_params(struct hci_dev *hdev, 356 struct intel_boot_params *params) 357 { 358 return -EOPNOTSUPP; 359 } 360 361 static inline int btintel_download_firmware(struct hci_dev *dev, 362 const struct firmware *fw, 363 u32 *boot_param) 364 { 365 return -EOPNOTSUPP; 366 } 367 368 static inline int btintel_configure_setup(struct hci_dev *hdev, 369 const char *driver_name) 370 { 371 return -ENODEV; 372 } 373 374 static inline void btintel_bootup(struct hci_dev *hdev, 375 const void *ptr, unsigned int len) 376 { 377 } 378 379 static inline void btintel_secure_send_result(struct hci_dev *hdev, 380 const void *ptr, unsigned int len) 381 { 382 } 383 384 static inline int btintel_set_quality_report(struct hci_dev *hdev, bool enable) 385 { 386 return -ENODEV; 387 } 388 389 static inline int btintel_version_info_tlv(struct hci_dev *hdev, 390 struct intel_version_tlv *version) 391 { 392 return -EOPNOTSUPP; 393 } 394 395 static inline int btintel_parse_version_tlv(struct hci_dev *hdev, 396 struct intel_version_tlv *version, 397 struct sk_buff *skb) 398 { 399 return -EOPNOTSUPP; 400 } 401 402 static inline void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant) 403 404 { 405 } 406 407 static inline int btintel_bootloader_setup_tlv(struct hci_dev *hdev, 408 struct intel_version_tlv *ver) 409 { 410 return -ENODEV; 411 } 412 413 static inline int btintel_shutdown_combined(struct hci_dev *hdev) 414 { 415 return -ENODEV; 416 } 417 418 static inline void btintel_hw_error(struct hci_dev *hdev, u8 code) 419 { 420 } 421 422 static inline void btintel_print_fseq_info(struct hci_dev *hdev) 423 { 424 } 425 #endif 426