Searched defs:IDX (Results 1 – 4 of 4) sorted by relevance
| /qemu/target/hexagon/mmvec/ |
| H A D | macros.h | 50 #define LOG_VTCM_BYTE(VA, MASK, VAL, IDX) \ argument
73 #define fGENMASKW(QREG, IDX) \ argument
78 #define fGETNIBBLE(IDX, SRC) (fSXTN(4, 8, (SRC >> (4 * IDX)) & 0xF)) argument
79 #define fGETCRUMB(IDX, SRC) (fSXTN(2, 8, (SRC >> (2 * IDX)) & 0x3)) argument
80 #define fGETCRUMB_SYMMETRIC(IDX, SRC) \ argument
83 #define fGENMASKH(QREG, IDX) \ argument
86 #define fGETMASKW(VREG, QREG, IDX) (VREG.w[IDX] & fGENMASKW((QREG), IDX)) argument
87 #define fGETMASKH(VREG, QREG, IDX) (VREG.h[IDX] & fGENMASKH((QREG), IDX)) argument
88 #define fCONDMASK8(QREG, IDX, YESVAL, NOVAL) \ argument
90 #define fCONDMASK16(QREG, IDX, YESVAL, NOVAL) \ argument
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| /qemu/tests/tcg/hexagon/ |
| H A D | load_align.c | 87 #define LOAD_ur(SZ, RES, SHIFT, IDX) \ argument
92 #define LOAD_ur_b(RES, SHIFT, IDX) \ argument
94 #define LOAD_ur_h(RES, SHIFT, IDX) \ argument
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| H A D | load_unpack.c | 96 #define BxW_LOAD_ur(SZ, RES, SHIFT, IDX) \ argument
101 #define BxW_LOAD_ur_Z(RES, SHIFT, IDX) \ argument
103 #define BxW_LOAD_ur_S(RES, SHIFT, IDX) \ argument
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| /qemu/target/ppc/ |
| H A D | int_helper.c | 1691 #define ELEM_ADDR(VEC, IDX, SIZE) (&(VEC)->u8[IDX]) argument
1693 #define ELEM_ADDR(VEC, IDX, SIZE) (&(VEC)->u8[15 - (IDX)] - (SIZE) + 1) argument
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