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Searched defs:HS1 (Results 1 – 2 of 2) sorted by relevance

/qemu/target/riscv/ !
H A Dvector_internals.h182 #define OPIVV2(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ argument
H A Dvector_helper.c1333 #define GEN_VEXT_SHIFT_VV(NAME, TS1, TS2, HS1, HS2, OP, MASK) \ argument
1931 #define OPIVV3(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ argument
2182 #define OPIVV2_RM(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ argument
3102 #define OPFVV2(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ in RVVCALL() argument
3383 #define OPFVV3(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ in RVVCALL() argument
5282 #define GEN_VEXT_VRGATHER_VV(NAME, TS1, TS2, HS1, HS2) \ argument
5427 #define GEN_VEXT_INT_EXT(NAME, ETYPE, DTYPE, HD, HS1) \ argument