| /qemu/target/arm/tcg/ |
| H A D | sve_ldst_internal.h | 42 #define DO_LD_HOST(NAME, H, TYPEE, TYPEM, HOST) \ argument
46 #define DO_ST_HOST(NAME, H, TYPEE, TYPEM, HOST) \ argument
50 #define DO_LD_TLB(NAME, H, TYPEE, TYPEM, TLB) \ argument
58 #define DO_ST_TLB(NAME, H, TYPEE, TYPEM, TLB) \ argument
66 #define DO_LD_PRIM_1(NAME, H, TE, TM) \ argument
78 #define DO_ST_PRIM_1(NAME, H, TE, TM) \ argument
87 #define DO_LD_PRIM_2(NAME, H, TE, TM, LD) \ argument
93 #define DO_ST_PRIM_2(NAME, H, TE, TM, ST) \ argument
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| H A D | sve_helper.c | 173 #define DO_ZPZZ(NAME, TYPE, H, OP) \ in LOGICAL_PPPP() argument
668 #define DO_ZPZZ_PAIR(NAME, TYPE, H, OP) \ in DO_ZPZZ() argument
738 #define DO_ZPZZ_PAIR_FP(NAME, TYPE, H, OP) \ argument
788 #define DO_ZPZW(NAME, TYPE, TYPEW, H, OP) \ argument
821 #define DO_ZPZ(NAME, TYPE, H, OP) \ argument
1003 #define DO_ZZW(NAME, TYPE, TYPEW, H, OP) \ argument
1147 #define DO_ZZZ_NTB(NAME, TYPE, H, OP) \ argument
1219 #define DO_XTNT(NAME, TYPE, TYPEN, H, OP) \ argument
1328 #define DO_CMLA_FUNC(NAME, TYPE, H, OP) \ in DO_SQDMLAL() argument
1367 #define DO_CMLA_IDX_FUNC(NAME, TYPE, H, OP) \ argument
[all …]
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| H A D | sme_helper.c | 98 #define DO_MOVA_C(NAME, TYPE, H) \ argument
155 #define DO_MOVA_Z(NAME, TYPE, H) \ argument
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| H A D | vec_helper.c | 1635 #define DO_MUL_IDX(NAME, TYPE, H) \ in DO_MULADD() argument
1657 #define DO_MLA_IDX(NAME, TYPE, OP, H) \ argument
1683 #define DO_FMUL_IDX(NAME, ADD, MUL, TYPE, H) \ argument
1727 #define DO_FMLA_IDX(NAME, TYPE, H, NEGX, NEGF) \ argument
2536 #define DO_3OP_PAIR(NAME, FUNC, TYPE, H) \ argument
2588 #define DO_3OP_PAIR(NAME, FUNC, TYPE, H) \ argument
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| /qemu/target/riscv/ |
| H A D | vector_helper.c | 170 #define GEN_VEXT_LD_ELEM(NAME, ETYPE, H, LDSUF) \ argument
191 #define GEN_VEXT_ST_ELEM(NAME, ETYPE, H, STSUF) \ in GEN_VEXT_LD_ELEM() argument
538 #define GEN_VEXT_GET_INDEX_ADDR(NAME, ETYPE, H) \ argument
1125 #define GEN_VEXT_VADC_VVM(NAME, ETYPE, H, DO_OP) \ in RVVCALL() argument
1160 #define GEN_VEXT_VADC_VXM(NAME, ETYPE, H, DO_OP) \ argument
1197 #define GEN_VEXT_VMADC_VVM(NAME, ETYPE, H, DO_OP) \ argument
1237 #define GEN_VEXT_VMADC_VXM(NAME, ETYPE, H, DO_OP) \ argument
1447 #define GEN_VEXT_CMP_VV(NAME, ETYPE, H, DO_OP) \ argument
1514 #define GEN_VEXT_CMP_VX(NAME, ETYPE, H, DO_OP) \ argument
2064 #define GEN_VEXT_VMV_VV(NAME, ETYPE, H) \ argument
[all …]
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| H A D | vcrypto_helper.c | 808 uint64_t H[2] = {brev8(vs2[i * 2 + 0]), brev8(vs2[i * 2 + 1])}; in HELPER() local
847 uint64_t H[2] = {brev8(vs2[i * 2 + 0]), brev8(vs2[i * 2 + 1])}; in HELPER() local
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| /qemu/target/loongarch/ |
| H A D | vec.h | 13 #define H(x) H[(x) ^ 7] macro
23 #define H(x) H[x] macro
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| H A D | cpu.h | 262 int16_t H[LASX_LEN / 16]; member
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| /qemu/target/avr/ |
| H A D | translate.c | 1434 static void gen_set_addr(TCGv addr, TCGv H, TCGv M, TCGv L) in gen_set_addr()
1460 static TCGv gen_get_addr(TCGv H, TCGv M, TCGv L) in gen_get_addr()
1588 TCGv H = cpu_rampD; in trans_LDS() local
1792 TCGv H = cpu_rampD; in trans_STS() local
1987 TCGv H = cpu_r[31]; in trans_LPM1() local
2004 TCGv H = cpu_r[31]; in trans_LPM2() local
2021 TCGv H = cpu_r[31]; in trans_LPMX() local
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| /qemu/target/loongarch/tcg/ |
| H A D | vec_helper.c | 1808 SSRLRNS(B, H, uint16_t, int16_t, uint8_t) in SSRLRNS() argument
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| /qemu/target/i386/ |
| H A D | ops_sse.h | 2621 uint32_t H = a->L(0); in helper_sha256rnds2() local
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