1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 * Google virtual Ethernet (gve) driver
3 *
4 * Copyright (C) 2015-2021 Google, Inc.
5 */
6
7 #ifndef _GVE_DQO_H_
8 #define _GVE_DQO_H_
9
10 #include "gve_adminq.h"
11
12 #define GVE_ITR_ENABLE_BIT_DQO BIT(0)
13 #define GVE_ITR_CLEAR_PBA_BIT_DQO BIT(1)
14 #define GVE_ITR_NO_UPDATE_DQO (3 << 3)
15
16 #define GVE_ITR_INTERVAL_DQO_SHIFT 5
17 #define GVE_ITR_INTERVAL_DQO_MASK ((1 << 12) - 1)
18
19 #define GVE_TX_IRQ_RATELIMIT_US_DQO 50
20 #define GVE_RX_IRQ_RATELIMIT_US_DQO 20
21 #define GVE_MAX_ITR_INTERVAL_DQO (GVE_ITR_INTERVAL_DQO_MASK * 2)
22
23 /* Timeout in seconds to wait for a reinjection completion after receiving
24 * its corresponding miss completion.
25 */
26 #define GVE_REINJECT_COMPL_TIMEOUT 1
27
28 /* Timeout in seconds to deallocate the completion tag for a packet that was
29 * prematurely freed for not receiving a valid completion. This should be large
30 * enough to rule out the possibility of receiving the corresponding valid
31 * completion after this interval.
32 */
33 #define GVE_DEALLOCATE_COMPL_TIMEOUT 60
34
35 netdev_tx_t gve_tx_dqo(struct sk_buff *skb, struct net_device *dev);
36 netdev_features_t gve_features_check_dqo(struct sk_buff *skb,
37 struct net_device *dev,
38 netdev_features_t features);
39 bool gve_tx_poll_dqo(struct gve_notify_block *block, bool do_clean);
40 bool gve_xdp_poll_dqo(struct gve_notify_block *block);
41 bool gve_xsk_tx_poll_dqo(struct gve_notify_block *block, int budget);
42 int gve_rx_poll_dqo(struct gve_notify_block *block, int budget);
43 int gve_tx_alloc_rings_dqo(struct gve_priv *priv,
44 struct gve_tx_alloc_rings_cfg *cfg);
45 void gve_tx_free_rings_dqo(struct gve_priv *priv,
46 struct gve_tx_alloc_rings_cfg *cfg);
47 void gve_tx_start_ring_dqo(struct gve_priv *priv, int idx);
48 void gve_tx_stop_ring_dqo(struct gve_priv *priv, int idx);
49 int gve_rx_alloc_ring_dqo(struct gve_priv *priv,
50 struct gve_rx_alloc_rings_cfg *cfg,
51 struct gve_rx_ring *rx,
52 int idx);
53 void gve_rx_free_ring_dqo(struct gve_priv *priv, struct gve_rx_ring *rx,
54 struct gve_rx_alloc_rings_cfg *cfg);
55 int gve_rx_alloc_rings_dqo(struct gve_priv *priv,
56 struct gve_rx_alloc_rings_cfg *cfg);
57 void gve_rx_free_rings_dqo(struct gve_priv *priv,
58 struct gve_rx_alloc_rings_cfg *cfg);
59 void gve_rx_start_ring_dqo(struct gve_priv *priv, int idx);
60 void gve_rx_stop_ring_dqo(struct gve_priv *priv, int idx);
61 int gve_clean_tx_done_dqo(struct gve_priv *priv, struct gve_tx_ring *tx,
62 struct napi_struct *napi);
63 void gve_rx_post_buffers_dqo(struct gve_rx_ring *rx);
64 void gve_rx_write_doorbell_dqo(const struct gve_priv *priv, int queue_idx);
65 void gve_xdp_tx_flush_dqo(struct gve_priv *priv, u32 xdp_qid);
66
67 static inline void
gve_tx_put_doorbell_dqo(const struct gve_priv * priv,const struct gve_queue_resources * q_resources,u32 val)68 gve_tx_put_doorbell_dqo(const struct gve_priv *priv,
69 const struct gve_queue_resources *q_resources, u32 val)
70 {
71 u64 index;
72
73 index = be32_to_cpu(q_resources->db_index);
74 iowrite32(val, &priv->db_bar2[index]);
75 }
76
77 /* Builds register value to write to DQO IRQ doorbell to enable with specified
78 * ITR interval.
79 */
gve_setup_itr_interval_dqo(u32 interval_us)80 static inline u32 gve_setup_itr_interval_dqo(u32 interval_us)
81 {
82 u32 result = GVE_ITR_ENABLE_BIT_DQO;
83
84 /* Interval has 2us granularity. */
85 interval_us >>= 1;
86
87 interval_us &= GVE_ITR_INTERVAL_DQO_MASK;
88 result |= (interval_us << GVE_ITR_INTERVAL_DQO_SHIFT);
89
90 return result;
91 }
92
93 static inline void
gve_write_irq_doorbell_dqo(const struct gve_priv * priv,const struct gve_notify_block * block,u32 val)94 gve_write_irq_doorbell_dqo(const struct gve_priv *priv,
95 const struct gve_notify_block *block, u32 val)
96 {
97 u32 index = be32_to_cpu(*block->irq_db_index);
98
99 iowrite32(val, &priv->db_bar2[index]);
100 }
101
102 /* Sets interrupt throttling interval and enables interrupt
103 * by writing to IRQ doorbell.
104 */
105 static inline void
gve_set_itr_coalesce_usecs_dqo(struct gve_priv * priv,struct gve_notify_block * block,u32 usecs)106 gve_set_itr_coalesce_usecs_dqo(struct gve_priv *priv,
107 struct gve_notify_block *block,
108 u32 usecs)
109 {
110 gve_write_irq_doorbell_dqo(priv, block,
111 gve_setup_itr_interval_dqo(usecs));
112 }
113
114 int gve_napi_poll_dqo(struct napi_struct *napi, int budget);
115 #endif /* _GVE_DQO_H_ */
116