1 /* 2 * Copyright (C) 2016, Red Hat Inc, Andrew Jones <drjones@redhat.com> 3 * 4 * This work is licensed under the terms of the GNU LGPL, version 2. 5 */ 6 #ifndef _ASMARM_GIC_H_ 7 #define _ASMARM_GIC_H_ 8 9 #define GIC_NR_PRIVATE_IRQS 32 10 #define GIC_FIRST_SPI GIC_NR_PRIVATE_IRQS 11 12 /* Distributor registers */ 13 #define GICD_CTLR 0x0000 14 #define GICD_TYPER 0x0004 15 #define GICD_IIDR 0x0008 16 #define GICD_TYPER2 0x000C 17 #define GICD_IGROUPR 0x0080 18 #define GICD_ISENABLER 0x0100 19 #define GICD_ICENABLER 0x0180 20 #define GICD_ISPENDR 0x0200 21 #define GICD_ICPENDR 0x0280 22 #define GICD_ISACTIVER 0x0300 23 #define GICD_ICACTIVER 0x0380 24 #define GICD_IPRIORITYR 0x0400 25 #define GICD_ITARGETSR 0x0800 26 #define GICD_SGIR 0x0f00 27 #define GICD_ICPIDR2 0x0fe8 28 29 #define GICD_TYPER_IRQS(typer) ((((typer) & 0x1f) + 1) * 32) 30 #define GICD_INT_EN_SET_SGI 0x0000ffff 31 #define GICD_INT_DEF_PRI_X4 0xa0a0a0a0 32 33 /* CPU interface registers */ 34 #define GICC_CTLR 0x0000 35 #define GICC_PMR 0x0004 36 #define GICC_IAR 0x000c 37 #define GICC_EOIR 0x0010 38 39 #define GICC_INT_PRI_THRESHOLD 0xf0 40 #define GICC_INT_SPURIOUS 0x3ff 41 42 #include <asm/gic-v2.h> 43 #include <asm/gic-v3.h> 44 #include <asm/gic-v3-its.h> 45 46 #define PPI(irq) ((irq) + 16) 47 #define SPI(irq) ((irq) + GIC_FIRST_SPI) 48 49 #ifndef __ASSEMBLER__ 50 #include <cpumask.h> 51 52 enum gic_irq_state { 53 GIC_IRQ_STATE_INACTIVE, 54 GIC_IRQ_STATE_PENDING, 55 GIC_IRQ_STATE_ACTIVE, 56 GIC_IRQ_STATE_ACTIVE_PENDING, 57 }; 58 59 /* 60 * gic_init will try to find all known gics, and then 61 * initialize the gic data for the one found. 62 * returns 63 * 0 : no gic was found 64 * > 0 : the gic version of the gic found 65 */ 66 extern int gic_init(void); 67 68 /* 69 * gic_enable_defaults enables the gic with basic but useful 70 * settings. gic_enable_defaults will call gic_init if it has 71 * not yet been invoked. 72 */ 73 extern void gic_enable_defaults(void); 74 75 /* 76 * After enabling the gic with gic_enable_defaults the functions 77 * below will work with any supported gic version. 78 */ 79 extern int gic_version(void); 80 extern u32 gic_read_iar(void); 81 extern u32 gic_iar_irqnr(u32 iar); 82 extern void gic_write_eoir(u32 irqstat); 83 extern void gic_ipi_send_single(int irq, int cpu); 84 extern void gic_ipi_send_mask(int irq, const cpumask_t *dest); 85 extern enum gic_irq_state gic_irq_state(int irq); 86 87 void gic_irq_set_clr_enable(int irq, bool enable); 88 #define gic_enable_irq(irq) gic_irq_set_clr_enable(irq, true) 89 #define gic_disable_irq(irq) gic_irq_set_clr_enable(irq, false) 90 91 #endif /* !__ASSEMBLER__ */ 92 #endif /* _ASMARM_GIC_H_ */ 93