xref: /linux/drivers/gpu/drm/amd/display/dc/inc/resource.h (revision ab93e0dd72c37d378dd936f031ffb83ff2bd87ce)
1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  */
24 
25 #ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
26 #define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
27 
28 #include "core_types.h"
29 #include "core_status.h"
30 #include "dal_asic_id.h"
31 #include "dm_pp_smu.h"
32 
33 #define MEMORY_TYPE_MULTIPLIER_CZ 4
34 #define MEMORY_TYPE_HBM 2
35 #define MAX_MCACHES 8
36 
37 
38 #define IS_PIPE_SYNCD_VALID(pipe) ((((pipe)->pipe_idx_syncd) & 0x80)?1:0)
39 #define GET_PIPE_SYNCD_FROM_PIPE(pipe) ((pipe)->pipe_idx_syncd & 0x7F)
40 #define SET_PIPE_SYNCD_TO_PIPE(pipe, pipe_syncd) ((pipe)->pipe_idx_syncd = (0x80 | pipe_syncd))
41 
42 enum dce_version resource_parse_asic_id(
43 		struct hw_asic_id asic_id);
44 
45 struct resource_caps {
46 	int num_timing_generator;
47 	int num_opp;
48 	int num_video_plane;
49 	int num_audio;
50 	int num_stream_encoder;
51 	int num_pll;
52 	int num_dwb;
53 	int num_ddc;
54 	int num_vmid;
55 	int num_dsc;
56 	unsigned int num_dig_link_enc; // Total number of DIGs (digital encoders) in DIO (Display Input/Output).
57 	unsigned int num_usb4_dpia; // Total number of USB4 DPIA (DisplayPort Input Adapters).
58 	int num_hpo_dp_stream_encoder;
59 	int num_hpo_dp_link_encoder;
60 	int num_mpc_3dlut;
61 };
62 
63 struct resource_straps {
64 	uint32_t hdmi_disable;
65 	uint32_t dc_pinstraps_audio;
66 	uint32_t audio_stream_number;
67 };
68 
69 struct dc_mcache_allocations {
70 	int global_mcache_ids_plane0[MAX_MCACHES + 1];
71 	int global_mcache_ids_plane1[MAX_MCACHES + 1];
72 	int global_mcache_ids_mall_plane0[MAX_MCACHES + 1];
73 	int global_mcache_ids_mall_plane1[MAX_MCACHES + 1];
74 };
75 
76 struct resource_create_funcs {
77 	void (*read_dce_straps)(
78 			struct dc_context *ctx, struct resource_straps *straps);
79 
80 	struct audio *(*create_audio)(
81 			struct dc_context *ctx, unsigned int inst);
82 
83 	struct stream_encoder *(*create_stream_encoder)(
84 			enum engine_id eng_id, struct dc_context *ctx);
85 
86 	struct hpo_dp_stream_encoder *(*create_hpo_dp_stream_encoder)(
87 			enum engine_id eng_id, struct dc_context *ctx);
88 	struct hpo_dp_link_encoder *(*create_hpo_dp_link_encoder)(
89 			uint8_t inst,
90 			struct dc_context *ctx);
91 	struct dce_hwseq *(*create_hwseq)(
92 			struct dc_context *ctx);
93 };
94 
95 bool resource_construct(
96 	unsigned int num_virtual_links,
97 	struct dc *dc,
98 	struct resource_pool *pool,
99 	const struct resource_create_funcs *create_funcs);
100 
101 struct resource_pool *dc_create_resource_pool(struct dc  *dc,
102 					      const struct dc_init_data *init_data,
103 					      enum dce_version dc_version);
104 
105 void dc_destroy_resource_pool(struct dc *dc);
106 
107 enum dc_status resource_map_pool_resources(
108 		const struct dc *dc,
109 		struct dc_state *context,
110 		struct dc_stream_state *stream);
111 
112 void resource_build_test_pattern_params(
113 		struct resource_context *res_ctx,
114 		struct pipe_ctx *pipe_ctx);
115 
116 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx);
117 
118 enum dc_status resource_build_scaling_params_for_context(
119 		const struct dc *dc,
120 		struct dc_state *context);
121 
122 void resource_build_info_frame(struct pipe_ctx *pipe_ctx);
123 
124 void resource_unreference_clock_source(
125 		struct resource_context *res_ctx,
126 		const struct resource_pool *pool,
127 		struct clock_source *clock_source);
128 
129 void resource_reference_clock_source(
130 		struct resource_context *res_ctx,
131 		const struct resource_pool *pool,
132 		struct clock_source *clock_source);
133 
134 int resource_get_clock_source_reference(
135 		struct resource_context *res_ctx,
136 		const struct resource_pool *pool,
137 		struct clock_source *clock_source);
138 
139 bool resource_are_streams_timing_synchronizable(
140 		struct dc_stream_state *stream1,
141 		struct dc_stream_state *stream2);
142 
143 bool resource_are_vblanks_synchronizable(
144 		struct dc_stream_state *stream1,
145 		struct dc_stream_state *stream2);
146 
147 struct clock_source *resource_find_used_clk_src_for_sharing(
148 		struct resource_context *res_ctx,
149 		struct pipe_ctx *pipe_ctx);
150 
151 struct clock_source *dc_resource_find_first_free_pll(
152 		struct resource_context *res_ctx,
153 		const struct resource_pool *pool);
154 
155 bool resource_attach_surfaces_to_context(
156 		struct dc_plane_state *const *plane_state,
157 		int surface_count,
158 		struct dc_stream_state *dc_stream,
159 		struct dc_state *context,
160 		const struct resource_pool *pool);
161 
162 bool resource_can_pipe_disable_cursor(struct pipe_ctx *pipe_ctx);
163 
164 #define FREE_PIPE_INDEX_NOT_FOUND -1
165 
166 /*
167  * pipe types are identified based on MUXes in DCN front end that are capable
168  * of taking input from one DCN pipeline to another DCN pipeline. The name is
169  * in a form of XXXX_YYYY, where XXXX is the DCN front end hardware block the
170  * pipeline ends with and YYYY is the rendering role that the pipe is in.
171  *
172  * For instance OTG_MASTER is a pipe ending with OTG hardware block in its
173  * pipeline and it is in a role of a master pipe for timing generation.
174  *
175  * For quick reference a diagram of each pipe type's areas of responsibility
176  * for outputting timings on the screen is shown below:
177  *
178  *       Timing Active for Stream 0
179  *        __________________________________________________
180  *       |OTG master 0 (OPP head 0)|OPP head 2 (DPP pipe 2) |
181  *       |             (DPP pipe 0)|                        |
182  *       | Top Plane 0             |                        |
183  *       |           ______________|____                    |
184  *       |          |DPP pipe 1    |DPP |                   |
185  *       |          |              |pipe|                   |
186  *       |          |  Bottom      |3   |                   |
187  *       |          |  Plane 1     |    |                   |
188  *       |          |              |    |                   |
189  *       |          |______________|____|                   |
190  *       |                         |                        |
191  *       |                         |                        |
192  *       | ODM slice 0             | ODM slice 1            |
193  *       |_________________________|________________________|
194  *
195  *       Timing Active for Stream 1
196  *        __________________________________________________
197  *       |OTG master 4 (OPP head 4)                         |
198  *       |                                                  |
199  *       |                                                  |
200  *       |                                                  |
201  *       |                                                  |
202  *       |                                                  |
203  *       |               Blank Pixel Data                   |
204  *       |              (generated by DPG4)                 |
205  *       |                                                  |
206  *       |                                                  |
207  *       |                                                  |
208  *       |                                                  |
209  *       |                                                  |
210  *       |__________________________________________________|
211  *
212  *       Inter-pipe Relation
213  *        __________________________________________________
214  *       |PIPE IDX|   DPP PIPES   | OPP HEADS | OTG MASTER  |
215  *       |        |  plane 0      | slice 0   |             |
216  *       |   0    | -------------MPC---------ODM----------- |
217  *       |        |  plane 1    | |         | |             |
218  *       |   1    | ------------- |         | |             |
219  *       |        |  plane 0      | slice 1 | |             |
220  *       |   2    | -------------MPC--------- |             |
221  *       |        |  plane 1    | |           |             |
222  *       |   3    | ------------- |           |             |
223  *       |        |               | blank     |             |
224  *       |   4    |               | ----------------------- |
225  *       |        |               |           |             |
226  *       |   5    |  (FREE)       |           |             |
227  *       |________|_______________|___________|_____________|
228  *
229  * The following is a quick reference of the class relation:
230  *
231  *	DC state            ---1--------0..N---           streams
232  *
233  *	stream              ---1-----------1---           OTG Master pipe
234  *
235  *	OTG Master pipe     ---1--------1..N---           OPP Head pipes
236  *
237  *	OPP Head pipe       ---1--------0..N---           DPP pipes
238  *
239  *	stream              ---1--------0..N---           Planes
240  *
241  *	Plane               ---1--------1..N---           DPP pipes
242  *
243  */
244 enum pipe_type {
245 	/* free pipe - free pipe is an uninitialized pipe without a stream
246 	 * associated with it. It is a free DCN pipe resource. It can be
247 	 * acquired as any type of pipe.
248 	 */
249 	FREE_PIPE,
250 
251 	/* OTG master pipe - the master pipe of its OPP head pipes with a
252 	 * functional OTG. It merges all its OPP head pipes pixel data in ODM
253 	 * block and output to back end DIG. OTG master pipe is responsible for
254 	 * generating entire CRTC timing to back end DIG. An OTG master pipe may
255 	 * or may not have a plane. If it has a plane it blends it as the left
256 	 * most MPC slice of the top most layer. If it doesn't have a plane it
257 	 * can output pixel data from its OPP head pipes' test pattern
258 	 * generators (DPG) such as solid black pixel data to blank the screen.
259 	 */
260 	OTG_MASTER,
261 
262 	/* OPP head pipe - the head pipe of an MPC blending tree with a
263 	 * functional OPP outputting to an OTG. OPP head pipe is responsible for
264 	 * processing output pixels in its own ODM slice. It may or may not have
265 	 * a plane. If it has a plane it blends it as the top most layer within
266 	 * its own ODM slice. If it doesn't have a plane it can output pixel
267 	 * data from its DPG such as solid black pixel data to blank the pixel
268 	 * data in its own ODM slice. OTG master pipe is also an OPP head pipe
269 	 * but with more responsibility.
270 	 */
271 	OPP_HEAD,
272 
273 	/* DPP pipe - the pipe with a functional DPP outputting to an OPP head
274 	 * pipe's MPC. DPP pipe is responsible for processing pixel data from
275 	 * its own MPC slice of a plane. It must be connected to an OPP head
276 	 * pipe and it must have a plane associated with it.
277 	 */
278 	DPP_PIPE,
279 };
280 
281 /*
282  * Determine if the input pipe_ctx is of a pipe type.
283  * return - true if pipe_ctx is of the input type.
284  */
285 bool resource_is_pipe_type(const struct pipe_ctx *pipe_ctx, enum pipe_type type);
286 
287 /*
288  * Acquire a pipe as OTG master pipe and allocate pipe resources required to
289  * enable stream output.
290  */
291 enum dc_status resource_add_otg_master_for_stream_output(struct dc_state *new_ctx,
292 		const struct resource_pool *pool,
293 		struct dc_stream_state *stream);
294 
295 /*
296  * Release pipe resources and the OTG master pipe associated with the stream
297  * The stream must have all planes removed and ODM/MPC slice counts are reset
298  * to 1 before invoking this interface.
299  */
300 void resource_remove_otg_master_for_stream_output(struct dc_state *new_ctx,
301 		const struct resource_pool *pool,
302 		struct dc_stream_state *stream);
303 
304 /*
305  * Add plane to the bottom most layer in plane composition and allocate DPP pipe
306  * resources as needed.
307  * return - true if plane is added in plane composition, false otherwise.
308  */
309 bool resource_append_dpp_pipes_for_plane_composition(
310 		struct dc_state *new_ctx,
311 		struct dc_state *cur_ctx,
312 		struct resource_pool *pool,
313 		struct pipe_ctx *otg_master_pipe,
314 		struct dc_plane_state *plane_state);
315 
316 /*
317  * Add plane to the bottom most layer in plane composition and allocate DPP pipe
318  * resources as needed.
319  * return - true if plane is added in plane composition, false otherwise.
320  */
321 void resource_remove_dpp_pipes_for_plane_composition(
322 		struct dc_state *context,
323 		const struct resource_pool *pool,
324 		const struct dc_plane_state *plane_state);
325 
326 /*
327  * Update ODM slice count by acquiring or releasing pipes. If new slices need
328  * to be added, it is going to add them to the last ODM index. If existing
329  * slices need to be removed, it is going to remove them from the last ODM
330  * index.
331  *
332  * return - true if ODM slices are updated and required pipes are acquired. All
333  * affected pipe parameters are updated.
334  *
335  * false if resource fails to complete this update. The function is not designed
336  * to recover the creation of invalid topologies. Returning false is typically
337  * an indication of insufficient validation in caller's stack. new_ctx will be
338  * invalid. Caller may attempt to restore new_ctx by calling this function
339  * again with original slice count.
340  */
341 bool resource_update_pipes_for_stream_with_slice_count(
342 		struct dc_state *new_ctx,
343 		const struct dc_state *cur_ctx,
344 		const struct resource_pool *pool,
345 		const struct dc_stream_state *stream,
346 		int new_slice_count);
347 
348 /*
349  * Update MPC slice count by acquiring or releasing DPP pipes. If new slices
350  * need to be added it is going to add to the last MPC index. If existing
351  * slices need to be removed, it is going to remove them from the last MPC
352  * index.
353  *
354  * @dpp_pipe - top most dpp pipe for MPCC combine.
355  *
356  * return - true if MPC slices are updated and required pipes are acquired. All
357  * affected pipe parameters are updated.
358  *
359  * false if resource fails to complete this update. The function is not designed
360  * to recover the creation of invalid topologies. Returning false is typically
361  * an indication of insufficient validation in caller's stack. new_ctx will be
362  * invalid. Caller may attempt to restore new_ctx by calling this function
363  * again with original slice count.
364  */
365 bool resource_update_pipes_for_plane_with_slice_count(
366 		struct dc_state *new_ctx,
367 		const struct dc_state *cur_ctx,
368 		const struct resource_pool *pool,
369 		const struct dc_plane_state *plane,
370 		int slice_count);
371 
372 /*
373  * Get the OTG master pipe in resource context associated with the stream.
374  * return - NULL if not found. Otherwise the OTG master pipe associated with the
375  * stream.
376  */
377 struct pipe_ctx *resource_get_otg_master_for_stream(
378 		struct resource_context *res_ctx,
379 		const struct dc_stream_state *stream);
380 
381 /*
382  * Get an array of OPP heads in opp_heads ordered with index low to high for OTG
383  * master pipe in res_ctx.
384  * return - number of OPP heads in the array. If otg_master passed in is not
385  * an OTG master, the function returns 0.
386  */
387 int resource_get_opp_heads_for_otg_master(const struct pipe_ctx *otg_master,
388 		struct resource_context *res_ctx,
389 		struct pipe_ctx *opp_heads[MAX_PIPES]);
390 
391 /*
392  * Get an array of DPP pipes in dpp_pipes ordered with index low to high for OPP
393  * head pipe in res_ctx.
394  * return - number of DPP pipes in the array. If opp_head passed in is not
395  * an OPP pipe, the function returns 0.
396  */
397 int resource_get_dpp_pipes_for_opp_head(const struct pipe_ctx *opp_head,
398 		struct resource_context *res_ctx,
399 		struct pipe_ctx *dpp_pipes[MAX_PIPES]);
400 
401 /*
402  * Get an array of DPP pipes in dpp_pipes ordered with index low to high for
403  * plane in res_ctx.
404  * return - number of DPP pipes in the array.
405  */
406 int resource_get_dpp_pipes_for_plane(const struct dc_plane_state *plane,
407 		struct resource_context *res_ctx,
408 		struct pipe_ctx *dpp_pipes[MAX_PIPES]);
409 
410 /*
411  * Get the OTG master pipe for the input pipe context.
412  * return - the OTG master pipe for the input pipe
413  * context.
414  */
415 struct pipe_ctx *resource_get_otg_master(const struct pipe_ctx *pipe_ctx);
416 
417 /*
418  * Get the OPP head pipe for the input pipe context.
419  * return - the OPP head pipe for the input pipe
420  * context.
421  */
422 struct pipe_ctx *resource_get_opp_head(const struct pipe_ctx *pipe_ctx);
423 
424 /*
425  * Get the DPP pipe allocated for MPC slice 0 and ODM slice 0 of the plane
426  * associated with dpp_pipe.
427  */
428 struct pipe_ctx *resource_get_primary_dpp_pipe(const struct pipe_ctx *dpp_pipe);
429 
430 /*
431  * Get the MPC slice index counting from 0 from left most slice
432  * For example, if a DPP pipe is used as a secondary pipe in MPCC combine, MPC
433  * split index is greater than 0.
434  */
435 int resource_get_mpc_slice_index(const struct pipe_ctx *dpp_pipe);
436 
437 /*
438  * Get the number of MPC slices associated with the pipe.
439  * The function returns 0 if the pipe is not associated with an MPC combine
440  * pipe topology.
441  */
442 int resource_get_mpc_slice_count(const struct pipe_ctx *pipe);
443 
444 /*
445  * Get the number of ODM slices associated with the pipe.
446  * The function returns 0 if the pipe is not associated with an ODM combine
447  * pipe topology.
448  */
449 int resource_get_odm_slice_count(const struct pipe_ctx *pipe);
450 
451 /* Get the ODM slice index counting from 0 from left most slice */
452 int resource_get_odm_slice_index(const struct pipe_ctx *opp_head);
453 
454 /* Get ODM slice source rect in timing active as input to OPP block */
455 struct rect resource_get_odm_slice_src_rect(struct pipe_ctx *pipe_ctx);
456 
457 /* Get ODM slice destination rect in timing active as output from OPP block */
458 struct rect resource_get_odm_slice_dst_rect(struct pipe_ctx *pipe_ctx);
459 
460 /* Get ODM slice destination width in timing active as output from OPP block */
461 int resource_get_odm_slice_dst_width(struct pipe_ctx *otg_master,
462 		bool is_last_segment);
463 
464 /* determine if pipe topology is changed between state a and state b */
465 bool resource_is_pipe_topology_changed(const struct dc_state *state_a,
466 		const struct dc_state *state_b);
467 
468 /*
469  * determine if the two OTG master pipes have the same ODM topology
470  * return
471  * false - if pipes passed in are not OTG masters or ODM topology is
472  * changed.
473  * true - otherwise
474  */
475 bool resource_is_odm_topology_changed(const struct pipe_ctx *otg_master_a,
476 		const struct pipe_ctx *otg_master_b);
477 
478 /* log the pipe topology update in state */
479 void resource_log_pipe_topology_update(struct dc *dc, struct dc_state *state);
480 
481 /*
482  * Look for a free pipe in new resource context that is used as a secondary OPP
483  * head by cur_otg_master.
484  *
485  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
486  * pipe idx of the free pipe
487  */
488 int resource_find_free_pipe_used_as_sec_opp_head_by_cur_otg_master(
489 		const struct resource_context *cur_res_ctx,
490 		struct resource_context *new_res_ctx,
491 		const struct pipe_ctx *cur_otg_master);
492 
493 /*
494  * Look for a free pipe in new resource context that is used as a secondary DPP
495  * pipe in MPC blending tree associated with input OPP head pipe.
496  *
497  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
498  * pipe idx of the free pipe
499  */
500 int resource_find_free_pipe_used_in_cur_mpc_blending_tree(
501 		const struct resource_context *cur_res_ctx,
502 		struct resource_context *new_res_ctx,
503 		const struct pipe_ctx *cur_opp_head);
504 
505 /*
506  * Look for a free pipe in new resource context that is not used in current
507  * resource context.
508  *
509  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
510  * pipe idx of the free pipe
511  */
512 int recource_find_free_pipe_not_used_in_cur_res_ctx(
513 		const struct resource_context *cur_res_ctx,
514 		struct resource_context *new_res_ctx,
515 		const struct resource_pool *pool);
516 
517 /*
518  * Look for a free pipe in new resource context that is used in current resource
519  * context as an OTG master pipe.
520  *
521  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
522  * pipe idx of the free pipe
523  */
524 int recource_find_free_pipe_used_as_otg_master_in_cur_res_ctx(
525 		const struct resource_context *cur_res_ctx,
526 		struct resource_context *new_res_ctx,
527 		const struct resource_pool *pool);
528 
529 /*
530  * Look for a free pipe in new resource context that is used as a secondary DPP
531  * pipe in current resource context.
532  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
533  * pipe idx of the free pipe
534  */
535 int resource_find_free_pipe_used_as_cur_sec_dpp(
536 		const struct resource_context *cur_res_ctx,
537 		struct resource_context *new_res_ctx,
538 		const struct resource_pool *pool);
539 
540 /*
541  * Look for a free pipe in new resource context that is used as a secondary DPP
542  * pipe in any MPCC combine in current resource context.
543  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
544  * pipe idx of the free pipe
545  */
546 int resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine(
547 		const struct resource_context *cur_res_ctx,
548 		struct resource_context *new_res_ctx,
549 		const struct resource_pool *pool);
550 
551 /*
552  * Look for any free pipe in new resource context.
553  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
554  * pipe idx of the free pipe
555  */
556 int resource_find_any_free_pipe(struct resource_context *new_res_ctx,
557 		const struct resource_pool *pool);
558 
559 /*
560  * Legacy find free secondary pipe logic deprecated for newer DCNs as it doesn't
561  * find the most optimal free pipe to prevent from time consuming hardware state
562  * transitions.
563  */
564 struct pipe_ctx *resource_find_free_secondary_pipe_legacy(
565 		struct resource_context *res_ctx,
566 		const struct resource_pool *pool,
567 		const struct pipe_ctx *primary_pipe);
568 
569 bool resource_validate_attach_surfaces(
570 		const struct dc_validation_set set[],
571 		int set_count,
572 		const struct dc_state *old_context,
573 		struct dc_state *context,
574 		const struct resource_pool *pool);
575 
576 enum dc_status resource_map_clock_resources(
577 		const struct dc *dc,
578 		struct dc_state *context,
579 		struct dc_stream_state *stream);
580 
581 enum dc_status resource_map_phy_clock_resources(
582 		const struct dc *dc,
583 		struct dc_state *context,
584 		struct dc_stream_state *stream);
585 
586 bool pipe_need_reprogram(
587 		struct pipe_ctx *pipe_ctx_old,
588 		struct pipe_ctx *pipe_ctx);
589 
590 void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,
591 		struct bit_depth_reduction_params *fmt_bit_depth);
592 
593 void update_audio_usage(
594 		struct resource_context *res_ctx,
595 		const struct resource_pool *pool,
596 		struct audio *audio,
597 		bool acquired);
598 
599 unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format);
600 
601 bool get_temp_dp_link_res(struct dc_link *link,
602 		struct link_resource *link_res,
603 		struct dc_link_settings *link_settings);
604 
605 void reset_syncd_pipes_from_disabled_pipes(struct dc *dc,
606 	struct dc_state *context);
607 
608 void check_syncd_pipes_for_disabled_master_pipe(struct dc *dc,
609 	struct dc_state *context,
610 	uint8_t disabled_master_pipe_idx);
611 
612 void reset_sync_context_for_pipe(const struct dc *dc,
613 	struct dc_state *context,
614 	uint8_t pipe_idx);
615 
616 uint8_t resource_transmitter_to_phy_idx(const struct dc *dc, enum transmitter transmitter);
617 
618 const struct link_hwss *get_link_hwss(const struct dc_link *link,
619 		const struct link_resource *link_res);
620 
621 bool is_h_timing_divisible_by_2(struct dc_stream_state *stream);
622 
623 bool dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy(
624 		const struct dc *dc,
625 		struct dc_state *state,
626 		struct pipe_ctx *pri_pipe,
627 		struct pipe_ctx *sec_pipe,
628 		bool odm);
629 
630 /* A test harness interface that modifies dp encoder resources in the given dc
631  * state and bypasses the need to revalidate. The interface assumes that the
632  * test harness interface is called with pre-validated link config stored in the
633  * pipe_ctx and updates dp encoder resources according to the link config.
634  */
635 enum dc_status update_dp_encoder_resources_for_test_harness(const struct dc *dc,
636 		struct dc_state *context,
637 		struct pipe_ctx *pipe_ctx);
638 
639 /* Get hw programming parameters container from pipe context
640  * @pipe_ctx: pipe context
641  * @dscl_prog_data: struct to hold programmable hw reg values
642  */
643 struct dscl_prog_data *resource_get_dscl_prog_data(struct pipe_ctx *pipe_ctx);
644 /* Setup dc callbacks for dml2
645  * @dc: the display core structure
646  * @dml2_options: struct to hold callbacks
647  */
648 void resource_init_common_dml2_callbacks(struct dc *dc, struct dml2_configuration_options *dml2_options);
649 
650 /*
651  *Calculate total DET allocated for all pipes for a given OTG_MASTER pipe
652  */
653 int resource_calculate_det_for_stream(struct dc_state *state, struct pipe_ctx *otg_master);
654 
655 bool resource_is_hpo_acquired(struct dc_state *context);
656 
657 struct link_encoder *get_temp_dio_link_enc(
658 		const struct resource_context *res_ctx,
659 		const struct resource_pool *const pool,
660 		const struct dc_link *link);
661 #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */
662