1 /* 2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #ifndef _MLX5_FS_ 34 #define _MLX5_FS_ 35 36 #include <linux/mlx5/driver.h> 37 #include <linux/mlx5/mlx5_ifc.h> 38 39 #define MLX5_FS_DEFAULT_FLOW_TAG 0x0 40 41 #define MLX5_SET_CFG(p, f, v) MLX5_SET(create_flow_group_in, p, f, v) 42 43 #define MLX5_RDMA_TRANSPORT_BYPASS_PRIO 16 44 #define MLX5_FS_MAX_POOL_SIZE BIT(30) 45 46 enum mlx5_flow_destination_type { 47 MLX5_FLOW_DESTINATION_TYPE_NONE, 48 MLX5_FLOW_DESTINATION_TYPE_VPORT, 49 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE, 50 MLX5_FLOW_DESTINATION_TYPE_TIR, 51 MLX5_FLOW_DESTINATION_TYPE_FLOW_SAMPLER, 52 MLX5_FLOW_DESTINATION_TYPE_UPLINK, 53 MLX5_FLOW_DESTINATION_TYPE_PORT, 54 MLX5_FLOW_DESTINATION_TYPE_COUNTER, 55 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE_NUM, 56 MLX5_FLOW_DESTINATION_TYPE_RANGE, 57 MLX5_FLOW_DESTINATION_TYPE_TABLE_TYPE, 58 MLX5_FLOW_DESTINATION_TYPE_VHCA_RX, 59 }; 60 61 enum { 62 MLX5_FLOW_CONTEXT_ACTION_FWD_NEXT_PRIO = 1 << 16, 63 MLX5_FLOW_CONTEXT_ACTION_ENCRYPT = 1 << 17, 64 MLX5_FLOW_CONTEXT_ACTION_DECRYPT = 1 << 18, 65 MLX5_FLOW_CONTEXT_ACTION_FWD_NEXT_NS = 1 << 19, 66 }; 67 68 enum { 69 MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT = BIT(0), 70 MLX5_FLOW_TABLE_TUNNEL_EN_DECAP = BIT(1), 71 MLX5_FLOW_TABLE_TERMINATION = BIT(2), 72 MLX5_FLOW_TABLE_UNMANAGED = BIT(3), 73 MLX5_FLOW_TABLE_OTHER_VPORT = BIT(4), 74 MLX5_FLOW_TABLE_UPLINK_VPORT = BIT(5), 75 MLX5_FLOW_TABLE_OTHER_ESWITCH = BIT(6), 76 }; 77 78 #define LEFTOVERS_RULE_NUM 2 79 static inline void build_leftovers_ft_param(int *priority, 80 int *n_ent, 81 int *n_grp) 82 { 83 *priority = 0; /* Priority of leftovers_prio-0 */ 84 *n_ent = LEFTOVERS_RULE_NUM; 85 *n_grp = LEFTOVERS_RULE_NUM; 86 } 87 88 enum mlx5_flow_namespace_type { 89 MLX5_FLOW_NAMESPACE_BYPASS, 90 MLX5_FLOW_NAMESPACE_KERNEL_RX_MACSEC, 91 MLX5_FLOW_NAMESPACE_LAG, 92 MLX5_FLOW_NAMESPACE_OFFLOADS, 93 MLX5_FLOW_NAMESPACE_ETHTOOL, 94 MLX5_FLOW_NAMESPACE_KERNEL, 95 MLX5_FLOW_NAMESPACE_LEFTOVERS, 96 MLX5_FLOW_NAMESPACE_ANCHOR, 97 MLX5_FLOW_NAMESPACE_FDB_BYPASS, 98 MLX5_FLOW_NAMESPACE_FDB, 99 MLX5_FLOW_NAMESPACE_ESW_EGRESS, 100 MLX5_FLOW_NAMESPACE_ESW_INGRESS, 101 MLX5_FLOW_NAMESPACE_SNIFFER_RX, 102 MLX5_FLOW_NAMESPACE_SNIFFER_TX, 103 MLX5_FLOW_NAMESPACE_EGRESS, 104 MLX5_FLOW_NAMESPACE_EGRESS_IPSEC, 105 MLX5_FLOW_NAMESPACE_EGRESS_MACSEC, 106 MLX5_FLOW_NAMESPACE_RDMA_RX, 107 MLX5_FLOW_NAMESPACE_RDMA_RX_KERNEL, 108 MLX5_FLOW_NAMESPACE_RDMA_TX, 109 MLX5_FLOW_NAMESPACE_PORT_SEL, 110 MLX5_FLOW_NAMESPACE_RDMA_RX_COUNTERS, 111 MLX5_FLOW_NAMESPACE_RDMA_TX_COUNTERS, 112 MLX5_FLOW_NAMESPACE_RDMA_RX_IPSEC, 113 MLX5_FLOW_NAMESPACE_RDMA_TX_IPSEC, 114 MLX5_FLOW_NAMESPACE_RDMA_RX_MACSEC, 115 MLX5_FLOW_NAMESPACE_RDMA_TX_MACSEC, 116 MLX5_FLOW_NAMESPACE_RDMA_TRANSPORT_RX, 117 MLX5_FLOW_NAMESPACE_RDMA_TRANSPORT_TX, 118 }; 119 120 enum { 121 FDB_DROP_ROOT, 122 FDB_BYPASS_PATH, 123 FDB_CRYPTO_INGRESS, 124 FDB_TC_OFFLOAD, 125 FDB_FT_OFFLOAD, 126 FDB_TC_MISS, 127 FDB_BR_OFFLOAD, 128 FDB_SLOW_PATH, 129 FDB_CRYPTO_EGRESS, 130 FDB_PER_VPORT, 131 }; 132 133 enum fs_flow_table_type { 134 FS_FT_NIC_RX = 0x0, 135 FS_FT_NIC_TX = 0x1, 136 FS_FT_ESW_EGRESS_ACL = 0x2, 137 FS_FT_ESW_INGRESS_ACL = 0x3, 138 FS_FT_FDB = 0X4, 139 FS_FT_SNIFFER_RX = 0X5, 140 FS_FT_SNIFFER_TX = 0X6, 141 FS_FT_RDMA_RX = 0X7, 142 FS_FT_RDMA_TX = 0X8, 143 FS_FT_PORT_SEL = 0X9, 144 FS_FT_FDB_RX = 0xa, 145 FS_FT_FDB_TX = 0xb, 146 FS_FT_RDMA_TRANSPORT_RX = 0xd, 147 FS_FT_RDMA_TRANSPORT_TX = 0xe, 148 FS_FT_MAX_TYPE = FS_FT_RDMA_TRANSPORT_TX, 149 }; 150 151 struct mlx5_pkt_reformat; 152 struct mlx5_modify_hdr; 153 struct mlx5_flow_definer; 154 struct mlx5_flow_table; 155 struct mlx5_flow_group; 156 struct mlx5_flow_namespace; 157 struct mlx5_flow_handle; 158 159 enum { 160 FLOW_CONTEXT_HAS_TAG = BIT(0), 161 FLOW_CONTEXT_UPLINK_HAIRPIN_EN = BIT(1), 162 }; 163 164 struct mlx5_flow_context { 165 u32 flags; 166 u32 flow_tag; 167 u32 flow_source; 168 }; 169 170 struct mlx5_flow_spec { 171 u8 match_criteria_enable; 172 u32 match_criteria[MLX5_ST_SZ_DW(fte_match_param)]; 173 u32 match_value[MLX5_ST_SZ_DW(fte_match_param)]; 174 struct mlx5_flow_context flow_context; 175 }; 176 177 enum { 178 MLX5_FLOW_DEST_VPORT_VHCA_ID = BIT(0), 179 MLX5_FLOW_DEST_VPORT_REFORMAT_ID = BIT(1), 180 }; 181 182 enum mlx5_flow_dest_range_field { 183 MLX5_FLOW_DEST_RANGE_FIELD_PKT_LEN = 0, 184 }; 185 186 struct mlx5_flow_destination { 187 enum mlx5_flow_destination_type type; 188 union { 189 u32 tir_num; 190 u32 ft_num; 191 struct mlx5_flow_table *ft; 192 struct mlx5_fc *counter; 193 struct { 194 u16 id; 195 } vhca; 196 struct { 197 u16 num; 198 u16 vhca_id; 199 struct mlx5_pkt_reformat *pkt_reformat; 200 u8 flags; 201 } vport; 202 struct { 203 struct mlx5_flow_table *hit_ft; 204 struct mlx5_flow_table *miss_ft; 205 enum mlx5_flow_dest_range_field field; 206 u32 min; 207 u32 max; 208 } range; 209 u32 sampler_id; 210 }; 211 }; 212 213 struct mod_hdr_tbl { 214 struct mutex lock; /* protects hlist */ 215 DECLARE_HASHTABLE(hlist, 8); 216 }; 217 218 struct mlx5_flow_namespace * 219 mlx5_get_fdb_sub_ns(struct mlx5_core_dev *dev, int n); 220 struct mlx5_flow_namespace * 221 mlx5_get_flow_namespace(struct mlx5_core_dev *dev, 222 enum mlx5_flow_namespace_type type); 223 struct mlx5_flow_namespace * 224 mlx5_get_flow_vport_namespace(struct mlx5_core_dev *dev, 225 enum mlx5_flow_namespace_type type, 226 int vport_idx); 227 228 struct mlx5_flow_table_attr { 229 int prio; 230 int max_fte; 231 u32 level; 232 u32 flags; 233 u16 uid; 234 u16 vport; 235 u16 esw_owner_vhca_id; 236 struct mlx5_flow_table *next_ft; 237 238 struct { 239 int max_num_groups; 240 int num_reserved_entries; 241 } autogroup; 242 }; 243 244 struct mlx5_flow_table * 245 mlx5_create_flow_table(struct mlx5_flow_namespace *ns, 246 struct mlx5_flow_table_attr *ft_attr); 247 248 struct mlx5_flow_table * 249 mlx5_create_auto_grouped_flow_table(struct mlx5_flow_namespace *ns, 250 struct mlx5_flow_table_attr *ft_attr); 251 252 struct mlx5_flow_table * 253 mlx5_create_vport_flow_table(struct mlx5_flow_namespace *ns, 254 struct mlx5_flow_table_attr *ft_attr, u16 vport); 255 struct mlx5_flow_table * 256 mlx5_create_lag_demux_flow_table(struct mlx5_flow_namespace *ns, 257 struct mlx5_flow_table_attr *ft_attr); 258 int mlx5_destroy_flow_table(struct mlx5_flow_table *ft); 259 260 /* inbox should be set with the following values: 261 * start_flow_index 262 * end_flow_index 263 * match_criteria_enable 264 * match_criteria 265 */ 266 struct mlx5_flow_group * 267 mlx5_create_flow_group(struct mlx5_flow_table *ft, u32 *in); 268 void mlx5_destroy_flow_group(struct mlx5_flow_group *fg); 269 270 struct mlx5_exe_aso { 271 u32 object_id; 272 int base_id; 273 u8 type; 274 u8 return_reg_id; 275 union { 276 u32 ctrl_data; 277 struct { 278 u8 meter_idx; 279 u8 init_color; 280 } flow_meter; 281 }; 282 }; 283 284 struct mlx5_fs_vlan { 285 u16 ethtype; 286 u16 vid; 287 u8 prio; 288 }; 289 290 #define MLX5_FS_VLAN_DEPTH 2 291 292 enum { 293 FLOW_ACT_NO_APPEND = BIT(0), 294 FLOW_ACT_IGNORE_FLOW_LEVEL = BIT(1), 295 }; 296 297 struct mlx5_flow_act { 298 u32 action; 299 struct mlx5_modify_hdr *modify_hdr; 300 struct mlx5_pkt_reformat *pkt_reformat; 301 struct mlx5_flow_act_crypto_params { 302 u8 type; 303 u32 obj_id; 304 } crypto; 305 u32 flags; 306 struct mlx5_fs_vlan vlan[MLX5_FS_VLAN_DEPTH]; 307 struct ib_counters *counters; 308 struct mlx5_flow_group *fg; 309 struct mlx5_exe_aso exe_aso; 310 }; 311 312 #define MLX5_DECLARE_FLOW_ACT(name) \ 313 struct mlx5_flow_act name = { .action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST,\ 314 .flags = 0, } 315 316 /* Single destination per rule. 317 * Group ID is implied by the match criteria. 318 */ 319 struct mlx5_flow_handle * 320 mlx5_add_flow_rules(struct mlx5_flow_table *ft, 321 const struct mlx5_flow_spec *spec, 322 struct mlx5_flow_act *flow_act, 323 struct mlx5_flow_destination *dest, 324 int num_dest); 325 void mlx5_del_flow_rules(struct mlx5_flow_handle *fr); 326 327 int mlx5_modify_rule_destination(struct mlx5_flow_handle *handler, 328 struct mlx5_flow_destination *new_dest, 329 struct mlx5_flow_destination *old_dest); 330 331 struct mlx5_fc *mlx5_fc_create(struct mlx5_core_dev *dev, bool aging); 332 333 void mlx5_fc_destroy(struct mlx5_core_dev *dev, struct mlx5_fc *counter); 334 struct mlx5_fc *mlx5_fc_local_create(u32 counter_id, u32 offset, u32 bulk_size); 335 void mlx5_fc_local_destroy(struct mlx5_fc *counter); 336 void mlx5_fc_local_get(struct mlx5_fc *counter); 337 void mlx5_fc_local_put(struct mlx5_fc *counter); 338 u64 mlx5_fc_query_lastuse(struct mlx5_fc *counter); 339 void mlx5_fc_query_cached(struct mlx5_fc *counter, 340 u64 *bytes, u64 *packets, u64 *lastuse); 341 void mlx5_fc_query_cached_raw(struct mlx5_fc *counter, 342 u64 *bytes, u64 *packets, u64 *lastuse); 343 int mlx5_fc_query(struct mlx5_core_dev *dev, struct mlx5_fc *counter, 344 u64 *packets, u64 *bytes); 345 u32 mlx5_fc_id(struct mlx5_fc *counter); 346 347 int mlx5_fs_add_rx_underlay_qpn(struct mlx5_core_dev *dev, u32 underlay_qpn); 348 int mlx5_fs_remove_rx_underlay_qpn(struct mlx5_core_dev *dev, u32 underlay_qpn); 349 350 struct mlx5_modify_hdr *mlx5_modify_header_alloc(struct mlx5_core_dev *dev, 351 u8 ns_type, u8 num_actions, 352 void *modify_actions); 353 void mlx5_modify_header_dealloc(struct mlx5_core_dev *dev, 354 struct mlx5_modify_hdr *modify_hdr); 355 struct mlx5_flow_definer * 356 mlx5_create_match_definer(struct mlx5_core_dev *dev, 357 enum mlx5_flow_namespace_type ns_type, u16 format_id, 358 u32 *match_mask); 359 void mlx5_destroy_match_definer(struct mlx5_core_dev *dev, 360 struct mlx5_flow_definer *definer); 361 int mlx5_get_match_definer_id(struct mlx5_flow_definer *definer); 362 363 struct mlx5_pkt_reformat_params { 364 int type; 365 u8 param_0; 366 u8 param_1; 367 size_t size; 368 void *data; 369 }; 370 371 struct mlx5_pkt_reformat *mlx5_packet_reformat_alloc(struct mlx5_core_dev *dev, 372 struct mlx5_pkt_reformat_params *params, 373 enum mlx5_flow_namespace_type ns_type); 374 void mlx5_packet_reformat_dealloc(struct mlx5_core_dev *dev, 375 struct mlx5_pkt_reformat *reformat); 376 377 u32 mlx5_flow_table_id(struct mlx5_flow_table *ft); 378 379 struct mlx5_flow_root_namespace * 380 mlx5_get_root_namespace(struct mlx5_core_dev *dev, enum mlx5_flow_namespace_type ns_type); 381 382 int mlx5_fs_set_root_dev(struct mlx5_core_dev *dev, 383 struct mlx5_core_dev *new_dev, 384 enum fs_flow_table_type table_type); 385 #endif 386