1 /*
2 * QEMU Motorla 680x0 Macintosh hardware System Emulator
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20 * THE SOFTWARE.
21 */
22
23 #include "qemu/osdep.h"
24 #include "qemu/units.h"
25 #include "qemu/datadir.h"
26 #include "qemu/guest-random.h"
27 #include "exec/target_page.h"
28 #include "system/system.h"
29 #include "cpu.h"
30 #include "hw/boards.h"
31 #include "hw/or-irq.h"
32 #include "elf.h"
33 #include "hw/loader.h"
34 #include "ui/console.h"
35 #include "hw/char/escc.h"
36 #include "hw/sysbus.h"
37 #include "hw/scsi/esp.h"
38 #include "standard-headers/asm-m68k/bootinfo.h"
39 #include "standard-headers/asm-m68k/bootinfo-mac.h"
40 #include "bootinfo.h"
41 #include "hw/m68k/q800.h"
42 #include "hw/m68k/q800-glue.h"
43 #include "hw/misc/mac_via.h"
44 #include "hw/misc/djmemc.h"
45 #include "hw/misc/iosb.h"
46 #include "hw/input/adb.h"
47 #include "hw/audio/asc.h"
48 #include "hw/nubus/mac-nubus-bridge.h"
49 #include "hw/display/macfb.h"
50 #include "hw/block/swim.h"
51 #include "net/net.h"
52 #include "net/util.h"
53 #include "qapi/error.h"
54 #include "qemu/error-report.h"
55 #include "system/qtest.h"
56 #include "system/runstate.h"
57 #include "system/reset.h"
58 #include "migration/vmstate.h"
59
60 #define MACROM_ADDR 0x40800000
61 #define MACROM_SIZE 0x00100000
62
63 #define MACROM_FILENAME "MacROM.bin"
64
65 #define IO_BASE 0x50000000
66 #define IO_SLICE 0x00040000
67 #define IO_SLICE_MASK (IO_SLICE - 1)
68 #define IO_SIZE 0x04000000
69
70 #define VIA_BASE (IO_BASE + 0x00000)
71 #define SONIC_PROM_BASE (IO_BASE + 0x08000)
72 #define SONIC_BASE (IO_BASE + 0x0a000)
73 #define SCC_BASE (IO_BASE + 0x0c020)
74 #define DJMEMC_BASE (IO_BASE + 0x0e000)
75 #define ESP_BASE (IO_BASE + 0x10000)
76 #define ESP_PDMA (IO_BASE + 0x10100)
77 #define ASC_BASE (IO_BASE + 0x14000)
78 #define IOSB_BASE (IO_BASE + 0x18000)
79 #define SWIM_BASE (IO_BASE + 0x1E000)
80
81 #define SONIC_PROM_SIZE 0x1000
82
83 /*
84 * the video base, whereas it a Nubus address,
85 * is needed by the kernel to have early display and
86 * thus provided by the bootloader
87 */
88 #define VIDEO_BASE 0xf9000000
89
90 #define MAC_CLOCK 3686418
91
92 /* Size of whole RAM area */
93 #define RAM_SIZE 0x40000000
94
95 /*
96 * Slot 0x9 is reserved for use by the in-built framebuffer whilst only
97 * slots 0xc, 0xd and 0xe physically exist on the Quadra 800
98 */
99 #define Q800_NUBUS_SLOTS_AVAILABLE (BIT(0x9) | BIT(0xc) | BIT(0xd) | \
100 BIT(0xe))
101
102 /* Quadra 800 machine ID */
103 #define Q800_MACHINE_ID 0xa55a2bad
104
105
main_cpu_reset(void * opaque)106 static void main_cpu_reset(void *opaque)
107 {
108 M68kCPU *cpu = opaque;
109 CPUState *cs = CPU(cpu);
110
111 cpu_reset(cs);
112 cpu->env.aregs[7] = ldl_phys(cs->as, 0);
113 cpu->env.pc = ldl_phys(cs->as, 4);
114 }
115
rerandomize_rng_seed(void * opaque)116 static void rerandomize_rng_seed(void *opaque)
117 {
118 struct bi_record *rng_seed = opaque;
119 qemu_guest_getrandom_nofail((void *)rng_seed->data + 2,
120 be16_to_cpu(*(uint16_t *)rng_seed->data));
121 }
122
123 static uint8_t fake_mac_rom[] = {
124 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
125
126 /* offset: 0xa - mac_reset */
127
128 /* via2[vDirB] |= VIA2B_vPower */
129 0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */
130 0x10, 0x10, /* moveb %a0@,%d0 */
131 0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */
132 0x10, 0x80, /* moveb %d0,%a0@ */
133
134 /* via2[vBufB] &= ~VIA2B_vPower */
135 0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */
136 0x10, 0x10, /* moveb %a0@,%d0 */
137 0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */
138 0x10, 0x80, /* moveb %d0,%a0@ */
139
140 /* while (true) ; */
141 0x60, 0xFE /* bras [self] */
142 };
143
macio_alias_read(void * opaque,hwaddr addr,uint64_t * data,unsigned size,MemTxAttrs attrs)144 static MemTxResult macio_alias_read(void *opaque, hwaddr addr, uint64_t *data,
145 unsigned size, MemTxAttrs attrs)
146 {
147 MemTxResult r;
148 uint32_t val;
149
150 addr &= IO_SLICE_MASK;
151 addr |= IO_BASE;
152
153 switch (size) {
154 case 4:
155 val = address_space_ldl_be(&address_space_memory, addr, attrs, &r);
156 break;
157 case 2:
158 val = address_space_lduw_be(&address_space_memory, addr, attrs, &r);
159 break;
160 case 1:
161 val = address_space_ldub(&address_space_memory, addr, attrs, &r);
162 break;
163 default:
164 g_assert_not_reached();
165 }
166
167 *data = val;
168 return r;
169 }
170
macio_alias_write(void * opaque,hwaddr addr,uint64_t value,unsigned size,MemTxAttrs attrs)171 static MemTxResult macio_alias_write(void *opaque, hwaddr addr, uint64_t value,
172 unsigned size, MemTxAttrs attrs)
173 {
174 MemTxResult r;
175
176 addr &= IO_SLICE_MASK;
177 addr |= IO_BASE;
178
179 switch (size) {
180 case 4:
181 address_space_stl_be(&address_space_memory, addr, value, attrs, &r);
182 break;
183 case 2:
184 address_space_stw_be(&address_space_memory, addr, value, attrs, &r);
185 break;
186 case 1:
187 address_space_stb(&address_space_memory, addr, value, attrs, &r);
188 break;
189 default:
190 g_assert_not_reached();
191 }
192
193 return r;
194 }
195
196 static const MemoryRegionOps macio_alias_ops = {
197 .read_with_attrs = macio_alias_read,
198 .write_with_attrs = macio_alias_write,
199 .endianness = DEVICE_BIG_ENDIAN,
200 .valid = {
201 .min_access_size = 1,
202 .max_access_size = 4,
203 },
204 };
205
machine_id_read(void * opaque,hwaddr addr,unsigned size)206 static uint64_t machine_id_read(void *opaque, hwaddr addr, unsigned size)
207 {
208 return Q800_MACHINE_ID;
209 }
210
machine_id_write(void * opaque,hwaddr addr,uint64_t val,unsigned size)211 static void machine_id_write(void *opaque, hwaddr addr, uint64_t val,
212 unsigned size)
213 {
214 }
215
216 static const MemoryRegionOps machine_id_ops = {
217 .read = machine_id_read,
218 .write = machine_id_write,
219 .endianness = DEVICE_BIG_ENDIAN,
220 .valid = {
221 .min_access_size = 4,
222 .max_access_size = 4,
223 },
224 };
225
ramio_read(void * opaque,hwaddr addr,unsigned size)226 static uint64_t ramio_read(void *opaque, hwaddr addr, unsigned size)
227 {
228 return 0x0;
229 }
230
ramio_write(void * opaque,hwaddr addr,uint64_t val,unsigned size)231 static void ramio_write(void *opaque, hwaddr addr, uint64_t val,
232 unsigned size)
233 {
234 }
235
236 static const MemoryRegionOps ramio_ops = {
237 .read = ramio_read,
238 .write = ramio_write,
239 .endianness = DEVICE_BIG_ENDIAN,
240 .valid = {
241 .min_access_size = 1,
242 .max_access_size = 4,
243 },
244 };
245
q800_machine_init(MachineState * machine)246 static void q800_machine_init(MachineState *machine)
247 {
248 Q800MachineState *m = Q800_MACHINE(machine);
249 int linux_boot;
250 int32_t kernel_size;
251 uint64_t elf_entry;
252 char *filename;
253 int bios_size;
254 ram_addr_t initrd_base;
255 int32_t initrd_size;
256 uint8_t *prom;
257 int i, checksum;
258 MacFbMode *macfb_mode;
259 ram_addr_t ram_size = machine->ram_size;
260 const char *kernel_filename = machine->kernel_filename;
261 const char *initrd_filename = machine->initrd_filename;
262 const char *kernel_cmdline = machine->kernel_cmdline;
263 const char *bios_name = machine->firmware ?: MACROM_FILENAME;
264 hwaddr parameters_base;
265 CPUState *cs;
266 DeviceState *dev;
267 SysBusESPState *sysbus_esp;
268 ESPState *esp;
269 SysBusDevice *sysbus;
270 BusState *adb_bus;
271 NubusBus *nubus;
272 DriveInfo *dinfo;
273 NICInfo *nd;
274 MACAddr mac;
275 uint8_t rng_seed[32];
276
277 linux_boot = (kernel_filename != NULL);
278
279 if (ram_size > 1 * GiB) {
280 error_report("Too much memory for this machine: %" PRId64 " MiB, "
281 "maximum 1024 MiB", ram_size / MiB);
282 exit(1);
283 }
284
285 /* init CPUs */
286 object_initialize_child(OBJECT(machine), "cpu", &m->cpu, machine->cpu_type);
287 qdev_realize(DEVICE(&m->cpu), NULL, &error_fatal);
288 qemu_register_reset(main_cpu_reset, &m->cpu);
289
290 /* RAM */
291 memory_region_init_io(&m->ramio, OBJECT(machine), &ramio_ops, &m->ramio,
292 "ram", RAM_SIZE);
293 memory_region_add_subregion(get_system_memory(), 0x0, &m->ramio);
294
295 memory_region_add_subregion(&m->ramio, 0, machine->ram);
296
297 /*
298 * Create container for all IO devices
299 */
300 memory_region_init(&m->macio, OBJECT(machine), "mac-io", IO_SLICE);
301 memory_region_add_subregion(get_system_memory(), IO_BASE, &m->macio);
302
303 /*
304 * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated
305 * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE
306 */
307 memory_region_init_io(&m->macio_alias, OBJECT(machine), &macio_alias_ops,
308 &m->macio, "mac-io.alias", IO_SIZE - IO_SLICE);
309 memory_region_add_subregion(get_system_memory(), IO_BASE + IO_SLICE,
310 &m->macio_alias);
311
312 memory_region_init_io(&m->machine_id, NULL, &machine_id_ops, NULL,
313 "Machine ID", 4);
314 memory_region_add_subregion(get_system_memory(), 0x5ffffffc,
315 &m->machine_id);
316
317 /* IRQ Glue */
318 object_initialize_child(OBJECT(machine), "glue", &m->glue, TYPE_GLUE);
319 object_property_set_link(OBJECT(&m->glue), "cpu", OBJECT(&m->cpu),
320 &error_abort);
321 sysbus_realize(SYS_BUS_DEVICE(&m->glue), &error_fatal);
322
323 /* djMEMC memory controller */
324 object_initialize_child(OBJECT(machine), "djmemc", &m->djmemc,
325 TYPE_DJMEMC);
326 sysbus = SYS_BUS_DEVICE(&m->djmemc);
327 sysbus_realize_and_unref(sysbus, &error_fatal);
328 memory_region_add_subregion(&m->macio, DJMEMC_BASE - IO_BASE,
329 sysbus_mmio_get_region(sysbus, 0));
330
331 /* IOSB subsystem */
332 object_initialize_child(OBJECT(machine), "iosb", &m->iosb, TYPE_IOSB);
333 sysbus = SYS_BUS_DEVICE(&m->iosb);
334 sysbus_realize_and_unref(sysbus, &error_fatal);
335 memory_region_add_subregion(&m->macio, IOSB_BASE - IO_BASE,
336 sysbus_mmio_get_region(sysbus, 0));
337
338 /* VIA 1 */
339 object_initialize_child(OBJECT(machine), "via1", &m->via1,
340 TYPE_MOS6522_Q800_VIA1);
341 dinfo = drive_get(IF_MTD, 0, 0);
342 if (dinfo) {
343 qdev_prop_set_drive(DEVICE(&m->via1), "drive",
344 blk_by_legacy_dinfo(dinfo));
345 }
346 sysbus = SYS_BUS_DEVICE(&m->via1);
347 sysbus_realize(sysbus, &error_fatal);
348 memory_region_add_subregion(&m->macio, VIA_BASE - IO_BASE,
349 sysbus_mmio_get_region(sysbus, 1));
350 sysbus_connect_irq(sysbus, 0,
351 qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_VIA1));
352 /* A/UX mode */
353 qdev_connect_gpio_out(DEVICE(&m->via1), 0,
354 qdev_get_gpio_in_named(DEVICE(&m->glue),
355 "auxmode", 0));
356
357 adb_bus = qdev_get_child_bus(DEVICE(&m->via1), "adb.0");
358 dev = qdev_new(TYPE_ADB_KEYBOARD);
359 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
360 dev = qdev_new(TYPE_ADB_MOUSE);
361 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
362
363 /* VIA 2 */
364 object_initialize_child(OBJECT(machine), "via2", &m->via2,
365 TYPE_MOS6522_Q800_VIA2);
366 sysbus = SYS_BUS_DEVICE(&m->via2);
367 sysbus_realize(sysbus, &error_fatal);
368 memory_region_add_subregion(&m->macio, VIA_BASE - IO_BASE + VIA_SIZE,
369 sysbus_mmio_get_region(sysbus, 1));
370 sysbus_connect_irq(sysbus, 0,
371 qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_VIA2));
372
373 /* MACSONIC */
374
375 /*
376 * MacSonic driver needs an Apple MAC address
377 * Valid prefix are:
378 * 00:05:02 Apple
379 * 00:80:19 Dayna Communications, Inc.
380 * 00:A0:40 Apple
381 * 08:00:07 Apple
382 * (Q800 use the last one)
383 */
384 object_initialize_child(OBJECT(machine), "dp8393x", &m->dp8393x,
385 TYPE_DP8393X);
386 dev = DEVICE(&m->dp8393x);
387 nd = qemu_find_nic_info(TYPE_DP8393X, true, "dp83932");
388 if (nd) {
389 qdev_set_nic_properties(dev, nd);
390 memcpy(mac.a, nd->macaddr.a, sizeof(mac.a));
391 } else {
392 qemu_macaddr_default_if_unset(&mac);
393 }
394 mac.a[0] = 0x08;
395 mac.a[1] = 0x00;
396 mac.a[2] = 0x07;
397 qdev_prop_set_macaddr(dev, "mac", mac.a);
398
399 qdev_prop_set_uint8(dev, "it_shift", 2);
400 qdev_prop_set_bit(dev, "big_endian", true);
401 object_property_set_link(OBJECT(dev), "dma_mr",
402 OBJECT(get_system_memory()), &error_abort);
403 sysbus = SYS_BUS_DEVICE(dev);
404 sysbus_realize(sysbus, &error_fatal);
405 memory_region_add_subregion(&m->macio, SONIC_BASE - IO_BASE,
406 sysbus_mmio_get_region(sysbus, 0));
407 sysbus_connect_irq(sysbus, 0,
408 qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_SONIC));
409
410 memory_region_init_rom(&m->dp8393x_prom, NULL, "dp8393x-q800.prom",
411 SONIC_PROM_SIZE, &error_fatal);
412 memory_region_add_subregion(get_system_memory(), SONIC_PROM_BASE,
413 &m->dp8393x_prom);
414
415 /* Add MAC address with valid checksum to PROM */
416 prom = memory_region_get_ram_ptr(&m->dp8393x_prom);
417 checksum = 0;
418 for (i = 0; i < 6; i++) {
419 prom[i] = revbit8(mac.a[i]);
420 checksum ^= prom[i];
421 }
422 prom[7] = 0xff - checksum;
423
424 /* SCC */
425
426 object_initialize_child(OBJECT(machine), "escc", &m->escc,
427 TYPE_ESCC);
428 dev = DEVICE(&m->escc);
429 qdev_prop_set_uint32(dev, "disabled", 0);
430 qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK);
431 qdev_prop_set_uint32(dev, "it_shift", 1);
432 qdev_prop_set_bit(dev, "bit_swap", true);
433 qdev_prop_set_chr(dev, "chrA", serial_hd(0));
434 qdev_prop_set_chr(dev, "chrB", serial_hd(1));
435 qdev_prop_set_uint32(dev, "chnBtype", 0);
436 qdev_prop_set_uint32(dev, "chnAtype", 0);
437 sysbus = SYS_BUS_DEVICE(dev);
438 sysbus_realize(sysbus, &error_fatal);
439
440 /* Logically OR both its IRQs together */
441 object_initialize_child(OBJECT(machine), "escc_orgate", &m->escc_orgate,
442 TYPE_OR_IRQ);
443 object_property_set_int(OBJECT(&m->escc_orgate), "num-lines", 2,
444 &error_fatal);
445 dev = DEVICE(&m->escc_orgate);
446 qdev_realize(dev, NULL, &error_fatal);
447 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(dev, 0));
448 sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(dev, 1));
449 qdev_connect_gpio_out(dev, 0,
450 qdev_get_gpio_in(DEVICE(&m->glue),
451 GLUE_IRQ_IN_ESCC));
452 memory_region_add_subregion(&m->macio, SCC_BASE - IO_BASE,
453 sysbus_mmio_get_region(sysbus, 0));
454
455 /* Create alias for NetBSD */
456 memory_region_init_alias(&m->escc_alias, OBJECT(machine), "escc-alias",
457 sysbus_mmio_get_region(sysbus, 0), 0, 0x8);
458 memory_region_add_subregion(&m->macio, SCC_BASE - IO_BASE - 0x20,
459 &m->escc_alias);
460
461 /* SCSI */
462
463 object_initialize_child(OBJECT(machine), "esp", &m->esp,
464 TYPE_SYSBUS_ESP);
465 sysbus_esp = SYSBUS_ESP(&m->esp);
466 esp = &sysbus_esp->esp;
467 esp->dma_memory_read = NULL;
468 esp->dma_memory_write = NULL;
469 esp->dma_opaque = NULL;
470 sysbus_esp->it_shift = 4;
471 esp->dma_enabled = 1;
472
473 sysbus = SYS_BUS_DEVICE(&m->esp);
474 sysbus_realize(sysbus, &error_fatal);
475 /* SCSI and SCSI data IRQs are negative edge triggered */
476 sysbus_connect_irq(sysbus, 0,
477 qemu_irq_invert(
478 qdev_get_gpio_in(DEVICE(&m->via2),
479 VIA2_IRQ_SCSI_BIT)));
480 sysbus_connect_irq(sysbus, 1,
481 qemu_irq_invert(
482 qdev_get_gpio_in(DEVICE(&m->via2),
483 VIA2_IRQ_SCSI_DATA_BIT)));
484 memory_region_add_subregion(&m->macio, ESP_BASE - IO_BASE,
485 sysbus_mmio_get_region(sysbus, 0));
486 memory_region_add_subregion(&m->macio, ESP_PDMA - IO_BASE,
487 sysbus_mmio_get_region(sysbus, 1));
488
489 scsi_bus_legacy_handle_cmdline(&esp->bus);
490
491 /* Apple Sound Chip */
492
493 object_initialize_child(OBJECT(machine), "asc", &m->asc, TYPE_ASC);
494 qdev_prop_set_uint8(DEVICE(&m->asc), "asctype", m->easc ? ASC_TYPE_EASC
495 : ASC_TYPE_ASC);
496 if (machine->audiodev) {
497 qdev_prop_set_string(DEVICE(&m->asc), "audiodev", machine->audiodev);
498 }
499 sysbus = SYS_BUS_DEVICE(&m->asc);
500 sysbus_realize_and_unref(sysbus, &error_fatal);
501 memory_region_add_subregion(&m->macio, ASC_BASE - IO_BASE,
502 sysbus_mmio_get_region(sysbus, 0));
503 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(DEVICE(&m->glue),
504 GLUE_IRQ_IN_ASC));
505
506 /* Wire ASC IRQ via GLUE for use in classic mode */
507 qdev_connect_gpio_out(DEVICE(&m->glue), GLUE_IRQ_ASC,
508 qdev_get_gpio_in(DEVICE(&m->via2),
509 VIA2_IRQ_ASC_BIT));
510
511 /* SWIM floppy controller */
512
513 object_initialize_child(OBJECT(machine), "swim", &m->swim,
514 TYPE_SWIM);
515 sysbus = SYS_BUS_DEVICE(&m->swim);
516 sysbus_realize(sysbus, &error_fatal);
517 memory_region_add_subregion(&m->macio, SWIM_BASE - IO_BASE,
518 sysbus_mmio_get_region(sysbus, 0));
519
520 /* NuBus */
521
522 object_initialize_child(OBJECT(machine), "mac-nubus-bridge",
523 &m->mac_nubus_bridge,
524 TYPE_MAC_NUBUS_BRIDGE);
525 sysbus = SYS_BUS_DEVICE(&m->mac_nubus_bridge);
526 dev = DEVICE(&m->mac_nubus_bridge);
527 qdev_prop_set_uint32(DEVICE(&m->mac_nubus_bridge), "slot-available-mask",
528 Q800_NUBUS_SLOTS_AVAILABLE);
529 sysbus_realize(sysbus, &error_fatal);
530 memory_region_add_subregion(get_system_memory(),
531 MAC_NUBUS_FIRST_SLOT * NUBUS_SUPER_SLOT_SIZE,
532 sysbus_mmio_get_region(sysbus, 0));
533 memory_region_add_subregion(get_system_memory(),
534 NUBUS_SLOT_BASE +
535 MAC_NUBUS_FIRST_SLOT * NUBUS_SLOT_SIZE,
536 sysbus_mmio_get_region(sysbus, 1));
537 qdev_connect_gpio_out(dev, 9,
538 qdev_get_gpio_in_named(DEVICE(&m->via2), "nubus-irq",
539 VIA2_NUBUS_IRQ_INTVIDEO));
540 for (i = 1; i < VIA2_NUBUS_IRQ_NB; i++) {
541 qdev_connect_gpio_out(dev, 9 + i,
542 qdev_get_gpio_in_named(DEVICE(&m->via2),
543 "nubus-irq",
544 VIA2_NUBUS_IRQ_9 + i));
545 }
546
547 /*
548 * Since the framebuffer in slot 0x9 uses a separate IRQ, wire the unused
549 * IRQ via GLUE for use by SONIC Ethernet in classic mode
550 */
551 qdev_connect_gpio_out(DEVICE(&m->glue), GLUE_IRQ_NUBUS_9,
552 qdev_get_gpio_in_named(DEVICE(&m->via2), "nubus-irq",
553 VIA2_NUBUS_IRQ_9));
554
555 nubus = NUBUS_BUS(qdev_get_child_bus(dev, "nubus-bus.0"));
556
557 /* framebuffer in nubus slot #9 */
558
559 object_initialize_child(OBJECT(machine), "macfb", &m->macfb,
560 TYPE_NUBUS_MACFB);
561 dev = DEVICE(&m->macfb);
562 qdev_prop_set_uint32(dev, "slot", 9);
563 qdev_prop_set_uint32(dev, "width", graphic_width);
564 qdev_prop_set_uint32(dev, "height", graphic_height);
565 qdev_prop_set_uint8(dev, "depth", graphic_depth);
566 if (graphic_width == 1152 && graphic_height == 870) {
567 qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_APPLE_21_COLOR);
568 } else {
569 qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_VGA);
570 }
571 qdev_realize(dev, BUS(nubus), &error_fatal);
572
573 macfb_mode = (NUBUS_MACFB(dev)->macfb).mode;
574
575 cs = CPU(&m->cpu);
576 if (linux_boot) {
577 uint64_t high;
578 void *param_blob, *param_ptr, *param_rng_seed;
579
580 if (kernel_cmdline) {
581 param_blob = g_malloc(strlen(kernel_cmdline) + 1024);
582 } else {
583 param_blob = g_malloc(1024);
584 }
585
586 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
587 &elf_entry, NULL, &high, NULL, ELFDATA2MSB,
588 EM_68K, 0, 0);
589 if (kernel_size < 0) {
590 error_report("could not load kernel '%s'", kernel_filename);
591 exit(1);
592 }
593 stl_phys(cs->as, 4, elf_entry); /* reset initial PC */
594 parameters_base = (high + 1) & ~1;
595 param_ptr = param_blob;
596
597 BOOTINFO1(param_ptr, BI_MACHTYPE, MACH_MAC);
598 BOOTINFO1(param_ptr, BI_FPUTYPE, FPU_68040);
599 BOOTINFO1(param_ptr, BI_MMUTYPE, MMU_68040);
600 BOOTINFO1(param_ptr, BI_CPUTYPE, CPU_68040);
601 BOOTINFO1(param_ptr, BI_MAC_CPUID, CPUB_68040);
602 BOOTINFO1(param_ptr, BI_MAC_MODEL, MAC_MODEL_Q800);
603 BOOTINFO1(param_ptr,
604 BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */
605 BOOTINFO2(param_ptr, BI_MEMCHUNK, 0, ram_size);
606 BOOTINFO1(param_ptr, BI_MAC_VADDR,
607 VIDEO_BASE + macfb_mode->offset);
608 BOOTINFO1(param_ptr, BI_MAC_VDEPTH, graphic_depth);
609 BOOTINFO1(param_ptr, BI_MAC_VDIM,
610 (graphic_height << 16) | graphic_width);
611 BOOTINFO1(param_ptr, BI_MAC_VROW, macfb_mode->stride);
612 BOOTINFO1(param_ptr, BI_MAC_SCCBASE, SCC_BASE);
613
614 memory_region_init_ram_ptr(&m->rom, NULL, "m68k_fake_mac.rom",
615 sizeof(fake_mac_rom), fake_mac_rom);
616 memory_region_set_readonly(&m->rom, true);
617 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, &m->rom);
618
619 if (kernel_cmdline) {
620 BOOTINFOSTR(param_ptr, BI_COMMAND_LINE,
621 kernel_cmdline);
622 }
623
624 /* Pass seed to RNG. */
625 param_rng_seed = param_ptr;
626 qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed));
627 BOOTINFODATA(param_ptr, BI_RNG_SEED,
628 rng_seed, sizeof(rng_seed));
629
630 /* load initrd */
631 if (initrd_filename) {
632 initrd_size = get_image_size(initrd_filename);
633 if (initrd_size < 0) {
634 error_report("could not load initial ram disk '%s'",
635 initrd_filename);
636 exit(1);
637 }
638
639 initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
640 load_image_targphys(initrd_filename, initrd_base,
641 ram_size - initrd_base);
642 BOOTINFO2(param_ptr, BI_RAMDISK, initrd_base,
643 initrd_size);
644 } else {
645 initrd_base = 0;
646 initrd_size = 0;
647 }
648 BOOTINFO0(param_ptr, BI_LAST);
649 rom_add_blob_fixed_as("bootinfo", param_blob, param_ptr - param_blob,
650 parameters_base, cs->as);
651 qemu_register_reset_nosnapshotload(rerandomize_rng_seed,
652 rom_ptr_for_as(cs->as, parameters_base,
653 param_ptr - param_blob) +
654 (param_rng_seed - param_blob));
655 g_free(param_blob);
656 } else {
657 uint8_t *ptr;
658 /* allocate and load BIOS */
659 memory_region_init_rom(&m->rom, NULL, "m68k_mac.rom", MACROM_SIZE,
660 &error_abort);
661 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
662 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, &m->rom);
663
664 memory_region_init_alias(&m->rom_alias, NULL, "m68k_mac.rom-alias",
665 &m->rom, 0, MACROM_SIZE);
666 memory_region_add_subregion(get_system_memory(), 0x40000000,
667 &m->rom_alias);
668
669 /* Load MacROM binary */
670 if (filename) {
671 bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE);
672 g_free(filename);
673 } else {
674 bios_size = -1;
675 }
676
677 /* Remove qtest_enabled() check once firmware files are in the tree */
678 if (!qtest_enabled()) {
679 if (bios_size <= 0 || bios_size > MACROM_SIZE) {
680 error_report("could not load MacROM '%s'", bios_name);
681 exit(1);
682 }
683
684 ptr = rom_ptr(MACROM_ADDR, bios_size);
685 assert(ptr != NULL);
686 stl_phys(cs->as, 0, ldl_be_p(ptr)); /* reset initial SP */
687 stl_phys(cs->as, 4,
688 MACROM_ADDR + ldl_be_p(ptr + 4)); /* reset initial PC */
689 }
690 }
691 }
692
q800_get_easc(Object * obj,Error ** errp)693 static bool q800_get_easc(Object *obj, Error **errp)
694 {
695 Q800MachineState *ms = Q800_MACHINE(obj);
696
697 return ms->easc;
698 }
699
q800_set_easc(Object * obj,bool value,Error ** errp)700 static void q800_set_easc(Object *obj, bool value, Error **errp)
701 {
702 Q800MachineState *ms = Q800_MACHINE(obj);
703
704 ms->easc = value;
705 }
706
q800_init(Object * obj)707 static void q800_init(Object *obj)
708 {
709 Q800MachineState *ms = Q800_MACHINE(obj);
710
711 /* Default to EASC */
712 ms->easc = true;
713 }
714
715 static GlobalProperty hw_compat_q800[] = {
716 { "scsi-hd", "quirk_mode_page_vendor_specific_apple", "on" },
717 { "scsi-hd", "vendor", " SEAGATE" },
718 { "scsi-hd", "product", " ST225N" },
719 { "scsi-hd", "ver", "1.0 " },
720 { "scsi-cd", "quirk_mode_page_apple_vendor", "on" },
721 { "scsi-cd", "quirk_mode_sense_rom_use_dbd", "on" },
722 { "scsi-cd", "quirk_mode_page_vendor_specific_apple", "on" },
723 { "scsi-cd", "quirk_mode_page_truncated", "on" },
724 { "scsi-cd", "vendor", "MATSHITA" },
725 { "scsi-cd", "product", "CD-ROM CR-8005" },
726 { "scsi-cd", "ver", "1.0k" },
727 };
728 static const size_t hw_compat_q800_len = G_N_ELEMENTS(hw_compat_q800);
729
q800_machine_class_init(ObjectClass * oc,const void * data)730 static void q800_machine_class_init(ObjectClass *oc, const void *data)
731 {
732 static const char * const valid_cpu_types[] = {
733 M68K_CPU_TYPE_NAME("m68040"),
734 NULL
735 };
736 MachineClass *mc = MACHINE_CLASS(oc);
737
738 mc->desc = "Macintosh Quadra 800";
739 mc->init = q800_machine_init;
740 mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
741 mc->valid_cpu_types = valid_cpu_types;
742 mc->max_cpus = 1;
743 mc->block_default_type = IF_SCSI;
744 mc->default_ram_id = "m68k_mac.ram";
745 machine_add_audiodev_property(mc);
746 compat_props_add(mc->compat_props, hw_compat_q800, hw_compat_q800_len);
747
748 object_class_property_add_bool(oc, "easc", q800_get_easc, q800_set_easc);
749 object_class_property_set_description(oc, "easc",
750 "Set to off to use ASC rather than EASC");
751 }
752
753 static const TypeInfo q800_machine_typeinfo = {
754 .name = MACHINE_TYPE_NAME("q800"),
755 .parent = TYPE_MACHINE,
756 .instance_init = q800_init,
757 .instance_size = sizeof(Q800MachineState),
758 .class_init = q800_machine_class_init,
759 };
760
q800_machine_register_types(void)761 static void q800_machine_register_types(void)
762 {
763 type_register_static(&q800_machine_typeinfo);
764 }
765
766 type_init(q800_machine_register_types)
767