1 /*
2 * Generic intermediate code generation.
3 *
4 * Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu>
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
8 */
9
10 #ifndef EXEC__TRANSLATOR_H
11 #define EXEC__TRANSLATOR_H
12
13 /*
14 * Include this header from a target-specific file, and add a
15 *
16 * DisasContextBase base;
17 *
18 * member in your target-specific DisasContext.
19 */
20
21 #include "exec/memop.h"
22 #include "exec/vaddr.h"
23
24 /**
25 * DisasJumpType:
26 * @DISAS_NEXT: Next instruction in program order.
27 * @DISAS_TOO_MANY: Too many instructions translated.
28 * @DISAS_NORETURN: Following code is dead.
29 * @DISAS_TARGET_*: Start of target-specific conditions.
30 *
31 * What instruction to disassemble next.
32 */
33 typedef enum DisasJumpType {
34 DISAS_NEXT,
35 DISAS_TOO_MANY,
36 DISAS_NORETURN,
37 DISAS_TARGET_0,
38 DISAS_TARGET_1,
39 DISAS_TARGET_2,
40 DISAS_TARGET_3,
41 DISAS_TARGET_4,
42 DISAS_TARGET_5,
43 DISAS_TARGET_6,
44 DISAS_TARGET_7,
45 DISAS_TARGET_8,
46 DISAS_TARGET_9,
47 DISAS_TARGET_10,
48 DISAS_TARGET_11,
49 } DisasJumpType;
50
51 /**
52 * DisasContextBase:
53 * @tb: Translation block for this disassembly.
54 * @pc_first: Address of first guest instruction in this TB.
55 * @pc_next: Address of next guest instruction in this TB (current during
56 * disassembly).
57 * @is_jmp: What instruction to disassemble next.
58 * @num_insns: Number of translated instructions (including current).
59 * @max_insns: Maximum number of instructions to be translated in this TB.
60 * @plugin_enabled: TCG plugin enabled in this TB.
61 * @fake_insn: True if translator_fake_ldb used.
62 * @insn_start: The last op emitted by the insn_start hook,
63 * which is expected to be INDEX_op_insn_start.
64 *
65 * Architecture-agnostic disassembly context.
66 */
67 struct DisasContextBase {
68 TranslationBlock *tb;
69 vaddr pc_first;
70 vaddr pc_next;
71 DisasJumpType is_jmp;
72 int num_insns;
73 int max_insns;
74 bool plugin_enabled;
75 bool fake_insn;
76 uint8_t code_mmuidx;
77 struct TCGOp *insn_start;
78 void *host_addr[2];
79
80 /*
81 * Record insn data that we cannot read directly from host memory.
82 * There are only two reasons we cannot use host memory:
83 * (1) We are executing from I/O,
84 * (2) We are executing a synthetic instruction (s390x EX).
85 * In both cases we need record exactly one instruction,
86 * and thus the maximum amount of data we record is limited.
87 */
88 int record_start;
89 int record_len;
90 uint8_t record[32];
91 };
92
93 /**
94 * TranslatorOps:
95 * @init_disas_context:
96 * Initialize the target-specific portions of DisasContext struct.
97 * The generic DisasContextBase has already been initialized.
98 *
99 * @tb_start:
100 * Emit any code required before the start of the main loop,
101 * after the generic gen_tb_start().
102 *
103 * @insn_start:
104 * Emit the tcg_gen_insn_start opcode.
105 *
106 * @translate_insn:
107 * Disassemble one instruction and set db->pc_next for the start
108 * of the following instruction. Set db->is_jmp as necessary to
109 * terminate the main loop.
110 *
111 * @tb_stop:
112 * Emit any opcodes required to exit the TB, based on db->is_jmp.
113 *
114 * @disas_log:
115 * Print instruction disassembly to log.
116 */
117 typedef struct TranslatorOps {
118 void (*init_disas_context)(DisasContextBase *db, CPUState *cpu);
119 void (*tb_start)(DisasContextBase *db, CPUState *cpu);
120 void (*insn_start)(DisasContextBase *db, CPUState *cpu);
121 void (*translate_insn)(DisasContextBase *db, CPUState *cpu);
122 void (*tb_stop)(DisasContextBase *db, CPUState *cpu);
123 bool (*disas_log)(const DisasContextBase *db, CPUState *cpu, FILE *f);
124 } TranslatorOps;
125
126 /**
127 * translator_loop:
128 * @cpu: Target vCPU.
129 * @tb: Translation block.
130 * @max_insns: Maximum number of insns to translate.
131 * @pc: guest virtual program counter address
132 * @host_pc: host physical program counter address
133 * @ops: Target-specific operations.
134 * @db: Disassembly context.
135 *
136 * Generic translator loop.
137 *
138 * Translation will stop in the following cases (in order):
139 * - When is_jmp set by #TranslatorOps::breakpoint_check.
140 * - set to DISAS_TOO_MANY exits after translating one more insn
141 * - set to any other value than DISAS_NEXT exits immediately.
142 * - When is_jmp set by #TranslatorOps::translate_insn.
143 * - set to any value other than DISAS_NEXT exits immediately.
144 * - When the TCG operation buffer is full.
145 * - When single-stepping is enabled (system-wide or on the current vCPU).
146 * - When too many instructions have been translated.
147 */
148 void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,
149 vaddr pc, void *host_pc, const TranslatorOps *ops,
150 DisasContextBase *db);
151
152 /**
153 * translator_use_goto_tb
154 * @db: Disassembly context
155 * @dest: target pc of the goto
156 *
157 * Return true if goto_tb is allowed between the current TB
158 * and the destination PC.
159 */
160 bool translator_use_goto_tb(DisasContextBase *db, vaddr dest);
161
162 /**
163 * translator_io_start
164 * @db: Disassembly context
165 *
166 * If icount is enabled, set cpu->can_do_io, adjust db->is_jmp to
167 * DISAS_TOO_MANY if it is still DISAS_NEXT, and return true.
168 * Otherwise return false.
169 */
170 bool translator_io_start(DisasContextBase *db);
171
172 /*
173 * Translator Load Functions
174 *
175 * These are intended to replace the direct usage of the cpu_ld*_code
176 * functions and are mandatory for front-ends that have been migrated
177 * to the common translator_loop. These functions are only intended
178 * to be called from the translation stage and should not be called
179 * from helper functions. Those functions should be converted to encode
180 * the relevant information at translation time.
181 */
182
183 uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc);
184 uint16_t translator_lduw_end(CPUArchState *env, DisasContextBase *db,
185 vaddr pc, MemOp endian);
186 uint32_t translator_ldl_end(CPUArchState *env, DisasContextBase *db,
187 vaddr pc, MemOp endian);
188 uint64_t translator_ldq_end(CPUArchState *env, DisasContextBase *db,
189 vaddr pc, MemOp endian);
190
191 #ifdef COMPILING_PER_TARGET
192 static inline uint16_t
translator_lduw(CPUArchState * env,DisasContextBase * db,vaddr pc)193 translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc)
194 {
195 return translator_lduw_end(env, db, pc, MO_TE);
196 }
197
198 static inline uint32_t
translator_ldl(CPUArchState * env,DisasContextBase * db,vaddr pc)199 translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc)
200 {
201 return translator_ldl_end(env, db, pc, MO_TE);
202 }
203
204 static inline uint64_t
translator_ldq(CPUArchState * env,DisasContextBase * db,vaddr pc)205 translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
206 {
207 return translator_ldq_end(env, db, pc, MO_TE);
208 }
209
210 static inline uint16_t
translator_lduw_swap(CPUArchState * env,DisasContextBase * db,vaddr pc,bool do_swap)211 translator_lduw_swap(CPUArchState *env, DisasContextBase *db,
212 vaddr pc, bool do_swap)
213 {
214 return translator_lduw_end(env, db, pc, MO_TE ^ (do_swap * MO_BSWAP));
215 }
216
217 static inline uint32_t
translator_ldl_swap(CPUArchState * env,DisasContextBase * db,vaddr pc,bool do_swap)218 translator_ldl_swap(CPUArchState *env, DisasContextBase *db,
219 vaddr pc, bool do_swap)
220 {
221 return translator_ldl_end(env, db, pc, MO_TE ^ (do_swap * MO_BSWAP));
222 }
223
224 static inline uint64_t
translator_ldq_swap(CPUArchState * env,DisasContextBase * db,vaddr pc,bool do_swap)225 translator_ldq_swap(CPUArchState *env, DisasContextBase *db,
226 vaddr pc, bool do_swap)
227 {
228 return translator_ldq_end(env, db, pc, MO_TE ^ (do_swap * MO_BSWAP));
229 }
230 #endif /* COMPILING_PER_TARGET */
231
232 /**
233 * translator_fake_ld - fake instruction load
234 * @db: Disassembly context
235 * @data: bytes of instruction
236 * @len: number of bytes
237 *
238 * This is a special case helper used where the instruction we are
239 * about to translate comes from somewhere else (e.g. being
240 * re-synthesised for s390x "ex"). It ensures we update other areas of
241 * the translator with details of the executed instruction.
242 */
243 void translator_fake_ld(DisasContextBase *db, const void *data, size_t len);
244
245 /**
246 * translator_st
247 * @db: disassembly context
248 * @dest: address to copy into
249 * @addr: virtual address within TB
250 * @len: length
251 *
252 * Copy @len bytes from @addr into @dest.
253 * All bytes must have been read during translation.
254 * Return true on success or false on failure.
255 */
256 bool translator_st(const DisasContextBase *db, void *dest,
257 vaddr addr, size_t len);
258
259 /**
260 * translator_st_len
261 * @db: disassembly context
262 *
263 * Return the number of bytes available to copy from the
264 * current translation block with translator_st.
265 */
266 size_t translator_st_len(const DisasContextBase *db);
267
268 /**
269 * translator_is_same_page
270 * @db: disassembly context
271 * @addr: virtual address within TB
272 *
273 * Return whether @addr is on the same page as where disassembly started.
274 * Translators can use this to enforce the rule that only single-insn
275 * translation blocks are allowed to cross page boundaries.
276 */
277 bool translator_is_same_page(const DisasContextBase *db, vaddr addr);
278
279 #endif /* EXEC__TRANSLATOR_H */
280