1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * camss-csiphy-3ph-1-0.c
4 *
5 * Qualcomm MSM Camera Subsystem - CSIPHY Module 3phase v1.0
6 *
7 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
8 * Copyright (C) 2016-2018 Linaro Ltd.
9 */
10
11 #include "camss.h"
12 #include "camss-csiphy.h"
13
14 #include <linux/delay.h>
15 #include <linux/interrupt.h>
16 #include <linux/io.h>
17
18 #define CSIPHY_3PH_LNn_CFG1(n) (0x000 + 0x100 * (n))
19 #define CSIPHY_3PH_LNn_CFG1_SWI_REC_DLY_PRG (BIT(7) | BIT(6))
20 #define CSIPHY_3PH_LNn_CFG2(n) (0x004 + 0x100 * (n))
21 #define CSIPHY_3PH_LNn_CFG2_LP_REC_EN_INT BIT(3)
22 #define CSIPHY_3PH_LNn_CFG3(n) (0x008 + 0x100 * (n))
23 #define CSIPHY_3PH_LNn_CFG4(n) (0x00c + 0x100 * (n))
24 #define CSIPHY_3PH_LNn_CFG4_T_HS_CLK_MISS 0xa4
25 #define CSIPHY_3PH_LNn_CFG4_T_HS_CLK_MISS_660 0xa5
26 #define CSIPHY_3PH_LNn_CFG5(n) (0x010 + 0x100 * (n))
27 #define CSIPHY_3PH_LNn_CFG5_T_HS_DTERM 0x02
28 #define CSIPHY_3PH_LNn_CFG5_HS_REC_EQ_FQ_INT 0x50
29 #define CSIPHY_3PH_LNn_TEST_IMP(n) (0x01c + 0x100 * (n))
30 #define CSIPHY_3PH_LNn_TEST_IMP_HS_TERM_IMP 0xa
31 #define CSIPHY_3PH_LNn_MISC1(n) (0x028 + 0x100 * (n))
32 #define CSIPHY_3PH_LNn_MISC1_IS_CLKLANE BIT(2)
33 #define CSIPHY_3PH_LNn_CFG6(n) (0x02c + 0x100 * (n))
34 #define CSIPHY_3PH_LNn_CFG6_SWI_FORCE_INIT_EXIT BIT(0)
35 #define CSIPHY_3PH_LNn_CFG7(n) (0x030 + 0x100 * (n))
36 #define CSIPHY_3PH_LNn_CFG7_SWI_T_INIT 0x2
37 #define CSIPHY_3PH_LNn_CFG8(n) (0x034 + 0x100 * (n))
38 #define CSIPHY_3PH_LNn_CFG8_SWI_SKIP_WAKEUP BIT(0)
39 #define CSIPHY_3PH_LNn_CFG8_SKEW_FILTER_ENABLE BIT(1)
40 #define CSIPHY_3PH_LNn_CFG9(n) (0x038 + 0x100 * (n))
41 #define CSIPHY_3PH_LNn_CFG9_SWI_T_WAKEUP 0x1
42 #define CSIPHY_3PH_LNn_CSI_LANE_CTRL15(n) (0x03c + 0x100 * (n))
43 #define CSIPHY_3PH_LNn_CSI_LANE_CTRL15_SWI_SOT_SYMBOL 0xb8
44
45 #define CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(offset, n) ((offset) + 0x4 * (n))
46 #define CSIPHY_3PH_CMN_CSI_COMMON_CTRL5_CLK_ENABLE BIT(7)
47 #define CSIPHY_3PH_CMN_CSI_COMMON_CTRL6_COMMON_PWRDN_B BIT(0)
48 #define CSIPHY_3PH_CMN_CSI_COMMON_CTRL6_SHOW_REV_ID BIT(1)
49 #define CSIPHY_3PH_CMN_CSI_COMMON_STATUSn(offset, n) ((offset) + 0xb0 + 0x4 * (n))
50
51 #define CSIPHY_DEFAULT_PARAMS 0
52 #define CSIPHY_LANE_ENABLE 1
53 #define CSIPHY_SETTLE_CNT_LOWER_BYTE 2
54 #define CSIPHY_SETTLE_CNT_HIGHER_BYTE 3
55 #define CSIPHY_DNP_PARAMS 4
56 #define CSIPHY_2PH_REGS 5
57 #define CSIPHY_3PH_REGS 6
58 #define CSIPHY_SKEW_CAL 7
59
60 struct csiphy_lane_regs {
61 s32 reg_addr;
62 s32 reg_data;
63 u32 delay_us;
64 u32 csiphy_param_type;
65 };
66
67 /* GEN2 1.0 2PH */
68 static const struct
69 csiphy_lane_regs lane_regs_sdm845[] = {
70 {0x0004, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
71 {0x002C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
72 {0x0034, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
73 {0x001C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
74 {0x0014, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
75 {0x0028, 0x00, 0x00, CSIPHY_DNP_PARAMS},
76 {0x003C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
77 {0x0000, 0x91, 0x00, CSIPHY_DEFAULT_PARAMS},
78 {0x0008, 0x00, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
79 {0x000c, 0x00, 0x00, CSIPHY_DNP_PARAMS},
80 {0x0010, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
81 {0x0038, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
82 {0x0060, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
83 {0x0064, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
84 {0x0704, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
85 {0x072C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
86 {0x0734, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
87 {0x071C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
88 {0x0714, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
89 {0x0728, 0x04, 0x00, CSIPHY_DEFAULT_PARAMS},
90 {0x073C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
91 {0x0700, 0x80, 0x00, CSIPHY_DEFAULT_PARAMS},
92 {0x0708, 0x14, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
93 {0x070C, 0xA5, 0x00, CSIPHY_DEFAULT_PARAMS},
94 {0x0710, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
95 {0x0738, 0x1F, 0x00, CSIPHY_DEFAULT_PARAMS},
96 {0x0760, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
97 {0x0764, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
98 {0x0204, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
99 {0x022C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
100 {0x0234, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
101 {0x021C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
102 {0x0214, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
103 {0x0228, 0x00, 0x00, CSIPHY_DNP_PARAMS},
104 {0x023C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
105 {0x0200, 0x91, 0x00, CSIPHY_DEFAULT_PARAMS},
106 {0x0208, 0x00, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
107 {0x020C, 0x00, 0x00, CSIPHY_DNP_PARAMS},
108 {0x0210, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
109 {0x0238, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
110 {0x0260, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
111 {0x0264, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
112 {0x0404, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
113 {0x042C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
114 {0x0434, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
115 {0x041C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
116 {0x0414, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
117 {0x0428, 0x00, 0x00, CSIPHY_DNP_PARAMS},
118 {0x043C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
119 {0x0400, 0x91, 0x00, CSIPHY_DEFAULT_PARAMS},
120 {0x0408, 0x00, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
121 {0x040C, 0x00, 0x00, CSIPHY_DNP_PARAMS},
122 {0x0410, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
123 {0x0438, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
124 {0x0460, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
125 {0x0464, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
126 {0x0604, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
127 {0x062C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
128 {0x0634, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
129 {0x061C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
130 {0x0614, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
131 {0x0628, 0x00, 0x00, CSIPHY_DNP_PARAMS},
132 {0x063C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
133 {0x0600, 0x91, 0x00, CSIPHY_DEFAULT_PARAMS},
134 {0x0608, 0x00, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
135 {0x060C, 0x00, 0x00, CSIPHY_DNP_PARAMS},
136 {0x0610, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
137 {0x0638, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
138 {0x0660, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
139 {0x0664, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
140 };
141
142 /* GEN2 1.1 2PH */
143 static const struct
144 csiphy_lane_regs lane_regs_sc8280xp[] = {
145 {0x0004, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
146 {0x002C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
147 {0x0034, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
148 {0x001C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
149 {0x0014, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
150 {0x0028, 0x00, 0x00, CSIPHY_DNP_PARAMS},
151 {0x003C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
152 {0x0000, 0x90, 0x00, CSIPHY_DEFAULT_PARAMS},
153 {0x0008, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
154 {0x000C, 0x00, 0x00, CSIPHY_DNP_PARAMS},
155 {0x0010, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
156 {0x0038, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
157 {0x0060, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
158 {0x0064, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
159 {0x0704, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
160 {0x072C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
161 {0x0734, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
162 {0x071C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
163 {0x0714, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
164 {0x0728, 0x04, 0x00, CSIPHY_DEFAULT_PARAMS},
165 {0x073C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
166 {0x0700, 0x80, 0x00, CSIPHY_DEFAULT_PARAMS},
167 {0x0708, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
168 {0x070C, 0xA5, 0x00, CSIPHY_DEFAULT_PARAMS},
169 {0x0710, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
170 {0x0738, 0x1F, 0x00, CSIPHY_DEFAULT_PARAMS},
171 {0x0760, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
172 {0x0764, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
173 {0x0204, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
174 {0x022C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
175 {0x0234, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
176 {0x021C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
177 {0x0214, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
178 {0x0228, 0x00, 0x00, CSIPHY_DNP_PARAMS},
179 {0x023C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
180 {0x0200, 0x90, 0x00, CSIPHY_DEFAULT_PARAMS},
181 {0x0208, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
182 {0x020C, 0x00, 0x00, CSIPHY_DNP_PARAMS},
183 {0x0210, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
184 {0x0238, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
185 {0x0260, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
186 {0x0264, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
187 {0x0404, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
188 {0x042C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
189 {0x0434, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
190 {0x041C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
191 {0x0414, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
192 {0x0428, 0x00, 0x00, CSIPHY_DNP_PARAMS},
193 {0x043C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
194 {0x0400, 0x90, 0x00, CSIPHY_DEFAULT_PARAMS},
195 {0x0408, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
196 {0x040C, 0x00, 0x00, CSIPHY_DNP_PARAMS},
197 {0x0410, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
198 {0x0438, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
199 {0x0460, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
200 {0x0464, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
201 {0x0604, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
202 {0x062C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
203 {0x0634, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
204 {0x061C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
205 {0x0614, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
206 {0x0628, 0x00, 0x00, CSIPHY_DNP_PARAMS},
207 {0x063C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
208 {0x0600, 0x90, 0x00, CSIPHY_DEFAULT_PARAMS},
209 {0x0608, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
210 {0x060C, 0x00, 0x00, CSIPHY_DNP_PARAMS},
211 {0x0610, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
212 {0x0638, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
213 {0x0660, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
214 {0x0664, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
215 };
216
217 /* GEN2 1.2.1 2PH */
218 static const struct
219 csiphy_lane_regs lane_regs_sm8250[] = {
220 {0x0030, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
221 {0x0900, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS},
222 {0x0908, 0x10, 0x00, CSIPHY_DEFAULT_PARAMS},
223 {0x0904, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
224 {0x0904, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS},
225 {0x0004, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
226 {0x002C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
227 {0x0034, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS},
228 {0x0010, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},
229 {0x001C, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
230 {0x003C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
231 {0x0008, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
232 {0x0000, 0x8D, 0x00, CSIPHY_DEFAULT_PARAMS},
233 {0x000c, 0x00, 0x00, CSIPHY_DNP_PARAMS},
234 {0x0038, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
235 {0x0014, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
236 {0x0028, 0x00, 0x00, CSIPHY_DNP_PARAMS},
237 {0x0024, 0x00, 0x00, CSIPHY_DNP_PARAMS},
238 {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},
239 {0x0884, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
240 {0x0730, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
241 {0x0C80, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS},
242 {0x0C88, 0x10, 0x00, CSIPHY_DEFAULT_PARAMS},
243 {0x0C84, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
244 {0x0C84, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS},
245 {0x0704, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
246 {0x072C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
247 {0x0734, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS},
248 {0x0710, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},
249 {0x071C, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
250 {0x073C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
251 {0x0708, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
252 {0x0700, 0x80, 0x00, CSIPHY_DEFAULT_PARAMS},
253 {0x070c, 0xA5, 0x00, CSIPHY_DEFAULT_PARAMS},
254 {0x0738, 0x1F, 0x00, CSIPHY_DEFAULT_PARAMS},
255 {0x0714, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
256 {0x0728, 0x04, 0x00, CSIPHY_DEFAULT_PARAMS},
257 {0x0724, 0x00, 0x00, CSIPHY_DNP_PARAMS},
258 {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},
259 {0x0884, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
260 {0x0230, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
261 {0x0A00, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS},
262 {0x0A08, 0x10, 0x00, CSIPHY_DEFAULT_PARAMS},
263 {0x0A04, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
264 {0x0A04, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS},
265 {0x0204, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
266 {0x022C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
267 {0x0234, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS},
268 {0x0210, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},
269 {0x021C, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
270 {0x023C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
271 {0x0208, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
272 {0x0200, 0x8D, 0x00, CSIPHY_DEFAULT_PARAMS},
273 {0x020c, 0x00, 0x00, CSIPHY_DNP_PARAMS},
274 {0x0238, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
275 {0x0214, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
276 {0x0228, 0x00, 0x00, CSIPHY_DNP_PARAMS},
277 {0x0224, 0x00, 0x00, CSIPHY_DNP_PARAMS},
278 {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},
279 {0x0884, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
280 {0x0430, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
281 {0x0B00, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS},
282 {0x0B08, 0x10, 0x00, CSIPHY_DEFAULT_PARAMS},
283 {0x0B04, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
284 {0x0B04, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS},
285 {0x0404, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
286 {0x042C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
287 {0x0434, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS},
288 {0x0410, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},
289 {0x041C, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
290 {0x043C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
291 {0x0408, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
292 {0x0400, 0x8D, 0x00, CSIPHY_DEFAULT_PARAMS},
293 {0x040c, 0x00, 0x00, CSIPHY_DNP_PARAMS},
294 {0x0438, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
295 {0x0414, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
296 {0x0428, 0x00, 0x00, CSIPHY_DNP_PARAMS},
297 {0x0424, 0x00, 0x00, CSIPHY_DNP_PARAMS},
298 {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},
299 {0x0884, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
300 {0x0630, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
301 {0x0C00, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS},
302 {0x0C08, 0x10, 0x00, CSIPHY_DEFAULT_PARAMS},
303 {0x0C04, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
304 {0x0C04, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS},
305 {0x0604, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
306 {0x062C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
307 {0x0634, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS},
308 {0x0610, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},
309 {0x061C, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
310 {0x063C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
311 {0x0608, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
312 {0x0600, 0x8D, 0x00, CSIPHY_DEFAULT_PARAMS},
313 {0x060c, 0x00, 0x00, CSIPHY_DNP_PARAMS},
314 {0x0638, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
315 {0x0614, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
316 {0x0628, 0x00, 0x00, CSIPHY_DNP_PARAMS},
317 {0x0624, 0x00, 0x00, CSIPHY_DNP_PARAMS},
318 {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},
319 {0x0884, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
320 };
321
322 /* GEN2 2.1.2 2PH DPHY mode */
323 static const struct
324 csiphy_lane_regs lane_regs_sm8550[] = {
325 {0x0E90, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
326 {0x0E98, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
327 {0x0E94, 0x07, 0x01, CSIPHY_DEFAULT_PARAMS},
328 {0x00A0, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
329 {0x0090, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
330 {0x0098, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
331 {0x0094, 0x07, 0x01, CSIPHY_DEFAULT_PARAMS},
332 {0x0494, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
333 {0x04A0, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
334 {0x0490, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
335 {0x0498, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
336 {0x0494, 0x07, 0x01, CSIPHY_DEFAULT_PARAMS},
337 {0x0894, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
338 {0x08A0, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
339 {0x0890, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
340 {0x0898, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
341 {0x0894, 0x07, 0x01, CSIPHY_DEFAULT_PARAMS},
342 {0x0C94, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
343 {0x0CA0, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
344 {0x0C90, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
345 {0x0C98, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
346 {0x0C94, 0x07, 0x01, CSIPHY_DEFAULT_PARAMS},
347 {0x0E30, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
348 {0x0E28, 0x04, 0x00, CSIPHY_DEFAULT_PARAMS},
349 {0x0E00, 0x80, 0x00, CSIPHY_DEFAULT_PARAMS},
350 {0x0E0C, 0xFF, 0x00, CSIPHY_DEFAULT_PARAMS},
351 {0x0E38, 0x1F, 0x00, CSIPHY_DEFAULT_PARAMS},
352 {0x0E2C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
353 {0x0E34, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
354 {0x0E1C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
355 {0x0E14, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
356 {0x0E3C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
357 {0x0E04, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
358 {0x0E20, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
359 {0x0E08, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
360 {0x0E10, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
361 {0x0030, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
362 {0x0000, 0x8E, 0x00, CSIPHY_DEFAULT_PARAMS},
363 {0x0038, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
364 {0x002C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
365 {0x0034, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
366 {0x001C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
367 {0x0014, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
368 {0x003C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
369 {0x0004, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
370 {0x0020, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
371 {0x0008, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
372 {0x0010, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
373 {0x0430, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
374 {0x0400, 0x8E, 0x00, CSIPHY_DEFAULT_PARAMS},
375 {0x0438, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
376 {0x042C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
377 {0x0434, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
378 {0x041C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
379 {0x0414, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
380 {0x043C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
381 {0x0404, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
382 {0x0420, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
383 {0x0408, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
384 {0x0410, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
385 {0x0830, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
386 {0x0800, 0x8E, 0x00, CSIPHY_DEFAULT_PARAMS},
387 {0x0838, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
388 {0x082C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
389 {0x0834, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
390 {0x081C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
391 {0x0814, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
392 {0x083C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
393 {0x0804, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
394 {0x0820, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
395 {0x0808, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
396 {0x0810, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
397 {0x0C30, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
398 {0x0C00, 0x8E, 0x00, CSIPHY_DEFAULT_PARAMS},
399 {0x0C38, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
400 {0x0C2C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
401 {0x0C34, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
402 {0x0C1C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
403 {0x0C14, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
404 {0x0C3C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
405 {0x0C04, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
406 {0x0C20, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
407 {0x0C08, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
408 {0x0C10, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
409 {0x0094, 0xD7, 0x00, CSIPHY_DEFAULT_PARAMS},
410 {0x005C, 0x04, 0x00, CSIPHY_DEFAULT_PARAMS},
411 {0x0060, 0xBD, 0x00, CSIPHY_DEFAULT_PARAMS},
412 {0x0064, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
413 {0x0494, 0xD7, 0x00, CSIPHY_DEFAULT_PARAMS},
414 {0x045C, 0x04, 0x00, CSIPHY_DEFAULT_PARAMS},
415 {0x0460, 0xBD, 0x00, CSIPHY_DEFAULT_PARAMS},
416 {0x0464, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
417 {0x0894, 0xD7, 0x00, CSIPHY_DEFAULT_PARAMS},
418 {0x085C, 0x04, 0x00, CSIPHY_DEFAULT_PARAMS},
419 {0x0860, 0xBD, 0x00, CSIPHY_DEFAULT_PARAMS},
420 {0x0864, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
421 {0x0C94, 0xD7, 0x00, CSIPHY_DEFAULT_PARAMS},
422 {0x0C5C, 0x04, 0x00, CSIPHY_DEFAULT_PARAMS},
423 {0x0C60, 0xBD, 0x00, CSIPHY_DEFAULT_PARAMS},
424 {0x0C64, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
425 };
426
427 /* 4nm 2PH v 2.1.2 2p5Gbps 4 lane DPHY mode */
428 static const struct
429 csiphy_lane_regs lane_regs_x1e80100[] = {
430 /* Power up lanes 2ph mode */
431 {0x1014, 0xD5, 0x00, CSIPHY_DEFAULT_PARAMS},
432 {0x101C, 0x7A, 0x00, CSIPHY_DEFAULT_PARAMS},
433 {0x1018, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
434
435 {0x0094, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
436 {0x00A0, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
437 {0x0090, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS},
438 {0x0098, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
439 {0x0094, 0x07, 0x01, CSIPHY_DEFAULT_PARAMS},
440 {0x0030, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
441 {0x0000, 0x8E, 0x00, CSIPHY_DEFAULT_PARAMS},
442 {0x0038, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
443 {0x002C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
444 {0x0034, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
445 {0x001C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
446 {0x0014, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
447 {0x003C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
448 {0x0004, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
449 {0x0020, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
450 {0x0008, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
451 {0x0010, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
452 {0x0094, 0xD7, 0x00, CSIPHY_SKEW_CAL},
453 {0x005C, 0x00, 0x00, CSIPHY_SKEW_CAL},
454 {0x0060, 0xBD, 0x00, CSIPHY_SKEW_CAL},
455 {0x0064, 0x7F, 0x00, CSIPHY_SKEW_CAL},
456
457 {0x0E94, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
458 {0x0EA0, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
459 {0x0E90, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS},
460 {0x0E98, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
461 {0x0E94, 0x07, 0x01, CSIPHY_DEFAULT_PARAMS},
462 {0x0E30, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
463 {0x0E28, 0x04, 0x00, CSIPHY_DEFAULT_PARAMS},
464 {0x0E00, 0x80, 0x00, CSIPHY_DEFAULT_PARAMS},
465 {0x0E0C, 0xFF, 0x00, CSIPHY_DEFAULT_PARAMS},
466 {0x0E38, 0x1F, 0x00, CSIPHY_DEFAULT_PARAMS},
467 {0x0E2C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
468 {0x0E34, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
469 {0x0E1C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
470 {0x0E14, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
471 {0x0E3C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
472 {0x0E04, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
473 {0x0E20, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
474 {0x0E08, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
475 {0x0E10, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
476
477 {0x0494, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
478 {0x04A0, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
479 {0x0490, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS},
480 {0x0498, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
481 {0x0494, 0x07, 0x01, CSIPHY_DEFAULT_PARAMS},
482 {0x0430, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
483 {0x0400, 0x8E, 0x00, CSIPHY_DEFAULT_PARAMS},
484 {0x0438, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
485 {0x042C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
486 {0x0434, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
487 {0x041C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
488 {0x0414, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
489 {0x043C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
490 {0x0404, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
491 {0x0420, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
492 {0x0408, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
493 {0x0410, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
494 {0x0494, 0xD7, 0x00, CSIPHY_SKEW_CAL},
495 {0x045C, 0x00, 0x00, CSIPHY_SKEW_CAL},
496 {0x0460, 0xBD, 0x00, CSIPHY_SKEW_CAL},
497 {0x0464, 0x7F, 0x00, CSIPHY_SKEW_CAL},
498
499 {0x0894, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
500 {0x08A0, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
501 {0x0890, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS},
502 {0x0898, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
503 {0x0894, 0x07, 0x01, CSIPHY_DEFAULT_PARAMS},
504 {0x0830, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
505 {0x0800, 0x8E, 0x00, CSIPHY_DEFAULT_PARAMS},
506 {0x0838, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
507 {0x082C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
508 {0x0834, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
509 {0x081C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
510 {0x0814, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
511 {0x083C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
512 {0x0804, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
513 {0x0820, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
514 {0x0808, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
515 {0x0810, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
516 {0x0894, 0xD7, 0x00, CSIPHY_SKEW_CAL},
517 {0x085C, 0x00, 0x00, CSIPHY_SKEW_CAL},
518 {0x0860, 0xBD, 0x00, CSIPHY_SKEW_CAL},
519 {0x0864, 0x7F, 0x00, CSIPHY_SKEW_CAL},
520
521 {0x0C94, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
522 {0x0CA0, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
523 {0x0C90, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS},
524 {0x0C98, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
525 {0x0C94, 0x07, 0x01, CSIPHY_DEFAULT_PARAMS},
526 {0x0C30, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
527 {0x0C00, 0x8E, 0x00, CSIPHY_DEFAULT_PARAMS},
528 {0x0C38, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
529 {0x0C2C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
530 {0x0C34, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
531 {0x0C1C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
532 {0x0C14, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
533 {0x0C3C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
534 {0x0C04, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
535 {0x0C20, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
536 {0x0C08, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
537 {0x0C10, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
538 {0x0C94, 0xD7, 0x00, CSIPHY_SKEW_CAL},
539 {0x0C5C, 0x00, 0x00, CSIPHY_SKEW_CAL},
540 {0x0C60, 0xBD, 0x00, CSIPHY_SKEW_CAL},
541 {0x0C64, 0x7F, 0x00, CSIPHY_SKEW_CAL},
542 };
543
csiphy_hw_version_read(struct csiphy_device * csiphy,struct device * dev)544 static void csiphy_hw_version_read(struct csiphy_device *csiphy,
545 struct device *dev)
546 {
547 struct csiphy_device_regs *regs = csiphy->regs;
548 u32 hw_version;
549
550 writel(CSIPHY_3PH_CMN_CSI_COMMON_CTRL6_SHOW_REV_ID, csiphy->base +
551 CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(regs->offset, 6));
552
553 hw_version = readl_relaxed(csiphy->base +
554 CSIPHY_3PH_CMN_CSI_COMMON_STATUSn(regs->offset, 12));
555 hw_version |= readl_relaxed(csiphy->base +
556 CSIPHY_3PH_CMN_CSI_COMMON_STATUSn(regs->offset, 13)) << 8;
557 hw_version |= readl_relaxed(csiphy->base +
558 CSIPHY_3PH_CMN_CSI_COMMON_STATUSn(regs->offset, 14)) << 16;
559 hw_version |= readl_relaxed(csiphy->base +
560 CSIPHY_3PH_CMN_CSI_COMMON_STATUSn(regs->offset, 15)) << 24;
561
562 dev_dbg(dev, "CSIPHY 3PH HW Version = 0x%08x\n", hw_version);
563 }
564
565 /*
566 * csiphy_reset - Perform software reset on CSIPHY module
567 * @csiphy: CSIPHY device
568 */
csiphy_reset(struct csiphy_device * csiphy)569 static void csiphy_reset(struct csiphy_device *csiphy)
570 {
571 struct csiphy_device_regs *regs = csiphy->regs;
572
573 writel_relaxed(0x1, csiphy->base +
574 CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(regs->offset, 0));
575 usleep_range(5000, 8000);
576 writel_relaxed(0x0, csiphy->base +
577 CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(regs->offset, 0));
578 }
579
csiphy_isr(int irq,void * dev)580 static irqreturn_t csiphy_isr(int irq, void *dev)
581 {
582 struct csiphy_device *csiphy = dev;
583 struct csiphy_device_regs *regs = csiphy->regs;
584 int i;
585
586 for (i = 0; i < 11; i++) {
587 int c = i + 22;
588 u8 val = readl_relaxed(csiphy->base +
589 CSIPHY_3PH_CMN_CSI_COMMON_STATUSn(regs->offset, i));
590
591 writel_relaxed(val, csiphy->base +
592 CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(regs->offset, c));
593 }
594
595 writel_relaxed(0x1, csiphy->base +
596 CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(regs->offset, 10));
597 writel_relaxed(0x0, csiphy->base +
598 CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(regs->offset, 10));
599
600 for (i = 22; i < 33; i++) {
601 writel_relaxed(0x0, csiphy->base +
602 CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(regs->offset, i));
603 }
604
605 return IRQ_HANDLED;
606 }
607
608 /*
609 * csiphy_settle_cnt_calc - Calculate settle count value
610 *
611 * Helper function to calculate settle count value. This is
612 * based on the CSI2 T_hs_settle parameter which in turn
613 * is calculated based on the CSI2 transmitter link frequency.
614 *
615 * Return settle count value or 0 if the CSI2 link frequency
616 * is not available
617 */
csiphy_settle_cnt_calc(s64 link_freq,u32 timer_clk_rate)618 static u8 csiphy_settle_cnt_calc(s64 link_freq, u32 timer_clk_rate)
619 {
620 u32 ui; /* ps */
621 u32 timer_period; /* ps */
622 u32 t_hs_prepare_max; /* ps */
623 u32 t_hs_settle; /* ps */
624 u8 settle_cnt;
625
626 if (link_freq <= 0)
627 return 0;
628
629 ui = div_u64(1000000000000LL, link_freq);
630 ui /= 2;
631 t_hs_prepare_max = 85000 + 6 * ui;
632 t_hs_settle = t_hs_prepare_max;
633
634 timer_period = div_u64(1000000000000LL, timer_clk_rate);
635 settle_cnt = t_hs_settle / timer_period - 6;
636
637 return settle_cnt;
638 }
639
csiphy_gen1_config_lanes(struct csiphy_device * csiphy,struct csiphy_config * cfg,u8 settle_cnt)640 static void csiphy_gen1_config_lanes(struct csiphy_device *csiphy,
641 struct csiphy_config *cfg,
642 u8 settle_cnt)
643 {
644 struct csiphy_lanes_cfg *c = &cfg->csi2->lane_cfg;
645 int i, l = 0;
646 u8 val;
647
648 for (i = 0; i <= c->num_data; i++) {
649 if (i == c->num_data)
650 l = 7;
651 else
652 l = c->data[i].pos * 2;
653
654 val = CSIPHY_3PH_LNn_CFG1_SWI_REC_DLY_PRG;
655 val |= 0x17;
656 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG1(l));
657
658 val = CSIPHY_3PH_LNn_CFG2_LP_REC_EN_INT;
659 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG2(l));
660
661 val = settle_cnt;
662 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG3(l));
663
664 val = CSIPHY_3PH_LNn_CFG5_T_HS_DTERM |
665 CSIPHY_3PH_LNn_CFG5_HS_REC_EQ_FQ_INT;
666 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG5(l));
667
668 val = CSIPHY_3PH_LNn_CFG6_SWI_FORCE_INIT_EXIT;
669 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG6(l));
670
671 val = CSIPHY_3PH_LNn_CFG7_SWI_T_INIT;
672 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG7(l));
673
674 val = CSIPHY_3PH_LNn_CFG8_SWI_SKIP_WAKEUP |
675 CSIPHY_3PH_LNn_CFG8_SKEW_FILTER_ENABLE;
676 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG8(l));
677
678 val = CSIPHY_3PH_LNn_CFG9_SWI_T_WAKEUP;
679 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG9(l));
680
681 val = CSIPHY_3PH_LNn_TEST_IMP_HS_TERM_IMP;
682 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_TEST_IMP(l));
683
684 val = CSIPHY_3PH_LNn_CSI_LANE_CTRL15_SWI_SOT_SYMBOL;
685 writel_relaxed(val, csiphy->base +
686 CSIPHY_3PH_LNn_CSI_LANE_CTRL15(l));
687 }
688
689 val = CSIPHY_3PH_LNn_CFG1_SWI_REC_DLY_PRG;
690 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG1(l));
691
692 if (csiphy->camss->res->version == CAMSS_660)
693 val = CSIPHY_3PH_LNn_CFG4_T_HS_CLK_MISS_660;
694 else
695 val = CSIPHY_3PH_LNn_CFG4_T_HS_CLK_MISS;
696 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG4(l));
697
698 val = CSIPHY_3PH_LNn_MISC1_IS_CLKLANE;
699 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_MISC1(l));
700 }
701
csiphy_gen2_config_lanes(struct csiphy_device * csiphy,u8 settle_cnt)702 static void csiphy_gen2_config_lanes(struct csiphy_device *csiphy,
703 u8 settle_cnt)
704 {
705 const struct csiphy_lane_regs *r = csiphy->regs->lane_regs;
706 int i, array_size = csiphy->regs->lane_array_size;
707 u32 val;
708
709 for (i = 0; i < array_size; i++, r++) {
710 switch (r->csiphy_param_type) {
711 case CSIPHY_SETTLE_CNT_LOWER_BYTE:
712 val = settle_cnt & 0xff;
713 break;
714 case CSIPHY_SKEW_CAL:
715 /* TODO: support application of skew from dt flag */
716 continue;
717 case CSIPHY_DNP_PARAMS:
718 continue;
719 default:
720 val = r->reg_data;
721 break;
722 }
723 writel_relaxed(val, csiphy->base + r->reg_addr);
724 if (r->delay_us)
725 udelay(r->delay_us);
726 }
727 }
728
csiphy_get_lane_mask(struct csiphy_lanes_cfg * lane_cfg)729 static u8 csiphy_get_lane_mask(struct csiphy_lanes_cfg *lane_cfg)
730 {
731 u8 lane_mask;
732 int i;
733
734 lane_mask = CSIPHY_3PH_CMN_CSI_COMMON_CTRL5_CLK_ENABLE;
735
736 for (i = 0; i < lane_cfg->num_data; i++)
737 lane_mask |= 1 << lane_cfg->data[i].pos;
738
739 return lane_mask;
740 }
741
csiphy_is_gen2(u32 version)742 static bool csiphy_is_gen2(u32 version)
743 {
744 bool ret = false;
745
746 switch (version) {
747 case CAMSS_7280:
748 case CAMSS_8250:
749 case CAMSS_8280XP:
750 case CAMSS_845:
751 case CAMSS_8550:
752 case CAMSS_X1E80100:
753 ret = true;
754 break;
755 }
756
757 return ret;
758 }
759
csiphy_lanes_enable(struct csiphy_device * csiphy,struct csiphy_config * cfg,s64 link_freq,u8 lane_mask)760 static void csiphy_lanes_enable(struct csiphy_device *csiphy,
761 struct csiphy_config *cfg,
762 s64 link_freq, u8 lane_mask)
763 {
764 struct csiphy_lanes_cfg *c = &cfg->csi2->lane_cfg;
765 struct csiphy_device_regs *regs = csiphy->regs;
766 u8 settle_cnt;
767 u8 val;
768 int i;
769
770 settle_cnt = csiphy_settle_cnt_calc(link_freq, csiphy->timer_clk_rate);
771
772 val = CSIPHY_3PH_CMN_CSI_COMMON_CTRL5_CLK_ENABLE;
773 for (i = 0; i < c->num_data; i++)
774 val |= BIT(c->data[i].pos * 2);
775
776 writel_relaxed(val, csiphy->base +
777 CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(regs->offset, 5));
778
779 val = CSIPHY_3PH_CMN_CSI_COMMON_CTRL6_COMMON_PWRDN_B;
780 writel_relaxed(val, csiphy->base +
781 CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(regs->offset, 6));
782
783 val = 0x02;
784 writel_relaxed(val, csiphy->base +
785 CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(regs->offset, 7));
786
787 val = 0x00;
788 writel_relaxed(val, csiphy->base +
789 CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(regs->offset, 0));
790
791 if (csiphy_is_gen2(csiphy->camss->res->version))
792 csiphy_gen2_config_lanes(csiphy, settle_cnt);
793 else
794 csiphy_gen1_config_lanes(csiphy, cfg, settle_cnt);
795
796 /* IRQ_MASK registers - disable all interrupts */
797 for (i = 11; i < 22; i++) {
798 writel_relaxed(0, csiphy->base +
799 CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(regs->offset, i));
800 }
801 }
802
csiphy_lanes_disable(struct csiphy_device * csiphy,struct csiphy_config * cfg)803 static void csiphy_lanes_disable(struct csiphy_device *csiphy,
804 struct csiphy_config *cfg)
805 {
806 struct csiphy_device_regs *regs = csiphy->regs;
807
808 writel_relaxed(0, csiphy->base +
809 CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(regs->offset, 5));
810
811 writel_relaxed(0, csiphy->base +
812 CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(regs->offset, 6));
813 }
814
csiphy_init(struct csiphy_device * csiphy)815 static int csiphy_init(struct csiphy_device *csiphy)
816 {
817 struct device *dev = csiphy->camss->dev;
818 struct csiphy_device_regs *regs;
819
820 regs = devm_kmalloc(dev, sizeof(*regs), GFP_KERNEL);
821 if (!regs)
822 return -ENOMEM;
823
824 csiphy->regs = regs;
825 regs->offset = 0x800;
826
827 switch (csiphy->camss->res->version) {
828 case CAMSS_845:
829 regs->lane_regs = &lane_regs_sdm845[0];
830 regs->lane_array_size = ARRAY_SIZE(lane_regs_sdm845);
831 break;
832 case CAMSS_7280:
833 case CAMSS_8250:
834 regs->lane_regs = &lane_regs_sm8250[0];
835 regs->lane_array_size = ARRAY_SIZE(lane_regs_sm8250);
836 break;
837 case CAMSS_8280XP:
838 regs->lane_regs = &lane_regs_sc8280xp[0];
839 regs->lane_array_size = ARRAY_SIZE(lane_regs_sc8280xp);
840 break;
841 case CAMSS_X1E80100:
842 regs->lane_regs = &lane_regs_x1e80100[0];
843 regs->lane_array_size = ARRAY_SIZE(lane_regs_x1e80100);
844 regs->offset = 0x1000;
845 break;
846 case CAMSS_8550:
847 regs->lane_regs = &lane_regs_sm8550[0];
848 regs->lane_array_size = ARRAY_SIZE(lane_regs_sm8550);
849 regs->offset = 0x1000;
850 break;
851 default:
852 break;
853 }
854
855 return 0;
856 }
857
858 const struct csiphy_hw_ops csiphy_ops_3ph_1_0 = {
859 .get_lane_mask = csiphy_get_lane_mask,
860 .hw_version_read = csiphy_hw_version_read,
861 .reset = csiphy_reset,
862 .lanes_enable = csiphy_lanes_enable,
863 .lanes_disable = csiphy_lanes_disable,
864 .isr = csiphy_isr,
865 .init = csiphy_init,
866 };
867