1# SPDX-License-Identifier: GPL-2.0 2# 3# PCI configuration 4# 5 6# select this to offer the PCI prompt 7config HAVE_PCI 8 bool 9 10# select this to unconditionally force on PCI support 11config FORCE_PCI 12 bool 13 select HAVE_PCI 14 select PCI 15 16# select this to provide a generic PCI iomap, 17# without PCI itself having to be defined 18config GENERIC_PCI_IOMAP 19 bool 20 21menuconfig PCI 22 bool "PCI support" 23 depends on HAVE_PCI 24 depends on MMU 25 help 26 This option enables support for the PCI local bus, including 27 support for PCI-X and the foundations for PCI Express support. 28 Say 'Y' here unless you know what you are doing. 29 30if PCI 31 32config PCI_DOMAINS 33 bool 34 35config PCI_DOMAINS_GENERIC 36 bool 37 select PCI_DOMAINS 38 39config PCI_SYSCALL 40 bool 41 42source "drivers/pci/pcie/Kconfig" 43 44config PCI_MSI 45 bool "Message Signaled Interrupts (MSI and MSI-X)" 46 select GENERIC_MSI_IRQ 47 help 48 This allows device drivers to enable MSI (Message Signaled 49 Interrupts). Message Signaled Interrupts enable a device to 50 generate an interrupt using an inbound Memory Write on its 51 PCI bus instead of asserting a device IRQ pin. 52 53 Use of PCI MSI interrupts can be disabled at kernel boot time 54 by using the 'pci=nomsi' option. This disables MSI for the 55 entire system. 56 57 If you don't know what to do here, say Y. 58 59config PCI_MSI_ARCH_FALLBACKS 60 bool 61 62config PCI_QUIRKS 63 default y 64 bool "Enable PCI quirk workarounds" if EXPERT 65 help 66 This enables workarounds for various PCI chipset bugs/quirks. 67 Disable this only if your target machine is unaffected by PCI 68 quirks. 69 70config PCI_DEBUG 71 bool "PCI Debugging" 72 depends on DEBUG_KERNEL 73 help 74 Say Y here if you want the PCI core to produce a bunch of debug 75 messages to the system log. Select this if you are having a 76 problem with PCI support and want to see more of what is going on. 77 78 When in doubt, say N. 79 80config PCI_REALLOC_ENABLE_AUTO 81 bool "Enable PCI resource re-allocation detection" 82 depends on PCI_IOV 83 help 84 Say Y here if you want the PCI core to detect if PCI resource 85 re-allocation needs to be enabled. You can always use pci=realloc=on 86 or pci=realloc=off to override it. It will automatically 87 re-allocate PCI resources if SR-IOV BARs have not been allocated by 88 the BIOS. 89 90 When in doubt, say N. 91 92config PCI_STUB 93 tristate "PCI Stub driver" 94 help 95 Say Y or M here if you want be able to reserve a PCI device 96 when it is going to be assigned to a guest operating system. 97 98 When in doubt, say N. 99 100config PCI_PF_STUB 101 tristate "PCI PF Stub driver" 102 depends on PCI_IOV 103 help 104 Say Y or M here if you want to enable support for devices that 105 require SR-IOV support, while at the same time the PF (Physical 106 Function) itself is not providing any actual services on the 107 host itself such as storage or networking. 108 109 When in doubt, say N. 110 111config XEN_PCIDEV_FRONTEND 112 tristate "Xen PCI Frontend" 113 depends on XEN_PV 114 select PCI_XEN 115 select XEN_XENBUS_FRONTEND 116 default y 117 help 118 The PCI device frontend driver allows the kernel to import arbitrary 119 PCI devices from a PCI backend to support PCI driver domains. 120 121config PCI_ATS 122 bool 123 124config PCI_IDE 125 bool 126 127config PCI_TSM 128 bool "PCI TSM: Device security protocol support" 129 select PCI_IDE 130 select PCI_DOE 131 select TSM 132 help 133 The TEE (Trusted Execution Environment) Device Interface 134 Security Protocol (TDISP) defines a "TSM" as a platform agent 135 that manages device authentication, link encryption, link 136 integrity protection, and assignment of PCI device functions 137 (virtual or physical) to confidential computing VMs that can 138 access (DMA) guest private memory. 139 140 Enable a platform TSM driver to use this capability. 141 142config PCI_DOE 143 bool "Enable PCI Data Object Exchange (DOE) support" 144 help 145 Say Y here if you want be able to communicate with PCIe DOE 146 mailboxes. 147 148config PCI_ECAM 149 bool 150 151config PCI_LOCKLESS_CONFIG 152 bool 153 154config PCI_BRIDGE_EMUL 155 bool 156 157config PCI_IOV 158 bool "PCI IOV support" 159 select PCI_ATS 160 help 161 I/O Virtualization is a PCI feature supported by some devices 162 which allows them to create virtual devices which share their 163 physical resources. 164 165 If unsure, say N. 166 167config PCI_NPEM 168 bool "Native PCIe Enclosure Management" 169 depends on LEDS_CLASS=y 170 help 171 Support for Native PCIe Enclosure Management. It allows managing LED 172 indications in storage enclosures. Enclosure must support following 173 indications: OK, Locate, Fail, Rebuild, other indications are 174 optional. 175 176config PCI_PRI 177 bool "PCI PRI support" 178 select PCI_ATS 179 help 180 PRI is the PCI Page Request Interface. It allows PCI devices that are 181 behind an IOMMU to recover from page faults. 182 183 If unsure, say N. 184 185config PCI_PASID 186 bool "PCI PASID support" 187 select PCI_ATS 188 help 189 Process Address Space Identifiers (PASIDs) can be used by PCI devices 190 to access more than one IO address space at the same time. To make 191 use of this feature an IOMMU is required which also supports PASIDs. 192 Select this option if you have such an IOMMU and want to compile the 193 driver for it into your kernel. 194 195 If unsure, say N. 196 197config PCIE_TPH 198 bool "TLP Processing Hints" 199 help 200 This option adds support for PCIe TLP Processing Hints (TPH). 201 TPH allows endpoint devices to provide optimization hints, such as 202 desired caching behavior, for requests that target memory space. 203 These hints, called Steering Tags, can empower the system hardware 204 to optimize the utilization of platform resources. 205 206config PCI_P2PDMA 207 bool "PCI peer-to-peer transfer support" 208 depends on ZONE_DEVICE 209 # 210 # The need for the scatterlist DMA bus address flag means PCI P2PDMA 211 # requires 64bit 212 # 213 depends on 64BIT 214 select GENERIC_ALLOCATOR 215 select NEED_SG_DMA_FLAGS 216 help 217 Enables drivers to do PCI peer-to-peer transactions to and from 218 BARs that are exposed in other devices that are the part of 219 the hierarchy where peer-to-peer DMA is guaranteed by the PCI 220 specification to work (ie. anything below a single PCI bridge). 221 222 Many PCIe root complexes do not support P2P transactions and 223 it's hard to tell which support it at all, so at this time, 224 P2P DMA transactions must be between devices behind the same root 225 port. 226 227 If unsure, say N. 228 229config PCI_LABEL 230 def_bool y if (DMI || ACPI) 231 select NLS 232 233config PCI_HYPERV 234 tristate "Hyper-V PCI Frontend" 235 depends on ((X86 && X86_64) || ARM64) && HYPERV_VMBUS && PCI_MSI && SYSFS 236 select PCI_HYPERV_INTERFACE 237 select IRQ_MSI_LIB 238 help 239 The PCI device frontend driver allows the kernel to import arbitrary 240 PCI devices from a PCI backend to support PCI driver domains. 241 242config PCI_DYNAMIC_OF_NODES 243 bool "Create Device tree nodes for PCI devices" 244 depends on OF_IRQ 245 select OF_DYNAMIC 246 help 247 This option enables support for generating device tree nodes for some 248 PCI devices. Thus, the driver of this kind can load and overlay 249 flattened device tree for its downstream devices. 250 251 Once this option is selected, the device tree nodes will be generated 252 for all PCI bridges. 253 254choice 255 prompt "PCI Express hierarchy optimization setting" 256 default PCIE_BUS_DEFAULT 257 depends on EXPERT 258 help 259 MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe 260 device parameters that affect performance and the ability to 261 support hotplug and peer-to-peer DMA. 262 263 The following choices set the MPS and MRRS optimization strategy 264 at compile-time. The choices are the same as those offered for 265 the kernel command-line parameter 'pci', i.e., 266 'pci=pcie_bus_tune_off', 'pci=pcie_bus_safe', 267 'pci=pcie_bus_perf', and 'pci=pcie_bus_peer2peer'. 268 269 This is a compile-time setting and can be overridden by the above 270 command-line parameters. If unsure, choose PCIE_BUS_DEFAULT. 271 272config PCIE_BUS_TUNE_OFF 273 bool "Tune Off" 274 help 275 Use the BIOS defaults; don't touch MPS at all. This is the same 276 as booting with 'pci=pcie_bus_tune_off'. 277 278config PCIE_BUS_DEFAULT 279 bool "Default" 280 help 281 Default choice; ensure that the MPS matches upstream bridge. 282 283config PCIE_BUS_SAFE 284 bool "Safe" 285 help 286 Use largest MPS that boot-time devices support. If you have a 287 closed system with no possibility of adding new devices, this 288 will use the largest MPS that's supported by all devices. This 289 is the same as booting with 'pci=pcie_bus_safe'. 290 291config PCIE_BUS_PERFORMANCE 292 bool "Performance" 293 help 294 Use MPS and MRRS for best performance. Ensure that a given 295 device's MPS is no larger than its parent MPS, which allows us to 296 keep all switches/bridges to the max MPS supported by their 297 parent. This is the same as booting with 'pci=pcie_bus_perf'. 298 299config PCIE_BUS_PEER2PEER 300 bool "Peer2peer" 301 help 302 Set MPS = 128 for all devices. MPS configuration effected by the 303 other options could cause the MPS on one root port to be 304 different than that of the MPS on another, which may cause 305 hot-added devices or peer-to-peer DMA to fail. Set MPS to the 306 smallest possible value (128B) system-wide to avoid these issues. 307 This is the same as booting with 'pci=pcie_bus_peer2peer'. 308 309endchoice 310 311config VGA_ARB 312 bool "VGA Arbitration" if EXPERT 313 default y 314 depends on !S390 315 select SCREEN_INFO if X86 316 help 317 Some "legacy" VGA devices implemented on PCI typically have the same 318 hard-decoded addresses as they did on ISA. When multiple PCI devices 319 are accessed at same time they need some kind of coordination. Please 320 see Documentation/gpu/vgaarbiter.rst for more details. Select this to 321 enable VGA arbiter. 322 323config VGA_ARB_MAX_GPUS 324 int "Maximum number of GPUs" 325 default 16 326 depends on VGA_ARB 327 help 328 Reserves space in the kernel to maintain resource locking for 329 multiple GPUS. The overhead for each GPU is very small. 330 331source "drivers/pci/hotplug/Kconfig" 332source "drivers/pci/controller/Kconfig" 333source "drivers/pci/endpoint/Kconfig" 334source "drivers/pci/switch/Kconfig" 335source "drivers/pci/pwrctrl/Kconfig" 336 337endif # PCI 338