1# SPDX-License-Identifier: GPL-2.0-only 2# 3# For a description of the syntax of this configuration file, 4# see Documentation/kbuild/kconfig-language.rst. 5# 6 7config 64BIT 8 bool 9 10config 32BIT 11 bool 12 13config RISCV 14 def_bool y 15 select ACPI_GENERIC_GSI if ACPI 16 select ACPI_MCFG if (ACPI && PCI) 17 select ACPI_PPTT if ACPI 18 select ACPI_REDUCED_HARDWARE_ONLY if ACPI 19 select ACPI_RIMT if ACPI 20 select ACPI_SPCR_TABLE if ACPI 21 select ARCH_DMA_DEFAULT_COHERENT 22 select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION 23 select ARCH_ENABLE_MEMORY_HOTPLUG if SPARSEMEM_VMEMMAP 24 select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG 25 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 26 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE 27 select ARCH_HAS_BINFMT_FLAT 28 select ARCH_HAS_CURRENT_STACK_POINTER 29 select ARCH_HAS_DEBUG_VIRTUAL if MMU 30 select ARCH_HAS_DEBUG_VM_PGTABLE 31 select ARCH_HAS_DEBUG_WX 32 select ARCH_HAS_ELF_CORE_EFLAGS if BINFMT_ELF && ELF_CORE 33 select ARCH_HAS_FAST_MULTIPLIER 34 select ARCH_HAS_FORTIFY_SOURCE 35 select ARCH_HAS_GCOV_PROFILE_ALL 36 select ARCH_HAS_GIGANTIC_PAGE 37 select ARCH_HAS_HW_PTE_YOUNG 38 select ARCH_HAS_KCOV 39 select ARCH_HAS_KERNEL_FPU_SUPPORT if 64BIT && FPU 40 select ARCH_HAS_MEMBARRIER_CALLBACKS 41 select ARCH_HAS_MEMBARRIER_SYNC_CORE 42 select ARCH_HAS_MMIOWB 43 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE 44 select ARCH_HAS_PMEM_API 45 select ARCH_HAS_PREEMPT_LAZY 46 select ARCH_HAS_PREPARE_SYNC_CORE_CMD 47 select ARCH_HAS_PTDUMP if MMU 48 select ARCH_HAS_PTE_SPECIAL 49 select ARCH_HAS_SET_DIRECT_MAP if MMU 50 select ARCH_HAS_SET_MEMORY if MMU 51 select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL 52 select ARCH_HAS_STRICT_MODULE_RWX if MMU && !XIP_KERNEL 53 select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE 54 select ARCH_HAS_SYSCALL_WRAPPER 55 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 56 select ARCH_HAS_UBSAN 57 select ARCH_HAS_VDSO_ARCH_DATA if HAVE_GENERIC_VDSO 58 select ARCH_HAVE_NMI_SAFE_CMPXCHG 59 select ARCH_KEEP_MEMBLOCK if ACPI 60 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE if 64BIT && MMU 61 select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX 62 select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT 63 select ARCH_STACKWALK 64 select ARCH_SUPPORTS_ATOMIC_RMW 65 # clang >= 17: https://github.com/llvm/llvm-project/commit/62fa708ceb027713b386c7e0efda994f8bdc27e2 66 select ARCH_SUPPORTS_CFI if (!CC_IS_CLANG || CLANG_VERSION >= 170000) 67 select ARCH_SUPPORTS_DEBUG_PAGEALLOC if MMU 68 select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE 69 select ARCH_SUPPORTS_HUGETLBFS if MMU 70 select ARCH_SUPPORTS_LTO_CLANG if CMODEL_MEDANY 71 select ARCH_SUPPORTS_LTO_CLANG_THIN 72 select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS if 64BIT && MMU 73 select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU 74 select ARCH_SUPPORTS_PER_VMA_LOCK if MMU 75 select ARCH_SUPPORTS_RT 76 select ARCH_SUPPORTS_SHADOW_CALL_STACK if HAVE_SHADOW_CALL_STACK 77 select ARCH_SUPPORTS_SCHED_MC if SMP 78 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 79 select ARCH_USE_MEMTEST 80 select ARCH_USE_QUEUED_RWLOCKS 81 select ARCH_USE_SYM_ANNOTATIONS 82 select ARCH_USES_CFI_TRAPS if CFI 83 select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH if MMU 84 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU 85 select ARCH_WANT_FRAME_POINTERS 86 select ARCH_WANT_GENERAL_HUGETLB if !RISCV_ISA_SVNAPOT 87 select ARCH_WANT_HUGE_PMD_SHARE if 64BIT 88 select ARCH_WANT_LD_ORPHAN_WARN if !XIP_KERNEL 89 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP 90 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP 91 select ARCH_WANTS_NO_INSTR 92 select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE 93 select ARCH_WEAK_RELEASE_ACQUIRE if ARCH_USE_QUEUED_SPINLOCKS 94 select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU 95 select BUILDTIME_TABLE_SORT if MMU 96 select CLINT_TIMER if RISCV_M_MODE 97 select CLONE_BACKWARDS 98 select COMMON_CLK 99 select CPU_NO_EFFICIENT_FFS if !RISCV_ISA_ZBB 100 select CPU_PM if CPU_IDLE || HIBERNATION || SUSPEND 101 select DYNAMIC_FTRACE if FUNCTION_TRACER 102 select EDAC_SUPPORT 103 select FRAME_POINTER if PERF_EVENTS || (FUNCTION_TRACER && !DYNAMIC_FTRACE) 104 select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY if DYNAMIC_FTRACE 105 select FUNCTION_ALIGNMENT_8B if DYNAMIC_FTRACE_WITH_CALL_OPS 106 select GENERIC_ARCH_TOPOLOGY 107 select GENERIC_ATOMIC64 if !64BIT 108 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 109 select GENERIC_CPU_DEVICES 110 select GENERIC_CPU_VULNERABILITIES 111 select GENERIC_EARLY_IOREMAP 112 select GENERIC_ENTRY 113 select GENERIC_GETTIMEOFDAY if HAVE_GENERIC_VDSO && 64BIT 114 select GENERIC_IDLE_POLL_SETUP 115 select GENERIC_IOREMAP if MMU 116 select GENERIC_IRQ_IPI if SMP 117 select GENERIC_IRQ_IPI_MUX if SMP 118 select GENERIC_IRQ_MULTI_HANDLER 119 select GENERIC_IRQ_SHOW 120 select GENERIC_IRQ_SHOW_LEVEL 121 select GENERIC_LIB_DEVMEM_IS_ALLOWED 122 select GENERIC_PENDING_IRQ if SMP 123 select GENERIC_PCI_IOMAP 124 select GENERIC_SCHED_CLOCK 125 select GENERIC_SMP_IDLE_THREAD 126 select GENERIC_TIME_VSYSCALL if GENERIC_GETTIMEOFDAY 127 select HARDIRQS_SW_RESEND 128 select HAS_IOPORT if MMU 129 select HAVE_ALIGNED_STRUCT_PAGE 130 select HAVE_ARCH_AUDITSYSCALL 131 select HAVE_ARCH_HUGE_VMALLOC if HAVE_ARCH_HUGE_VMAP 132 select HAVE_ARCH_HUGE_VMAP if MMU && 64BIT 133 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL 134 select HAVE_ARCH_JUMP_LABEL_RELATIVE if !XIP_KERNEL 135 select HAVE_ARCH_KASAN if MMU && 64BIT 136 select HAVE_ARCH_KASAN_VMALLOC if MMU && 64BIT 137 select HAVE_ARCH_KFENCE if MMU && 64BIT 138 select HAVE_ARCH_KSTACK_ERASE 139 select HAVE_ARCH_KGDB if !XIP_KERNEL 140 select HAVE_ARCH_KGDB_QXFER_PKT 141 select HAVE_ARCH_MMAP_RND_BITS if MMU 142 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT 143 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET 144 select HAVE_ARCH_SECCOMP_FILTER 145 select HAVE_ARCH_SOFT_DIRTY if 64BIT && MMU && RISCV_ISA_SVRSW60T59B 146 select HAVE_ARCH_THREAD_STRUCT_WHITELIST 147 select HAVE_ARCH_TRACEHOOK 148 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT && MMU 149 select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if 64BIT && MMU 150 select HAVE_ARCH_USERFAULTFD_MINOR if 64BIT && USERFAULTFD 151 select HAVE_ARCH_USERFAULTFD_WP if 64BIT && MMU && USERFAULTFD && RISCV_ISA_SVRSW60T59B 152 select HAVE_ARCH_VMAP_STACK if MMU && 64BIT 153 select HAVE_ASM_MODVERSIONS 154 select HAVE_CONTEXT_TRACKING_USER 155 select HAVE_DEBUG_KMEMLEAK 156 select HAVE_DMA_CONTIGUOUS if MMU 157 select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && MMU && (CLANG_SUPPORTS_DYNAMIC_FTRACE || GCC_SUPPORTS_DYNAMIC_FTRACE) 158 select FUNCTION_ALIGNMENT_4B if HAVE_DYNAMIC_FTRACE && RISCV_ISA_C 159 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS if HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS 160 select HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS if (DYNAMIC_FTRACE_WITH_ARGS && !CFI) 161 select HAVE_DYNAMIC_FTRACE_WITH_ARGS if HAVE_DYNAMIC_FTRACE 162 select HAVE_FTRACE_GRAPH_FUNC 163 select HAVE_FUNCTION_GRAPH_TRACER if HAVE_DYNAMIC_FTRACE_WITH_ARGS 164 select HAVE_FUNCTION_GRAPH_FREGS 165 select HAVE_FUNCTION_TRACER if !XIP_KERNEL && HAVE_DYNAMIC_FTRACE 166 select HAVE_EBPF_JIT if MMU 167 select HAVE_GENERIC_TIF_BITS 168 select HAVE_GUP_FAST if MMU 169 select HAVE_FUNCTION_ARG_ACCESS_API 170 select HAVE_FUNCTION_ERROR_INJECTION 171 select HAVE_GCC_PLUGINS 172 select HAVE_GENERIC_VDSO if MMU 173 select HAVE_IRQ_TIME_ACCOUNTING 174 select HAVE_KERNEL_BZIP2 if !XIP_KERNEL && !EFI_ZBOOT 175 select HAVE_KERNEL_GZIP if !XIP_KERNEL && !EFI_ZBOOT 176 select HAVE_KERNEL_LZ4 if !XIP_KERNEL && !EFI_ZBOOT 177 select HAVE_KERNEL_LZMA if !XIP_KERNEL && !EFI_ZBOOT 178 select HAVE_KERNEL_LZO if !XIP_KERNEL && !EFI_ZBOOT 179 select HAVE_KERNEL_UNCOMPRESSED if !XIP_KERNEL && !EFI_ZBOOT 180 select HAVE_KERNEL_ZSTD if !XIP_KERNEL && !EFI_ZBOOT 181 select HAVE_KERNEL_XZ if !XIP_KERNEL && !EFI_ZBOOT 182 select HAVE_KPROBES if !XIP_KERNEL 183 select HAVE_KRETPROBES if !XIP_KERNEL 184 # https://github.com/ClangBuiltLinux/linux/issues/1881 185 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION if !LD_IS_LLD 186 select HAVE_MOVE_PMD 187 select HAVE_MOVE_PUD 188 select HAVE_PAGE_SIZE_4KB 189 select HAVE_PCI 190 select HAVE_PERF_EVENTS 191 select HAVE_PERF_REGS 192 select HAVE_PERF_USER_STACK_DUMP 193 select HAVE_POSIX_CPU_TIMERS_TASK_WORK 194 select HAVE_PREEMPT_DYNAMIC_KEY if !XIP_KERNEL 195 select HAVE_REGS_AND_STACK_ACCESS_API 196 select HAVE_RETHOOK if !XIP_KERNEL 197 select HAVE_RSEQ 198 select HAVE_RUST if RUSTC_SUPPORTS_RISCV && CC_IS_CLANG 199 select HAVE_SAMPLE_FTRACE_DIRECT 200 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI 201 select HAVE_STACKPROTECTOR 202 select HAVE_SYSCALL_TRACEPOINTS 203 select HOTPLUG_PARALLEL if HOTPLUG_CPU 204 select IRQ_DOMAIN 205 select IRQ_FORCED_THREADING 206 select KASAN_VMALLOC if KASAN 207 select LOCK_MM_AND_FIND_VMA 208 select MMU_GATHER_RCU_TABLE_FREE if SMP && MMU 209 select MODULES_USE_ELF_RELA if MODULES 210 select OF 211 select OF_EARLY_FLATTREE 212 select OF_IRQ 213 select PCI_DOMAINS_GENERIC if PCI 214 select PCI_ECAM if (ACPI && PCI) 215 select PCI_MSI if PCI 216 select RELOCATABLE if !MMU && !PHYS_RAM_BASE_FIXED 217 select RISCV_ALTERNATIVE if !XIP_KERNEL 218 select RISCV_APLIC 219 select RISCV_IMSIC 220 select RISCV_INTC 221 select RISCV_TIMER if RISCV_SBI 222 select SIFIVE_PLIC 223 select SPARSE_IRQ 224 select SYSCTL_EXCEPTION_TRACE 225 select THREAD_INFO_IN_TASK 226 select TRACE_IRQFLAGS_SUPPORT 227 select UACCESS_MEMCPY if !MMU 228 select VDSO_GETRANDOM if HAVE_GENERIC_VDSO && 64BIT 229 select USER_STACKTRACE_SUPPORT 230 select ZONE_DMA32 if 64BIT 231 232config RUSTC_SUPPORTS_RISCV 233 def_bool y 234 depends on 64BIT 235 236config CLANG_SUPPORTS_DYNAMIC_FTRACE 237 def_bool CC_IS_CLANG 238 # https://github.com/ClangBuiltLinux/linux/issues/1817 239 depends on AS_IS_GNU || (AS_IS_LLVM && (LD_IS_LLD || LD_VERSION >= 23600)) 240 241config GCC_SUPPORTS_DYNAMIC_FTRACE 242 def_bool CC_IS_GCC 243 depends on $(cc-option,-fpatchable-function-entry=8) 244 depends on CC_HAS_MIN_FUNCTION_ALIGNMENT || !RISCV_ISA_C 245 246config HAVE_SHADOW_CALL_STACK 247 def_bool $(cc-option,-fsanitize=shadow-call-stack) 248 # https://github.com/riscv-non-isa/riscv-elf-psabi-doc/commit/a484e843e6eeb51f0cb7b8819e50da6d2444d769 249 depends on $(ld-option,--no-relax-gp) 250 251# https://github.com/llvm/llvm-project/commit/bbc0f99f3bc96f1db16f649fc21dd18e5b0918f6 252config ARCH_HAS_BROKEN_DWARF5 253 def_bool y 254 # https://github.com/llvm/llvm-project/commit/1df5ea29b43690b6622db2cad7b745607ca4de6a 255 depends on AS_IS_LLVM && AS_VERSION < 180000 256 # https://github.com/llvm/llvm-project/commit/7ffabb61a5569444b5ac9322e22e5471cc5e4a77 257 depends on LD_IS_LLD && LLD_VERSION < 180000 258 259config ARCH_MMAP_RND_BITS_MIN 260 default 18 if 64BIT 261 default 8 262 263config ARCH_MMAP_RND_COMPAT_BITS_MIN 264 default 8 265 266# max bits determined by the following formula: 267# VA_BITS - PAGE_SHIFT - 3 268config ARCH_MMAP_RND_BITS_MAX 269 default 24 if 64BIT # SV39 based 270 default 17 271 272config ARCH_MMAP_RND_COMPAT_BITS_MAX 273 default 17 274 275# set if we run in machine mode, cleared if we run in supervisor mode 276config RISCV_M_MODE 277 bool "Build a kernel that runs in machine mode" 278 depends on !MMU 279 default y 280 help 281 Select this option if you want to run the kernel in M-mode, 282 without the assistance of any other firmware. 283 284# set if we are running in S-mode and can use SBI calls 285config RISCV_SBI 286 bool 287 depends on !RISCV_M_MODE 288 default y 289 290config MMU 291 bool "MMU-based Paged Memory Management Support" 292 default y 293 help 294 Select if you want MMU-based virtualised addressing space 295 support by paged memory management. If unsure, say 'Y'. 296 297config KASAN_SHADOW_OFFSET 298 hex 299 depends on KASAN_GENERIC 300 default 0xdfffffff00000000 if 64BIT 301 default 0xffffffff if 32BIT 302 303config ARCH_FLATMEM_ENABLE 304 def_bool !NUMA 305 306config ARCH_SPARSEMEM_ENABLE 307 def_bool y 308 depends on MMU 309 select SPARSEMEM_STATIC if 32BIT && SPARSEMEM 310 select SPARSEMEM_VMEMMAP_ENABLE if 64BIT 311 312config ARCH_SELECT_MEMORY_MODEL 313 def_bool ARCH_SPARSEMEM_ENABLE 314 315config ARCH_SUPPORTS_UPROBES 316 def_bool y 317 318config STACKTRACE_SUPPORT 319 def_bool y 320 321config GENERIC_BUG 322 def_bool y 323 depends on BUG 324 select GENERIC_BUG_RELATIVE_POINTERS if 64BIT 325 326config GENERIC_BUG_RELATIVE_POINTERS 327 bool 328 329config GENERIC_CALIBRATE_DELAY 330 def_bool y 331 332config GENERIC_CSUM 333 def_bool y 334 335config GENERIC_HWEIGHT 336 def_bool y 337 338config FIX_EARLYCON_MEM 339 def_bool MMU 340 341config ILLEGAL_POINTER_VALUE 342 hex 343 default 0 if 32BIT 344 default 0xdead000000000000 if 64BIT 345 346config PGTABLE_LEVELS 347 int 348 default 5 if 64BIT 349 default 2 350 351config LOCKDEP_SUPPORT 352 def_bool y 353 354config RISCV_DMA_NONCOHERENT 355 bool 356 select ARCH_HAS_DMA_PREP_COHERENT 357 select ARCH_HAS_SETUP_DMA_OPS 358 select ARCH_HAS_SYNC_DMA_FOR_CPU 359 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 360 select DMA_BOUNCE_UNALIGNED_KMALLOC if SWIOTLB 361 362config RISCV_NONSTANDARD_CACHE_OPS 363 bool 364 help 365 This enables function pointer support for non-standard noncoherent 366 systems to handle cache management. 367 368config AS_HAS_INSN 369 def_bool $(as-instr,.insn 0x100000f) 370 371config AS_HAS_OPTION_ARCH 372 # https://github.com/llvm/llvm-project/commit/9e8ed3403c191ab9c4903e8eeb8f732ff8a43cb4 373 def_bool y 374 depends on $(as-instr, .option arch$(comma) +m) 375 376source "arch/riscv/Kconfig.socs" 377source "arch/riscv/Kconfig.errata" 378 379menu "Platform type" 380 381config NONPORTABLE 382 bool "Allow configurations that result in non-portable kernels" 383 help 384 RISC-V kernel binaries are compatible between all known systems 385 whenever possible, but there are some use cases that can only be 386 satisfied by configurations that result in kernel binaries that are 387 not portable between systems. 388 389 Selecting N does not guarantee kernels will be portable to all known 390 systems. Selecting any of the options guarded by NONPORTABLE will 391 result in kernel binaries that are unlikely to be portable between 392 systems. 393 394 If unsure, say N. 395 396choice 397 prompt "Base ISA" 398 default ARCH_RV64I 399 help 400 This selects the base ISA that this kernel will target and must match 401 the target platform. 402 403config ARCH_RV32I 404 bool "RV32I" 405 depends on NONPORTABLE 406 select 32BIT 407 select GENERIC_LIB_ASHLDI3 408 select GENERIC_LIB_ASHRDI3 409 select GENERIC_LIB_LSHRDI3 410 select GENERIC_LIB_UCMPDI2 411 412config ARCH_RV64I 413 bool "RV64I" 414 select 64BIT 415 select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 416 select SWIOTLB if MMU 417 418endchoice 419 420# We must be able to map all physical memory into the kernel, but the compiler 421# is still a bit more efficient when generating code if it's setup in a manner 422# such that it can only map 2GiB of memory. 423choice 424 prompt "Kernel Code Model" 425 default CMODEL_MEDLOW if 32BIT 426 default CMODEL_MEDANY if 64BIT 427 428 config CMODEL_MEDLOW 429 bool "medium low code model" 430 config CMODEL_MEDANY 431 bool "medium any code model" 432endchoice 433 434config MODULE_SECTIONS 435 bool 436 select HAVE_MOD_ARCH_SPECIFIC 437 438config SMP 439 bool "Symmetric Multi-Processing" 440 help 441 This enables support for systems with more than one CPU. If 442 you say N here, the kernel will run on single and 443 multiprocessor machines, but will use only one CPU of a 444 multiprocessor machine. If you say Y here, the kernel will run 445 on many, but not all, single processor machines. On a single 446 processor machine, the kernel will run faster if you say N 447 here. 448 449 If you don't know what to do here, say N. 450 451config NR_CPUS 452 int "Maximum number of CPUs (2-512)" 453 depends on SMP 454 range 2 512 if !RISCV_SBI_V01 455 range 2 32 if RISCV_SBI_V01 && 32BIT 456 range 2 64 if RISCV_SBI_V01 && 64BIT 457 default "32" if 32BIT 458 default "64" if 64BIT 459 460config HOTPLUG_CPU 461 bool "Support for hot-pluggable CPUs" 462 depends on SMP 463 select GENERIC_IRQ_MIGRATION 464 help 465 466 Say Y here to experiment with turning CPUs off and on. CPUs 467 can be controlled through /sys/devices/system/cpu. 468 469 Say N if you want to disable CPU hotplug. 470 471choice 472 prompt "CPU Tuning" 473 default TUNE_GENERIC 474 475config TUNE_GENERIC 476 bool "generic" 477 478endchoice 479 480# Common NUMA Features 481config NUMA 482 bool "NUMA Memory Allocation and Scheduler Support" 483 depends on SMP && MMU 484 select ARCH_SUPPORTS_NUMA_BALANCING 485 select GENERIC_ARCH_NUMA 486 select HAVE_SETUP_PER_CPU_AREA 487 select NEED_PER_CPU_EMBED_FIRST_CHUNK 488 select NEED_PER_CPU_PAGE_FIRST_CHUNK 489 select OF_NUMA 490 select USE_PERCPU_NUMA_NODE_ID 491 help 492 Enable NUMA (Non-Uniform Memory Access) support. 493 494 The kernel will try to allocate memory used by a CPU on the 495 local memory of the CPU and add some more NUMA awareness to the kernel. 496 497config NODES_SHIFT 498 int "Maximum NUMA Nodes (as a power of 2)" 499 range 1 10 500 default "2" 501 depends on NUMA 502 help 503 Specify the maximum number of NUMA Nodes available on the target 504 system. Increases memory reserved to accommodate various tables. 505 506choice 507 prompt "RISC-V spinlock type" 508 default RISCV_COMBO_SPINLOCKS 509 510config RISCV_TICKET_SPINLOCKS 511 bool "Using ticket spinlock" 512 513config RISCV_QUEUED_SPINLOCKS 514 bool "Using queued spinlock" 515 depends on SMP && MMU && NONPORTABLE 516 select ARCH_USE_QUEUED_SPINLOCKS 517 help 518 The queued spinlock implementation requires the forward progress 519 guarantee of cmpxchg()/xchg() atomic operations: CAS with Zabha or 520 LR/SC with Ziccrse provide such guarantee. 521 522 Select this if and only if Zabha or Ziccrse is available on your 523 platform, RISCV_QUEUED_SPINLOCKS must not be selected for platforms 524 without one of those extensions. 525 526 If unsure, select RISCV_COMBO_SPINLOCKS, which will use qspinlocks 527 when supported and otherwise ticket spinlocks. 528 529config RISCV_COMBO_SPINLOCKS 530 bool "Using combo spinlock" 531 depends on SMP && MMU 532 select ARCH_USE_QUEUED_SPINLOCKS 533 help 534 Embed both queued spinlock and ticket lock so that the spinlock 535 implementation can be chosen at runtime. 536 537endchoice 538 539config RISCV_ALTERNATIVE 540 bool 541 depends on !XIP_KERNEL 542 help 543 This Kconfig allows the kernel to automatically patch the 544 erratum or cpufeature required by the execution platform at run 545 time. The code patching overhead is minimal, as it's only done 546 once at boot and once on each module load. 547 548config RISCV_ALTERNATIVE_EARLY 549 bool 550 depends on RISCV_ALTERNATIVE 551 help 552 Allows early patching of the kernel for special errata 553 554config RISCV_ISA_C 555 bool "Emit compressed instructions when building Linux" 556 default y 557 help 558 Adds "C" to the ISA subsets that the toolchain is allowed to emit 559 when building Linux, which results in compressed instructions in the 560 Linux binary. This option produces a kernel that will not run on 561 systems that do not support compressed instructions. 562 563 If you don't know what to do here, say Y. 564 565config RISCV_ISA_SUPM 566 bool "Supm extension for userspace pointer masking" 567 depends on 64BIT 568 default y 569 help 570 Add support for pointer masking in userspace (Supm) when the 571 underlying hardware extension (Smnpm or Ssnpm) is detected at boot. 572 573 If this option is disabled, userspace will be unable to use 574 the prctl(PR_{SET,GET}_TAGGED_ADDR_CTRL) API. 575 576config RISCV_ISA_SVNAPOT 577 bool "Svnapot extension support for supervisor mode NAPOT pages" 578 depends on 64BIT && MMU 579 depends on RISCV_ALTERNATIVE 580 default y 581 help 582 Enable support for the Svnapot ISA-extension when it is detected 583 at boot. 584 585 The Svnapot extension is used to mark contiguous PTEs as a range 586 of contiguous virtual-to-physical translations for a naturally 587 aligned power-of-2 (NAPOT) granularity larger than the base 4KB page 588 size. When HUGETLBFS is also selected this option unconditionally 589 allocates some memory for each NAPOT page size supported by the kernel. 590 When optimizing for low memory consumption and for platforms without 591 the Svnapot extension, it may be better to say N here. 592 593 If you don't know what to do here, say Y. 594 595config RISCV_ISA_SVPBMT 596 bool "Svpbmt extension support for supervisor mode page-based memory types" 597 depends on 64BIT && MMU 598 depends on RISCV_ALTERNATIVE 599 default y 600 help 601 Add support for the Svpbmt ISA-extension (Supervisor-mode: 602 page-based memory types) in the kernel when it is detected at boot. 603 604 The memory type for a page contains a combination of attributes 605 that indicate the cacheability, idempotency, and ordering 606 properties for access to that page. 607 608 The Svpbmt extension is only available on 64-bit cpus. 609 610 If you don't know what to do here, say Y. 611 612config TOOLCHAIN_HAS_V 613 bool 614 default y 615 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64imv) 616 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32imv) 617 depends on LD_IS_LLD || LD_VERSION >= 23800 618 depends on AS_HAS_OPTION_ARCH 619 620config RISCV_ISA_V 621 bool "Vector extension support" 622 depends on TOOLCHAIN_HAS_V 623 depends on FPU 624 select DYNAMIC_SIGFRAME 625 default y 626 help 627 Add support for the Vector extension when it is detected at boot. 628 When this option is disabled, neither the kernel nor userspace may 629 use vector procedures. 630 631 If you don't know what to do here, say Y. 632 633config RISCV_ISA_V_DEFAULT_ENABLE 634 bool "Enable userspace Vector by default" 635 depends on RISCV_ISA_V 636 default y 637 help 638 Say Y here if you want to enable Vector in userspace by default. 639 Otherwise, userspace has to make explicit prctl() call to enable 640 Vector, or enable it via the sysctl interface. 641 642 If you don't know what to do here, say Y. 643 644config RISCV_ISA_V_UCOPY_THRESHOLD 645 int "Threshold size for vectorized user copies" 646 depends on RISCV_ISA_V 647 default 768 648 help 649 Prefer using vectorized copy_to_user()/copy_from_user() when the 650 workload size exceeds this value. 651 652config RISCV_ISA_V_PREEMPTIVE 653 bool "Run kernel-mode Vector with kernel preemption" 654 depends on PREEMPTION 655 depends on RISCV_ISA_V 656 default y 657 help 658 Usually, in-kernel SIMD routines are run with preemption disabled. 659 Functions which invoke long running SIMD thus must yield the core's 660 vector unit to prevent blocking other tasks for too long. 661 662 This config allows the kernel to run SIMD without explicitly disabling 663 preemption. Enabling this config will result in higher memory consumption 664 due to the allocation of per-task's kernel Vector context. 665 666config RISCV_ISA_ZAWRS 667 bool "Zawrs extension support for more efficient busy waiting" 668 depends on RISCV_ALTERNATIVE 669 default y 670 help 671 The Zawrs extension defines instructions to be used in polling loops 672 which allow a hart to enter a low-power state or to trap to the 673 hypervisor while waiting on a store to a memory location. Enable the 674 use of these instructions in the kernel when the Zawrs extension is 675 detected at boot. 676 677config TOOLCHAIN_HAS_ZABHA 678 bool 679 default y 680 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zabha) 681 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zabha) 682 depends on AS_HAS_OPTION_ARCH 683 684config RISCV_ISA_ZABHA 685 bool "Zabha extension support for atomic byte/halfword operations" 686 depends on TOOLCHAIN_HAS_ZABHA 687 depends on RISCV_ALTERNATIVE 688 default y 689 help 690 Enable the use of the Zabha ISA-extension to implement kernel 691 byte/halfword atomic memory operations when it is detected at boot. 692 693 If you don't know what to do here, say Y. 694 695config TOOLCHAIN_HAS_ZACAS 696 bool 697 default y 698 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zacas) 699 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zacas) 700 depends on AS_HAS_OPTION_ARCH 701 702config RISCV_ISA_ZACAS 703 bool "Zacas extension support for atomic CAS" 704 depends on RISCV_ALTERNATIVE 705 default y 706 help 707 Enable the use of the Zacas ISA-extension to implement kernel atomic 708 cmpxchg operations when it is detected at boot. 709 710 If you don't know what to do here, say Y. 711 712config TOOLCHAIN_HAS_ZBB 713 bool 714 default y 715 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbb) 716 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbb) 717 depends on LD_IS_LLD || LD_VERSION >= 23900 718 depends on AS_HAS_OPTION_ARCH 719 720# This symbol indicates that the toolchain supports all v1.0 vector crypto 721# extensions, including Zvk*, Zvbb, and Zvbc. LLVM added all of these at once. 722# binutils added all except Zvkb, then added Zvkb. So we just check for Zvkb. 723config TOOLCHAIN_HAS_VECTOR_CRYPTO 724 def_bool $(as-instr, .option arch$(comma) +v$(comma) +zvkb) 725 depends on AS_HAS_OPTION_ARCH 726 727config TOOLCHAIN_HAS_ZBA 728 bool 729 default y 730 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zba) 731 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zba) 732 depends on LD_IS_LLD || LD_VERSION >= 23900 733 depends on AS_HAS_OPTION_ARCH 734 735config RISCV_ISA_ZBA 736 bool "Zba extension support for bit manipulation instructions" 737 default y 738 help 739 Add support for enabling optimisations in the kernel when the Zba 740 extension is detected at boot. 741 742 The Zba extension provides instructions to accelerate the generation 743 of addresses that index into arrays of basic data types. 744 745 If you don't know what to do here, say Y. 746 747config RISCV_ISA_ZBB 748 bool "Zbb extension support for bit manipulation instructions" 749 depends on RISCV_ALTERNATIVE 750 default y 751 help 752 Add support for enabling optimisations in the kernel when the 753 Zbb extension is detected at boot. Some optimisations may 754 additionally depend on toolchain support for Zbb. 755 756 The Zbb extension provides instructions to accelerate a number 757 of bit-specific operations (count bit population, sign extending, 758 bitrotation, etc). 759 760 If you don't know what to do here, say Y. 761 762config TOOLCHAIN_HAS_ZBC 763 bool 764 default y 765 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbc) 766 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbc) 767 depends on LD_IS_LLD || LD_VERSION >= 23900 768 depends on AS_HAS_OPTION_ARCH 769 770config RISCV_ISA_ZBC 771 bool "Zbc extension support for carry-less multiplication instructions" 772 depends on TOOLCHAIN_HAS_ZBC 773 depends on MMU 774 depends on RISCV_ALTERNATIVE 775 default y 776 help 777 Adds support to dynamically detect the presence of the Zbc 778 extension (carry-less multiplication) and enable its usage. 779 780 The Zbc extension could accelerate CRC (cyclic redundancy check) 781 calculations. 782 783 If you don't know what to do here, say Y. 784 785config TOOLCHAIN_HAS_ZBKB 786 bool 787 default y 788 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbkb) 789 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbkb) 790 depends on LD_IS_LLD || LD_VERSION >= 23900 791 depends on AS_HAS_OPTION_ARCH 792 793config RISCV_ISA_ZBKB 794 bool "Zbkb extension support for bit manipulation instructions" 795 depends on TOOLCHAIN_HAS_ZBKB 796 depends on RISCV_ALTERNATIVE 797 default y 798 help 799 Adds support to dynamically detect the presence of the ZBKB 800 extension (bit manipulation for cryptography) and enable its usage. 801 802 The Zbkb extension provides instructions to accelerate a number 803 of common cryptography operations (pack, zip, etc). 804 805 If you don't know what to do here, say Y. 806 807config RISCV_ISA_ZICBOM 808 bool "Zicbom extension support for non-coherent DMA operation" 809 depends on MMU 810 depends on RISCV_ALTERNATIVE 811 default y 812 select RISCV_DMA_NONCOHERENT 813 select DMA_DIRECT_REMAP 814 help 815 Add support for the Zicbom extension (Cache Block Management 816 Operations) and enable its use in the kernel when it is detected 817 at boot. 818 819 The Zicbom extension can be used to handle for example 820 non-coherent DMA support on devices that need it. 821 822 If you don't know what to do here, say Y. 823 824config RISCV_ISA_ZICBOZ 825 bool "Zicboz extension support for faster zeroing of memory" 826 depends on RISCV_ALTERNATIVE 827 default y 828 help 829 Enable the use of the Zicboz extension (cbo.zero instruction) 830 in the kernel when it is detected at boot. 831 832 The Zicboz extension is used for faster zeroing of memory. 833 834 If you don't know what to do here, say Y. 835 836config RISCV_ISA_ZICBOP 837 bool "Zicbop extension support for cache block prefetch" 838 depends on MMU 839 depends on RISCV_ALTERNATIVE 840 default y 841 help 842 Adds support to dynamically detect the presence of the ZICBOP 843 extension (Cache Block Prefetch Operations) and enable its 844 usage. 845 846 The Zicbop extension can be used to prefetch cache blocks for 847 read/write fetch. 848 849 If you don't know what to do here, say Y. 850 851config RISCV_ISA_SVRSW60T59B 852 bool "Svrsw60t59b extension support for using PTE bits 60 and 59" 853 depends on MMU && 64BIT 854 depends on RISCV_ALTERNATIVE 855 default y 856 help 857 Adds support to dynamically detect the presence of the Svrsw60t59b 858 extension and enable its usage. 859 860 The Svrsw60t59b extension allows to free the PTE reserved bits 60 861 and 59 for software to use. 862 863 If you don't know what to do here, say Y. 864 865config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI 866 def_bool y 867 # https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=aed44286efa8ae8717a77d94b51ac3614e2ca6dc 868 # https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=98416dbb0a62579d4a7a4a76bab51b5b52fec2cd 869 depends on AS_IS_GNU && AS_VERSION >= 23600 870 help 871 Binutils-2.38 and GCC-12.1.0 bumped the default ISA spec to the newer 872 20191213 version, which moves some instructions from the I extension to 873 the Zicsr and Zifencei extensions. This requires explicitly specifying 874 Zicsr and Zifencei when binutils >= 2.38 or GCC >= 12.1.0. Zicsr 875 and Zifencei are supported in binutils from version 2.36 onwards. 876 To make life easier, and avoid forcing toolchains that default to a 877 newer ISA spec to version 2.2, relax the check to binutils >= 2.36. 878 For clang < 17 or GCC < 11.3.0, for which this is not possible or need 879 special treatment, this is dealt with in TOOLCHAIN_NEEDS_OLD_ISA_SPEC. 880 881config TOOLCHAIN_NEEDS_OLD_ISA_SPEC 882 def_bool y 883 depends on TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI 884 # https://github.com/llvm/llvm-project/commit/22e199e6afb1263c943c0c0d4498694e15bf8a16 885 # https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=d29f5d6ab513c52fd872f532c492e35ae9fd6671 886 depends on (CC_IS_CLANG && CLANG_VERSION < 170000) || (CC_IS_GCC && GCC_VERSION < 110300) 887 help 888 Certain versions of clang and GCC do not support zicsr and zifencei via 889 -march. This option causes an older ISA spec compatible with these older 890 versions of clang and GCC to be passed to GAS, which has the same result 891 as passing zicsr and zifencei to -march. 892 893config FPU 894 bool "FPU support" 895 default y 896 help 897 Add support for floating point operations when an FPU is detected at 898 boot. When this option is disabled, neither the kernel nor userspace 899 may use the floating point unit. 900 901 If you don't know what to do here, say Y. 902 903config IRQ_STACKS 904 bool "Independent irq & softirq stacks" if EXPERT 905 default y 906 select HAVE_IRQ_EXIT_ON_IRQ_STACK 907 select HAVE_SOFTIRQ_ON_OWN_STACK 908 help 909 Add independent irq & softirq stacks for percpu to prevent kernel stack 910 overflows. We may save some memory footprint by disabling IRQ_STACKS. 911 912config THREAD_SIZE_ORDER 913 int "Kernel stack size (in power-of-two numbers of page size)" if VMAP_STACK && EXPERT 914 range 0 4 915 default 1 if 32BIT 916 default 2 917 help 918 Specify the Pages of thread stack size (from 4KB to 64KB), which also 919 affects irq stack size, which is equal to thread stack size. 920 921config RISCV_MISALIGNED 922 bool 923 help 924 Embed support for detecting and emulating misaligned 925 scalar or vector loads and stores. 926 927config RISCV_SCALAR_MISALIGNED 928 bool 929 select RISCV_MISALIGNED 930 select SYSCTL_ARCH_UNALIGN_ALLOW 931 help 932 Embed support for emulating misaligned loads and stores. 933 934config RISCV_VECTOR_MISALIGNED 935 bool 936 select RISCV_MISALIGNED 937 depends on RISCV_ISA_V 938 help 939 Enable detecting support for vector misaligned loads and stores. 940 941choice 942 prompt "Unaligned Accesses Support" 943 default RISCV_PROBE_UNALIGNED_ACCESS 944 help 945 This determines the level of support for unaligned accesses. This 946 information is used by the kernel to perform optimizations. It is also 947 exposed to user space via the hwprobe syscall. The hardware will be 948 probed at boot by default. 949 950config RISCV_PROBE_UNALIGNED_ACCESS 951 bool "Probe for hardware unaligned access support" 952 select RISCV_SCALAR_MISALIGNED 953 help 954 During boot, the kernel will run a series of tests to determine the 955 speed of unaligned accesses. This probing will dynamically determine 956 the speed of unaligned accesses on the underlying system. If unaligned 957 memory accesses trap into the kernel as they are not supported by the 958 system, the kernel will emulate the unaligned accesses to preserve the 959 UABI. 960 961config RISCV_EMULATED_UNALIGNED_ACCESS 962 bool "Emulate unaligned access where system support is missing" 963 select RISCV_SCALAR_MISALIGNED 964 help 965 If unaligned memory accesses trap into the kernel as they are not 966 supported by the system, the kernel will emulate the unaligned 967 accesses to preserve the UABI. When the underlying system does support 968 unaligned accesses, the unaligned accesses are assumed to be slow. 969 970config RISCV_SLOW_UNALIGNED_ACCESS 971 bool "Assume the system supports slow unaligned memory accesses" 972 depends on NONPORTABLE 973 help 974 Assume that the system supports slow unaligned memory accesses. The 975 kernel and userspace programs may not be able to run at all on systems 976 that do not support unaligned memory accesses. 977 978config RISCV_EFFICIENT_UNALIGNED_ACCESS 979 bool "Assume the system supports fast unaligned memory accesses" 980 depends on NONPORTABLE 981 select DCACHE_WORD_ACCESS if MMU 982 select HAVE_EFFICIENT_UNALIGNED_ACCESS 983 help 984 Assume that the system supports fast unaligned memory accesses. When 985 enabled, this option improves the performance of the kernel on such 986 systems. However, the kernel and userspace programs will run much more 987 slowly, or will not be able to run at all, on systems that do not 988 support efficient unaligned memory accesses. 989 990endchoice 991 992choice 993 prompt "Vector unaligned Accesses Support" 994 depends on RISCV_ISA_V 995 default RISCV_PROBE_VECTOR_UNALIGNED_ACCESS 996 help 997 This determines the level of support for vector unaligned accesses. This 998 information is used by the kernel to perform optimizations. It is also 999 exposed to user space via the hwprobe syscall. The hardware will be 1000 probed at boot by default. 1001 1002config RISCV_PROBE_VECTOR_UNALIGNED_ACCESS 1003 bool "Probe speed of vector unaligned accesses" 1004 select RISCV_VECTOR_MISALIGNED 1005 depends on RISCV_ISA_V 1006 help 1007 During boot, the kernel will run a series of tests to determine the 1008 speed of vector unaligned accesses if they are supported. This probing 1009 will dynamically determine the speed of vector unaligned accesses on 1010 the underlying system if they are supported. 1011 1012config RISCV_SLOW_VECTOR_UNALIGNED_ACCESS 1013 bool "Assume the system supports slow vector unaligned memory accesses" 1014 depends on NONPORTABLE 1015 help 1016 Assume that the system supports slow vector unaligned memory accesses. The 1017 kernel and userspace programs may not be able to run at all on systems 1018 that do not support unaligned memory accesses. 1019 1020config RISCV_EFFICIENT_VECTOR_UNALIGNED_ACCESS 1021 bool "Assume the system supports fast vector unaligned memory accesses" 1022 depends on NONPORTABLE 1023 help 1024 Assume that the system supports fast vector unaligned memory accesses. When 1025 enabled, this option improves the performance of the kernel on such 1026 systems. However, the kernel and userspace programs will run much more 1027 slowly, or will not be able to run at all, on systems that do not 1028 support efficient unaligned memory accesses. 1029 1030endchoice 1031 1032source "arch/riscv/Kconfig.vendor" 1033 1034endmenu # "Platform type" 1035 1036menu "Kernel features" 1037 1038source "kernel/Kconfig.hz" 1039 1040config RISCV_SBI_V01 1041 bool "SBI v0.1 support" 1042 depends on RISCV_SBI 1043 help 1044 This config allows kernel to use SBI v0.1 APIs. This will be 1045 deprecated in future once legacy M-mode software are no longer in use. 1046 1047config RISCV_BOOT_SPINWAIT 1048 bool "Spinwait booting method" 1049 depends on SMP 1050 default y if RISCV_SBI_V01 || RISCV_M_MODE 1051 help 1052 This enables support for booting Linux via spinwait method. In the 1053 spinwait method, all cores randomly jump to Linux. One of the cores 1054 gets chosen via lottery and all other keep spinning on a percpu 1055 variable. This method cannot support CPU hotplug and sparse hartid 1056 scheme. It should be only enabled for M-mode Linux or platforms relying 1057 on older firmware without SBI HSM extension. All other platforms should 1058 rely on ordered booting via SBI HSM extension which gets chosen 1059 dynamically at runtime if the firmware supports it. 1060 1061 Since spinwait is incompatible with sparse hart IDs, it requires 1062 NR_CPUS be large enough to contain the physical hart ID of the first 1063 hart to enter Linux. 1064 1065 If unsure what to do here, say N. 1066 1067config ARCH_SUPPORTS_KEXEC 1068 def_bool y 1069 1070config ARCH_SELECTS_KEXEC 1071 def_bool y 1072 depends on KEXEC 1073 select HOTPLUG_CPU if SMP 1074 1075config ARCH_SUPPORTS_KEXEC_FILE 1076 def_bool 64BIT 1077 1078config ARCH_SELECTS_KEXEC_FILE 1079 def_bool y 1080 depends on KEXEC_FILE 1081 select HAVE_IMA_KEXEC if IMA 1082 select KEXEC_ELF 1083 1084config ARCH_SUPPORTS_KEXEC_PURGATORY 1085 def_bool ARCH_SUPPORTS_KEXEC_FILE 1086 1087config ARCH_SUPPORTS_CRASH_DUMP 1088 def_bool y 1089 1090config ARCH_DEFAULT_CRASH_DUMP 1091 def_bool y 1092 1093config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION 1094 def_bool CRASH_RESERVE 1095 1096config COMPAT 1097 bool "Kernel support for 32-bit U-mode" 1098 default 64BIT 1099 depends on 64BIT && MMU 1100 help 1101 This option enables support for a 32-bit U-mode running under a 64-bit 1102 kernel at S-mode. riscv32-specific components such as system calls, 1103 the user helper functions (vdso), signal rt_frame functions and the 1104 ptrace interface are handled appropriately by the kernel. 1105 1106 If you want to execute 32-bit userspace applications, say Y. 1107 1108config PARAVIRT 1109 bool "Enable paravirtualization code" 1110 depends on RISCV_SBI 1111 select HAVE_PV_STEAL_CLOCK_GEN 1112 help 1113 This changes the kernel so it can modify itself when it is run 1114 under a hypervisor, potentially improving performance significantly 1115 over full virtualization. 1116 1117config PARAVIRT_TIME_ACCOUNTING 1118 bool "Paravirtual steal time accounting" 1119 depends on PARAVIRT 1120 help 1121 Select this option to enable fine granularity task steal time 1122 accounting. Time spent executing other tasks in parallel with 1123 the current vCPU is discounted from the vCPU power. To account for 1124 that, there can be a small performance impact. 1125 1126 If in doubt, say N here. 1127 1128config RELOCATABLE 1129 bool "Build a relocatable kernel" 1130 depends on !XIP_KERNEL 1131 select MODULE_SECTIONS if MODULES 1132 select ARCH_VMLINUX_NEEDS_RELOCS 1133 help 1134 This builds a kernel as a Position Independent Executable (PIE), 1135 which retains all relocation metadata required to relocate the 1136 kernel binary at runtime to a different virtual address than the 1137 address it was linked at. 1138 Since RISCV uses the RELA relocation format, this requires a 1139 relocation pass at runtime even if the kernel is loaded at the 1140 same address it was linked at. 1141 1142 If unsure, say N. 1143 1144config RANDOMIZE_BASE 1145 bool "Randomize the address of the kernel image" 1146 select RELOCATABLE 1147 depends on MMU && 64BIT && !XIP_KERNEL 1148 help 1149 Randomizes the virtual address at which the kernel image is 1150 loaded, as a security feature that deters exploit attempts 1151 relying on knowledge of the location of kernel internals. 1152 1153 It is the bootloader's job to provide entropy, by passing a 1154 random u64 value in /chosen/kaslr-seed at kernel entry. 1155 1156 When booting via the UEFI stub, it will invoke the firmware's 1157 EFI_RNG_PROTOCOL implementation (if available) to supply entropy 1158 to the kernel proper. In addition, it will randomise the physical 1159 location of the kernel Image as well. 1160 1161 If unsure, say N. 1162 1163config RISCV_USER_CFI 1164 def_bool y 1165 bool "riscv userspace control flow integrity" 1166 depends on 64BIT && MMU && \ 1167 $(cc-option,-mabi=lp64 -march=rv64ima_zicfiss_zicfilp -fcf-protection=full) 1168 depends on RISCV_ALTERNATIVE 1169 select RISCV_SBI 1170 select ARCH_HAS_USER_SHADOW_STACK 1171 select ARCH_USES_HIGH_VMA_FLAGS 1172 select DYNAMIC_SIGFRAME 1173 help 1174 Provides CPU-assisted control flow integrity to userspace tasks. 1175 Control flow integrity is provided by implementing shadow stack for 1176 backward edge and indirect branch tracking for forward edge. 1177 Shadow stack protection is a hardware feature that detects function 1178 return address corruption. This helps mitigate ROP attacks. 1179 Indirect branch tracking enforces that all indirect branches must land 1180 on a landing pad instruction else CPU will fault. This mitigates against 1181 JOP / COP attacks. Applications must be enabled to use it, and old userspace 1182 does not get protection "for free". 1183 default y. 1184 1185endmenu # "Kernel features" 1186 1187menu "Boot options" 1188 1189config CMDLINE 1190 string "Built-in kernel command line" 1191 help 1192 For most platforms, the arguments for the kernel's command line 1193 are provided at run-time, during boot. However, there are cases 1194 where either no arguments are being provided or the provided 1195 arguments are insufficient or even invalid. 1196 1197 When that occurs, it is possible to define a built-in command 1198 line here and choose how the kernel should use it later on. 1199 1200choice 1201 prompt "Built-in command line usage" 1202 depends on CMDLINE != "" 1203 default CMDLINE_FALLBACK 1204 help 1205 Choose how the kernel will handle the provided built-in command 1206 line. 1207 1208config CMDLINE_FALLBACK 1209 bool "Use bootloader kernel arguments if available" 1210 help 1211 Use the built-in command line as fallback in case we get nothing 1212 during boot. This is the default behaviour. 1213 1214config CMDLINE_EXTEND 1215 bool "Extend bootloader kernel arguments" 1216 help 1217 The built-in command line will be appended to the command- 1218 line arguments provided during boot. This is useful in 1219 cases where the provided arguments are insufficient and 1220 you don't want to or cannot modify them. 1221 1222config CMDLINE_FORCE 1223 bool "Always use the default kernel command string" 1224 help 1225 Always use the built-in command line, even if we get one during 1226 boot. This is useful in case you need to override the provided 1227 command line on systems where you don't have or want control 1228 over it. 1229 1230endchoice 1231 1232config EFI_STUB 1233 bool 1234 1235config EFI 1236 bool "UEFI runtime support" 1237 depends on OF && !XIP_KERNEL 1238 depends on MMU 1239 default y 1240 select ARCH_SUPPORTS_ACPI if 64BIT 1241 select EFI_GENERIC_STUB 1242 select EFI_PARAMS_FROM_FDT 1243 select EFI_RUNTIME_WRAPPERS 1244 select EFI_STUB 1245 select LIBFDT 1246 select RISCV_ISA_C 1247 select UCS2_STRING 1248 help 1249 This option provides support for runtime services provided 1250 by UEFI firmware (such as non-volatile variables, realtime 1251 clock, and platform reset). A UEFI stub is also provided to 1252 allow the kernel to be booted as an EFI application. This 1253 is only useful on systems that have UEFI firmware. 1254 1255config DMI 1256 bool "Enable support for SMBIOS (DMI) tables" 1257 depends on EFI 1258 default y 1259 help 1260 This enables SMBIOS/DMI feature for systems. 1261 1262 This option is only useful on systems that have UEFI firmware. 1263 However, even with this option, the resultant kernel should 1264 continue to boot on existing non-UEFI platforms. 1265 1266config CC_HAVE_STACKPROTECTOR_TLS 1267 def_bool $(cc-option,-mstack-protector-guard=tls -mstack-protector-guard-reg=tp -mstack-protector-guard-offset=0) 1268 1269config STACKPROTECTOR_PER_TASK 1270 def_bool y 1271 depends on !RANDSTRUCT 1272 depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_TLS 1273 1274config PHYS_RAM_BASE_FIXED 1275 bool "Explicitly specified physical RAM address" 1276 depends on NONPORTABLE 1277 default n 1278 1279config PHYS_RAM_BASE 1280 hex "Platform Physical RAM address" 1281 depends on PHYS_RAM_BASE_FIXED 1282 default "0x80000000" 1283 help 1284 This is the physical address of RAM in the system. It has to be 1285 explicitly specified to run early relocations of read-write data 1286 from flash to RAM. 1287 1288config XIP_KERNEL 1289 bool "Kernel Execute-In-Place from ROM" 1290 depends on MMU && SPARSEMEM && NONPORTABLE 1291 # This prevents XIP from being enabled by all{yes,mod}config, which 1292 # fail to build since XIP doesn't support large kernels. 1293 depends on !COMPILE_TEST 1294 select PHYS_RAM_BASE_FIXED 1295 help 1296 Execute-In-Place allows the kernel to run from non-volatile storage 1297 directly addressable by the CPU, such as NOR flash. This saves RAM 1298 space since the text section of the kernel is not loaded from flash 1299 to RAM. Read-write sections, such as the data section and stack, 1300 are still copied to RAM. The XIP kernel is not compressed since 1301 it has to run directly from flash, so it will take more space to 1302 store it. The flash address used to link the kernel object files, 1303 and for storing it, is configuration dependent. Therefore, if you 1304 say Y here, you must know the proper physical address where to 1305 store the kernel image depending on your own flash memory usage. 1306 1307 Also note that the make target becomes "make xipImage" rather than 1308 "make zImage" or "make Image". The final kernel binary to put in 1309 ROM memory will be arch/riscv/boot/xipImage. 1310 1311 SPARSEMEM is required because the kernel text and rodata that are 1312 flash resident are not backed by memmap, then any attempt to get 1313 a struct page on those regions will trigger a fault. 1314 1315 If unsure, say N. 1316 1317config XIP_PHYS_ADDR 1318 hex "XIP Kernel Physical Location" 1319 depends on XIP_KERNEL 1320 default "0x21000000" 1321 help 1322 This is the physical address in your flash memory the kernel will 1323 be linked for and stored to. This address is dependent on your 1324 own flash usage. 1325 1326config RISCV_ISA_FALLBACK 1327 bool "Permit falling back to parsing riscv,isa for extension support by default" 1328 default y 1329 help 1330 Parsing the "riscv,isa" devicetree property has been deprecated and 1331 replaced by a list of explicitly defined strings. For compatibility 1332 with existing platforms, the kernel will fall back to parsing the 1333 "riscv,isa" property if the replacements are not found. 1334 1335 Selecting N here will result in a kernel that does not use the 1336 fallback, unless the commandline "riscv_isa_fallback" parameter is 1337 present. 1338 1339 Please see the dt-binding, located at 1340 Documentation/devicetree/bindings/riscv/extensions.yaml for details 1341 on the replacement properties, "riscv,isa-base" and 1342 "riscv,isa-extensions". 1343 1344config BUILTIN_DTB 1345 bool "Built-in device tree" 1346 depends on OF && NONPORTABLE 1347 select GENERIC_BUILTIN_DTB 1348 help 1349 Build a device tree into the Linux image. 1350 This option should be selected if no bootloader is being used. 1351 If unsure, say N. 1352 1353 1354config BUILTIN_DTB_NAME 1355 string "Built-in device tree source" 1356 depends on BUILTIN_DTB 1357 help 1358 DTS file path (without suffix, relative to arch/riscv/boot/dts) 1359 for the DTS file that will be used to produce the DTB linked into the 1360 kernel. 1361 1362endmenu # "Boot options" 1363 1364config PORTABLE 1365 bool 1366 default !NONPORTABLE 1367 select EFI 1368 select MMU 1369 select OF 1370 1371config ARCH_PROC_KCORE_TEXT 1372 def_bool y 1373 1374menu "Power management options" 1375 1376source "kernel/power/Kconfig" 1377 1378config ARCH_HIBERNATION_POSSIBLE 1379 def_bool y 1380 1381config ARCH_HIBERNATION_HEADER 1382 def_bool HIBERNATION 1383 1384config ARCH_SUSPEND_POSSIBLE 1385 def_bool y 1386 1387endmenu # "Power management options" 1388 1389menu "CPU Power Management" 1390 1391source "drivers/cpuidle/Kconfig" 1392 1393source "drivers/cpufreq/Kconfig" 1394 1395endmenu # "CPU Power Management" 1396 1397source "arch/riscv/kvm/Kconfig" 1398 1399source "drivers/acpi/Kconfig" 1400