1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * camss.h 4 * 5 * Qualcomm MSM Camera Subsystem - Core 6 * 7 * Copyright (c) 2015, The Linux Foundation. All rights reserved. 8 * Copyright (C) 2015-2018 Linaro Ltd. 9 */ 10 #ifndef QC_MSM_CAMSS_H 11 #define QC_MSM_CAMSS_H 12 13 #include <linux/device.h> 14 #include <linux/types.h> 15 #include <media/v4l2-async.h> 16 #include <media/v4l2-device.h> 17 #include <media/v4l2-subdev.h> 18 #include <media/media-device.h> 19 #include <media/media-entity.h> 20 21 #include "camss-csid.h" 22 #include "camss-csiphy.h" 23 #include "camss-ispif.h" 24 #include "camss-vfe.h" 25 #include "camss-format.h" 26 27 #define to_camss(ptr_module) \ 28 container_of(ptr_module, struct camss, ptr_module) 29 30 #define to_device(ptr_module) \ 31 (to_camss(ptr_module)->dev) 32 33 #define module_pointer(ptr_module, index) \ 34 ((const struct ptr_module##_device (*)[]) &(ptr_module[-(index)])) 35 36 #define to_camss_index(ptr_module, index) \ 37 container_of(module_pointer(ptr_module, index), \ 38 struct camss, ptr_module) 39 40 #define to_device_index(ptr_module, index) \ 41 (to_camss_index(ptr_module, index)->dev) 42 43 #define CAMSS_RES_MAX 17 44 45 struct camss_subdev_resources { 46 char *regulators[CAMSS_RES_MAX]; 47 char *clock[CAMSS_RES_MAX]; 48 char *clock_for_reset[CAMSS_RES_MAX]; 49 u32 clock_rate[CAMSS_RES_MAX][CAMSS_RES_MAX]; 50 char *reg[CAMSS_RES_MAX]; 51 char *interrupt[CAMSS_RES_MAX]; 52 union { 53 struct csiphy_subdev_resources csiphy; 54 struct csid_subdev_resources csid; 55 struct vfe_subdev_resources vfe; 56 }; 57 }; 58 59 struct icc_bw_tbl { 60 u32 avg; 61 u32 peak; 62 }; 63 64 struct resources_icc { 65 char *name; 66 struct icc_bw_tbl icc_bw_tbl; 67 }; 68 69 struct resources_wrapper { 70 char *reg; 71 }; 72 73 enum pm_domain { 74 PM_DOMAIN_VFE0 = 0, 75 PM_DOMAIN_VFE1 = 1, 76 PM_DOMAIN_VFELITE = 2, /* VFELITE / TOP GDSC */ 77 }; 78 79 enum camss_version { 80 CAMSS_660, 81 CAMSS_7280, 82 CAMSS_8x16, 83 CAMSS_8x53, 84 CAMSS_8x96, 85 CAMSS_8250, 86 CAMSS_8280XP, 87 CAMSS_845, 88 CAMSS_8550, 89 CAMSS_X1E80100, 90 }; 91 92 enum icc_count { 93 ICC_DEFAULT_COUNT = 0, 94 ICC_SM8250_COUNT = 4, 95 }; 96 97 struct camss_resources { 98 enum camss_version version; 99 const char *pd_name; 100 const struct camss_subdev_resources *csiphy_res; 101 const struct camss_subdev_resources *csid_res; 102 const struct camss_subdev_resources *ispif_res; 103 const struct camss_subdev_resources *vfe_res; 104 const struct resources_wrapper *csid_wrapper_res; 105 const struct resources_icc *icc_res; 106 const unsigned int icc_path_num; 107 const unsigned int csiphy_num; 108 const unsigned int csid_num; 109 const unsigned int vfe_num; 110 int (*link_entities)(struct camss *camss); 111 }; 112 113 struct camss { 114 struct v4l2_device v4l2_dev; 115 struct v4l2_async_notifier notifier; 116 struct media_device media_dev; 117 struct device *dev; 118 struct csiphy_device *csiphy; 119 struct csid_device *csid; 120 struct ispif_device *ispif; 121 struct vfe_device *vfe; 122 void __iomem *csid_wrapper_base; 123 atomic_t ref_count; 124 int genpd_num; 125 struct device *genpd; 126 struct device_link *genpd_link; 127 struct icc_path *icc_path[ICC_SM8250_COUNT]; 128 const struct camss_resources *res; 129 }; 130 131 struct camss_camera_interface { 132 u8 csiphy_id; 133 struct csiphy_csi2_cfg csi2; 134 }; 135 136 struct camss_async_subdev { 137 struct v4l2_async_connection asd; /* must be first */ 138 struct camss_camera_interface interface; 139 }; 140 141 struct camss_clock { 142 struct clk *clk; 143 const char *name; 144 u32 *freq; 145 u32 nfreqs; 146 }; 147 148 struct parent_dev_ops { 149 int (*get)(struct camss *camss, int id); 150 int (*put)(struct camss *camss, int id); 151 void __iomem *(*get_base_address)(struct camss *camss, int id); 152 }; 153 154 void camss_add_clock_margin(u64 *rate); 155 int camss_enable_clocks(int nclocks, struct camss_clock *clock, 156 struct device *dev); 157 void camss_disable_clocks(int nclocks, struct camss_clock *clock); 158 struct media_pad *camss_find_sensor_pad(struct media_entity *entity); 159 s64 camss_get_link_freq(struct media_entity *entity, unsigned int bpp, 160 unsigned int lanes); 161 int camss_get_pixel_clock(struct media_entity *entity, u64 *pixel_clock); 162 int camss_pm_domain_on(struct camss *camss, int id); 163 void camss_pm_domain_off(struct camss *camss, int id); 164 int camss_vfe_get(struct camss *camss, int id); 165 void camss_vfe_put(struct camss *camss, int id); 166 void camss_delete(struct camss *camss); 167 void camss_buf_done(struct camss *camss, int hw_id, int port_id); 168 void camss_reg_update(struct camss *camss, int hw_id, 169 int port_id, bool is_clear); 170 171 #endif /* QC_MSM_CAMSS_H */ 172