| /qemu/tests/tcg/hexagon/ |
| H A D | brev.c | 38 #define BREV_LOAD(SZ, RES, ADDR, INC) \ argument
46 #define BREV_LOAD_b(RES, ADDR, INC) \ argument
48 #define BREV_LOAD_ub(RES, ADDR, INC) \ argument
50 #define BREV_LOAD_h(RES, ADDR, INC) \ argument
52 #define BREV_LOAD_uh(RES, ADDR, INC) \ argument
54 #define BREV_LOAD_w(RES, ADDR, INC) \ argument
56 #define BREV_LOAD_d(RES, ADDR, INC) \ argument
59 #define BREV_STORE(SZ, PART, ADDR, VAL, INC) \ argument
67 #define BREV_STORE_b(ADDR, VAL, INC) \ argument
69 #define BREV_STORE_h(ADDR, VAL, INC) \ argument
[all …]
|
| H A D | circ.c | 69 #define CIRC_LOAD_IMM(SIZE, RES, ADDR, START, LEN, INC) \ in INIT() argument
78 #define CIRC_LOAD_IMM_b(RES, ADDR, START, LEN, INC) \ in INIT() argument
80 #define CIRC_LOAD_IMM_ub(RES, ADDR, START, LEN, INC) \ in INIT() argument
82 #define CIRC_LOAD_IMM_h(RES, ADDR, START, LEN, INC) \ in INIT() argument
84 #define CIRC_LOAD_IMM_uh(RES, ADDR, START, LEN, INC) \ in INIT() argument
86 #define CIRC_LOAD_IMM_w(RES, ADDR, START, LEN, INC) \ in INIT() argument
88 #define CIRC_LOAD_IMM_d(RES, ADDR, START, LEN, INC) \ in INIT() argument
106 #define CIRC_LOAD_REG(SIZE, RES, ADDR, START, LEN, INC) \ argument
116 #define CIRC_LOAD_REG_b(RES, ADDR, START, LEN, INC) \ argument
118 #define CIRC_LOAD_REG_ub(RES, ADDR, START, LEN, INC) \ argument
[all …]
|
| H A D | load_align.c | 52 #define LOAD_io(SZ, RES, ADDR, OFF) \ argument
57 #define LOAD_io_b(RES, ADDR, OFF) \ argument
59 #define LOAD_io_h(RES, ADDR, OFF) \ argument
122 #define LOAD_ap(SZ, RES, PTR, ADDR) \ argument
126 #define LOAD_ap_b(RES, PTR, ADDR) \ argument
128 #define LOAD_ap_h(RES, PTR, ADDR) \ argument
|
| H A D | load_unpack.c | 55 #define BxW_LOAD_io(SZ, RES, ADDR, OFF) \ argument
60 #define BxW_LOAD_io_Z(RES, ADDR, OFF) \ argument
62 #define BxW_LOAD_io_S(RES, ADDR, OFF) \ argument
136 #define BxW_LOAD_ap(SZ, RES, PTR, ADDR) \ argument
140 #define BxW_LOAD_ap_Z(RES, PTR, ADDR) \ argument
142 #define BxW_LOAD_ap_S(RES, PTR, ADDR) \ argument
|
| /qemu/target/tricore/ |
| H A D | cpu.h | 49 #define R(ADDR, NAME, FEATURE) uint32_t NAME; argument
50 #define A(ADDR, NAME, FEATURE) uint32_t NAME; argument
51 #define E(ADDR, NAME, FEATURE) uint32_t NAME; argument
|
| /qemu/pc-bios/vof/ |
| H A D | ci.c | 12 #define ADDR(x) (uint32_t)(x) macro
|
| /qemu/hw/net/ |
| H A D | pcnet.c | 432 #define TMDLOAD(TMD,ADDR) pcnet_tmd_load(s,TMD,ADDR) argument
434 #define TMDSTORE(TMD,ADDR) pcnet_tmd_store(s,TMD,ADDR) argument
436 #define RMDLOAD(RMD,ADDR) pcnet_rmd_load(s,RMD,ADDR) argument
438 #define RMDSTORE(RMD,ADDR) pcnet_rmd_store(s,RMD,ADDR) argument
442 #define CHECK_RMD(ADDR,RES) do { \ argument
449 #define CHECK_TMD(ADDR,RES) do { \ argument
457 #define CHECK_RMD(ADDR,RES) do { \ argument
490 #define CHECK_TMD(ADDR,RES) do { \ argument
|
| /qemu/include/qemu/ |
| H A D | log.h | 68 #define qemu_log_mask_and_addr(MASK, ADDR, FMT, ...) \ argument
|
| /qemu/target/hexagon/mmvec/ |
| H A D | macros.h | 104 #define fVALIGN(ADDR, LOG2_ALIGNMENT) (ADDR = ADDR & ~(LOG2_ALIGNMENT - 1)) argument
105 #define fVLASTBYTE(ADDR, LOG2_ALIGNMENT) (ADDR = ADDR | (LOG2_ALIGNMENT - 1)) argument
|
| /qemu/hw/dma/ |
| H A D | i8257.c | 48 #define ADDR 0 macro
|
| /qemu/target/hexagon/ |
| H A D | macros.h | 540 #define fFRAMECHECK(ADDR, EA) do { } while (0) /* Not modelled in linux-user */ argument
543 #define fFRAMECHECK(ADDR, EA) g_assert_not_reached(); argument
|