1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * HD-audio codec verbs 4 */ 5 6 #ifndef __SOUND_HDA_VERBS_H 7 #define __SOUND_HDA_VERBS_H 8 9 /* 10 * nodes 11 */ 12 #define AC_NODE_ROOT 0x00 13 14 /* 15 * function group types 16 */ 17 enum { 18 AC_GRP_AUDIO_FUNCTION = 0x01, 19 AC_GRP_MODEM_FUNCTION = 0x02, 20 }; 21 22 /* 23 * widget types 24 */ 25 enum { 26 AC_WID_AUD_OUT, /* Audio Out */ 27 AC_WID_AUD_IN, /* Audio In */ 28 AC_WID_AUD_MIX, /* Audio Mixer */ 29 AC_WID_AUD_SEL, /* Audio Selector */ 30 AC_WID_PIN, /* Pin Complex */ 31 AC_WID_POWER, /* Power */ 32 AC_WID_VOL_KNB, /* Volume Knob */ 33 AC_WID_BEEP, /* Beep Generator */ 34 AC_WID_VENDOR = 0x0f /* Vendor specific */ 35 }; 36 37 /* 38 * GET verbs 39 */ 40 #define AC_VERB_GET_STREAM_FORMAT 0x0a00 41 #define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00 42 #define AC_VERB_GET_PROC_COEF 0x0c00 43 #define AC_VERB_GET_COEF_INDEX 0x0d00 44 #define AC_VERB_PARAMETERS 0x0f00 45 #define AC_VERB_GET_CONNECT_SEL 0x0f01 46 #define AC_VERB_GET_CONNECT_LIST 0x0f02 47 #define AC_VERB_GET_PROC_STATE 0x0f03 48 #define AC_VERB_GET_SDI_SELECT 0x0f04 49 #define AC_VERB_GET_POWER_STATE 0x0f05 50 #define AC_VERB_GET_CONV 0x0f06 51 #define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07 52 #define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08 53 #define AC_VERB_GET_PIN_SENSE 0x0f09 54 #define AC_VERB_GET_BEEP_CONTROL 0x0f0a 55 #define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c 56 #define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d 57 #define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */ 58 #define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f 59 /* f10-f1a: GPI/GPO/GPIO */ 60 #define AC_VERB_GET_GPI_DATA 0x0f10 61 #define AC_VERB_GET_GPI_WAKE_MASK 0x0f11 62 #define AC_VERB_GET_GPI_UNSOLICITED_RSP_MASK 0x0f12 63 #define AC_VERB_GET_GPI_STICKY_MASK 0x0f13 64 #define AC_VERB_GET_GPO_DATA 0x0f14 65 #define AC_VERB_GET_GPIO_DATA 0x0f15 66 #define AC_VERB_GET_GPIO_MASK 0x0f16 67 #define AC_VERB_GET_GPIO_DIRECTION 0x0f17 68 #define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18 69 #define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19 70 #define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a 71 #define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c 72 /* f20: AFG/MFG */ 73 #define AC_VERB_GET_SUBSYSTEM_ID 0x0f20 74 #define AC_VERB_GET_STRIPE_CONTROL 0x0f24 75 #define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d 76 #define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e 77 #define AC_VERB_GET_HDMI_ELDD 0x0f2f 78 #define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30 79 #define AC_VERB_GET_HDMI_DIP_DATA 0x0f31 80 #define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32 81 #define AC_VERB_GET_HDMI_CP_CTRL 0x0f33 82 #define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34 83 #define AC_VERB_GET_DEVICE_SEL 0xf35 84 #define AC_VERB_GET_DEVICE_LIST 0xf36 85 86 /* 87 * SET verbs 88 */ 89 #define AC_VERB_SET_STREAM_FORMAT 0x200 90 #define AC_VERB_SET_AMP_GAIN_MUTE 0x300 91 #define AC_VERB_SET_PROC_COEF 0x400 92 #define AC_VERB_SET_COEF_INDEX 0x500 93 #define AC_VERB_SET_CONNECT_SEL 0x701 94 #define AC_VERB_SET_PROC_STATE 0x703 95 #define AC_VERB_SET_SDI_SELECT 0x704 96 #define AC_VERB_SET_POWER_STATE 0x705 97 #define AC_VERB_SET_CHANNEL_STREAMID 0x706 98 #define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707 99 #define AC_VERB_SET_UNSOLICITED_ENABLE 0x708 100 #define AC_VERB_SET_PIN_SENSE 0x709 101 #define AC_VERB_SET_BEEP_CONTROL 0x70a 102 #define AC_VERB_SET_EAPD_BTLENABLE 0x70c 103 #define AC_VERB_SET_DIGI_CONVERT_1 0x70d 104 #define AC_VERB_SET_DIGI_CONVERT_2 0x70e 105 #define AC_VERB_SET_DIGI_CONVERT_3 0x73e 106 #define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f 107 #define AC_VERB_SET_GPI_DATA 0x710 108 #define AC_VERB_SET_GPI_WAKE_MASK 0x711 109 #define AC_VERB_SET_SPI_UNSOLICITED_RSP_MASK 0x712 110 #define AC_VERB_SET_GPI_STICKY_MASK 0x713 111 #define AC_VERB_SET_GPO_DATA 0x714 112 #define AC_VERB_SET_GPIO_DATA 0x715 113 #define AC_VERB_SET_GPIO_MASK 0x716 114 #define AC_VERB_SET_GPIO_DIRECTION 0x717 115 #define AC_VERB_SET_GPIO_WAKE_MASK 0x718 116 #define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719 117 #define AC_VERB_SET_GPIO_STICKY_MASK 0x71a 118 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c 119 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d 120 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e 121 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f 122 #define AC_VERB_SET_EAPD 0x788 123 #define AC_VERB_SET_CODEC_RESET 0x7ff 124 #define AC_VERB_SET_STRIPE_CONTROL 0x724 125 #define AC_VERB_SET_CVT_CHAN_COUNT 0x72d 126 #define AC_VERB_SET_HDMI_DIP_INDEX 0x730 127 #define AC_VERB_SET_HDMI_DIP_DATA 0x731 128 #define AC_VERB_SET_HDMI_DIP_XMIT 0x732 129 #define AC_VERB_SET_HDMI_CP_CTRL 0x733 130 #define AC_VERB_SET_HDMI_CHAN_SLOT 0x734 131 #define AC_VERB_SET_DEVICE_SEL 0x735 132 133 /* 134 * Parameter IDs 135 */ 136 #define AC_PAR_VENDOR_ID 0x00 137 #define AC_PAR_SUBSYSTEM_ID 0x01 138 #define AC_PAR_REV_ID 0x02 139 #define AC_PAR_NODE_COUNT 0x04 140 #define AC_PAR_FUNCTION_TYPE 0x05 141 #define AC_PAR_AUDIO_FG_CAP 0x08 142 #define AC_PAR_AUDIO_WIDGET_CAP 0x09 143 #define AC_PAR_PCM 0x0a 144 #define AC_PAR_STREAM 0x0b 145 #define AC_PAR_PIN_CAP 0x0c 146 #define AC_PAR_AMP_IN_CAP 0x0d 147 #define AC_PAR_CONNLIST_LEN 0x0e 148 #define AC_PAR_POWER_STATE 0x0f 149 #define AC_PAR_PROC_CAP 0x10 150 #define AC_PAR_GPIO_CAP 0x11 151 #define AC_PAR_AMP_OUT_CAP 0x12 152 #define AC_PAR_VOL_KNB_CAP 0x13 153 #define AC_PAR_DEVLIST_LEN 0x15 154 #define AC_PAR_HDMI_LPCM_CAP 0x20 155 156 /* 157 * AC_VERB_PARAMETERS results (32bit) 158 */ 159 160 /* Function Group Type */ 161 #define AC_FGT_TYPE (0xff<<0) 162 #define AC_FGT_TYPE_SHIFT 0 163 #define AC_FGT_UNSOL_CAP (1<<8) 164 165 /* Audio Function Group Capabilities */ 166 #define AC_AFG_OUT_DELAY (0xf<<0) 167 #define AC_AFG_IN_DELAY (0xf<<8) 168 #define AC_AFG_BEEP_GEN (1<<16) 169 170 /* Audio Widget Capabilities */ 171 #define AC_WCAP_STEREO (1<<0) /* stereo I/O */ 172 #define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */ 173 #define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */ 174 #define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */ 175 #define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */ 176 #define AC_WCAP_STRIPE (1<<5) /* stripe */ 177 #define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */ 178 #define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */ 179 #define AC_WCAP_CONN_LIST (1<<8) /* connection list */ 180 #define AC_WCAP_DIGITAL (1<<9) /* digital I/O */ 181 #define AC_WCAP_POWER (1<<10) /* power control */ 182 #define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */ 183 #define AC_WCAP_CP_CAPS (1<<12) /* content protection */ 184 #define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */ 185 #define AC_WCAP_DELAY (0xf<<16) 186 #define AC_WCAP_DELAY_SHIFT 16 187 #define AC_WCAP_TYPE (0xf<<20) 188 #define AC_WCAP_TYPE_SHIFT 20 189 190 /* supported PCM rates and bits */ 191 #define AC_SUPPCM_RATES (0xfff << 0) 192 #define AC_SUPPCM_BITS_8 (1<<16) 193 #define AC_SUPPCM_BITS_16 (1<<17) 194 #define AC_SUPPCM_BITS_20 (1<<18) 195 #define AC_SUPPCM_BITS_24 (1<<19) 196 #define AC_SUPPCM_BITS_32 (1<<20) 197 198 /* supported PCM stream format */ 199 #define AC_SUPFMT_PCM (1<<0) 200 #define AC_SUPFMT_FLOAT32 (1<<1) 201 #define AC_SUPFMT_AC3 (1<<2) 202 203 /* GP I/O count */ 204 #define AC_GPIO_IO_COUNT (0xff<<0) 205 #define AC_GPIO_O_COUNT (0xff<<8) 206 #define AC_GPIO_O_COUNT_SHIFT 8 207 #define AC_GPIO_I_COUNT (0xff<<16) 208 #define AC_GPIO_I_COUNT_SHIFT 16 209 #define AC_GPIO_UNSOLICITED (1<<30) 210 #define AC_GPIO_WAKE (1<<31) 211 212 /* Converter stream, channel */ 213 #define AC_CONV_CHANNEL (0xf<<0) 214 #define AC_CONV_STREAM (0xf<<4) 215 #define AC_CONV_STREAM_SHIFT 4 216 217 /* Input converter SDI select */ 218 #define AC_SDI_SELECT (0xf<<0) 219 220 /* stream format id */ 221 #define AC_FMT_CHAN_SHIFT 0 222 #define AC_FMT_CHAN_MASK (0x0f << 0) 223 #define AC_FMT_BITS_SHIFT 4 224 #define AC_FMT_BITS_MASK (7 << 4) 225 #define AC_FMT_BITS_8 (0 << 4) 226 #define AC_FMT_BITS_16 (1 << 4) 227 #define AC_FMT_BITS_20 (2 << 4) 228 #define AC_FMT_BITS_24 (3 << 4) 229 #define AC_FMT_BITS_32 (4 << 4) 230 #define AC_FMT_DIV_SHIFT 8 231 #define AC_FMT_DIV_MASK (7 << 8) 232 #define AC_FMT_MULT_SHIFT 11 233 #define AC_FMT_MULT_MASK (7 << 11) 234 #define AC_FMT_BASE_SHIFT 14 235 #define AC_FMT_BASE_48K (0 << 14) 236 #define AC_FMT_BASE_44K (1 << 14) 237 #define AC_FMT_TYPE_SHIFT 15 238 #define AC_FMT_TYPE_PCM (0 << 15) 239 #define AC_FMT_TYPE_NON_PCM (1 << 15) 240 241 /* Unsolicited response control */ 242 #define AC_UNSOL_TAG (0x3f<<0) 243 #define AC_UNSOL_ENABLED (1<<7) 244 #define AC_USRSP_EN AC_UNSOL_ENABLED 245 246 /* Unsolicited responses */ 247 #define AC_UNSOL_RES_TAG (0x3f<<26) 248 #define AC_UNSOL_RES_TAG_SHIFT 26 249 #define AC_UNSOL_RES_SUBTAG (0x1f<<21) 250 #define AC_UNSOL_RES_SUBTAG_SHIFT 21 251 #define AC_UNSOL_RES_DE (0x3f<<15) /* Device Entry 252 * (for DP1.2 MST) 253 */ 254 #define AC_UNSOL_RES_DE_SHIFT 15 255 #define AC_UNSOL_RES_IA (1<<2) /* Inactive (for DP1.2 MST) */ 256 #define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */ 257 #define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */ 258 #define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */ 259 #define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */ 260 261 /* Pin widget capabilies */ 262 #define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */ 263 #define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */ 264 #define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */ 265 #define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */ 266 #define AC_PINCAP_OUT (1<<4) /* output capable */ 267 #define AC_PINCAP_IN (1<<5) /* input capable */ 268 #define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */ 269 /* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification, 270 * but is marked reserved in the Intel HDA specification. 271 */ 272 #define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */ 273 /* Note: The same bit as LR_SWAP is newly defined as HDMI capability 274 * in HD-audio specification 275 */ 276 #define AC_PINCAP_HDMI (1<<7) /* HDMI pin */ 277 #define AC_PINCAP_DP (1<<24) /* DisplayPort pin, can 278 * coexist with AC_PINCAP_HDMI 279 */ 280 #define AC_PINCAP_VREF (0x37<<8) 281 #define AC_PINCAP_VREF_SHIFT 8 282 #define AC_PINCAP_EAPD (1<<16) /* EAPD capable */ 283 #define AC_PINCAP_HBR (1<<27) /* High Bit Rate */ 284 /* Vref status (used in pin cap) */ 285 #define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */ 286 #define AC_PINCAP_VREF_50 (1<<1) /* 50% */ 287 #define AC_PINCAP_VREF_GRD (1<<2) /* ground */ 288 #define AC_PINCAP_VREF_80 (1<<4) /* 80% */ 289 #define AC_PINCAP_VREF_100 (1<<5) /* 100% */ 290 291 /* Amplifier capabilities */ 292 #define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */ 293 #define AC_AMPCAP_OFFSET_SHIFT 0 294 #define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */ 295 #define AC_AMPCAP_NUM_STEPS_SHIFT 8 296 #define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB 297 * in 0.25dB 298 */ 299 #define AC_AMPCAP_STEP_SIZE_SHIFT 16 300 #define AC_AMPCAP_MUTE (1<<31) /* mute capable */ 301 #define AC_AMPCAP_MUTE_SHIFT 31 302 303 /* driver-specific amp-caps: using bits 24-30 */ 304 #define AC_AMPCAP_MIN_MUTE (1 << 30) /* min-volume = mute */ 305 306 /* Connection list */ 307 #define AC_CLIST_LENGTH (0x7f<<0) 308 #define AC_CLIST_LONG (1<<7) 309 310 /* Supported power status */ 311 #define AC_PWRST_D0SUP (1<<0) 312 #define AC_PWRST_D1SUP (1<<1) 313 #define AC_PWRST_D2SUP (1<<2) 314 #define AC_PWRST_D3SUP (1<<3) 315 #define AC_PWRST_D3COLDSUP (1<<4) 316 #define AC_PWRST_S3D3COLDSUP (1<<29) 317 #define AC_PWRST_CLKSTOP (1<<30) 318 #define AC_PWRST_EPSS (1U<<31) 319 320 /* Power state values */ 321 #define AC_PWRST_SETTING (0xf<<0) 322 #define AC_PWRST_ACTUAL (0xf<<4) 323 #define AC_PWRST_ACTUAL_SHIFT 4 324 #define AC_PWRST_D0 0x00 325 #define AC_PWRST_D1 0x01 326 #define AC_PWRST_D2 0x02 327 #define AC_PWRST_D3 0x03 328 #define AC_PWRST_ERROR (1<<8) 329 #define AC_PWRST_CLK_STOP_OK (1<<9) 330 #define AC_PWRST_SETTING_RESET (1<<10) 331 332 /* Processing capabilies */ 333 #define AC_PCAP_BENIGN (1<<0) 334 #define AC_PCAP_NUM_COEF (0xff<<8) 335 #define AC_PCAP_NUM_COEF_SHIFT 8 336 337 /* Volume knobs capabilities */ 338 #define AC_KNBCAP_NUM_STEPS (0x7f<<0) 339 #define AC_KNBCAP_DELTA (1<<7) 340 341 /* HDMI LPCM capabilities */ 342 #define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */ 343 #define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */ 344 #define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */ 345 #define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */ 346 #define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */ 347 #define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */ 348 #define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */ 349 #define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */ 350 #define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */ 351 #define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */ 352 #define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */ 353 #define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */ 354 #define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */ 355 #define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */ 356 357 /* Display pin's device list length */ 358 #define AC_DEV_LIST_LEN_MASK 0x3f 359 #define AC_MAX_DEV_LIST_LEN 64 360 361 /* 362 * Control Parameters 363 */ 364 365 /* Amp gain/mute */ 366 #define AC_AMP_MUTE (1<<7) 367 #define AC_AMP_GAIN (0x7f) 368 #define AC_AMP_GET_INDEX (0xf<<0) 369 370 #define AC_AMP_GET_LEFT (1<<13) 371 #define AC_AMP_GET_RIGHT (0<<13) 372 #define AC_AMP_GET_OUTPUT (1<<15) 373 #define AC_AMP_GET_INPUT (0<<15) 374 375 #define AC_AMP_SET_INDEX (0xf<<8) 376 #define AC_AMP_SET_INDEX_SHIFT 8 377 #define AC_AMP_SET_RIGHT (1<<12) 378 #define AC_AMP_SET_LEFT (1<<13) 379 #define AC_AMP_SET_INPUT (1<<14) 380 #define AC_AMP_SET_OUTPUT (1<<15) 381 382 /* DIGITAL1 bits */ 383 #define AC_DIG1_ENABLE (1<<0) 384 #define AC_DIG1_V (1<<1) 385 #define AC_DIG1_VCFG (1<<2) 386 #define AC_DIG1_EMPHASIS (1<<3) 387 #define AC_DIG1_COPYRIGHT (1<<4) 388 #define AC_DIG1_NONAUDIO (1<<5) 389 #define AC_DIG1_PROFESSIONAL (1<<6) 390 #define AC_DIG1_LEVEL (1<<7) 391 392 /* DIGITAL2 bits */ 393 #define AC_DIG2_CC (0x7f<<0) 394 395 /* DIGITAL3 bits */ 396 #define AC_DIG3_ICT (0xf<<0) 397 #define AC_DIG3_KAE (1<<7) 398 399 /* Pin widget control - 8bit */ 400 #define AC_PINCTL_EPT (0x3<<0) 401 #define AC_PINCTL_EPT_NATIVE 0 402 #define AC_PINCTL_EPT_HBR 3 403 #define AC_PINCTL_VREFEN (0x7<<0) 404 #define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */ 405 #define AC_PINCTL_VREF_50 1 /* 50% */ 406 #define AC_PINCTL_VREF_GRD 2 /* ground */ 407 #define AC_PINCTL_VREF_80 4 /* 80% */ 408 #define AC_PINCTL_VREF_100 5 /* 100% */ 409 #define AC_PINCTL_IN_EN (1<<5) 410 #define AC_PINCTL_OUT_EN (1<<6) 411 #define AC_PINCTL_HP_EN (1<<7) 412 413 /* Pin sense - 32bit */ 414 #define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff) 415 #define AC_PINSENSE_PRESENCE (1<<31) 416 #define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */ 417 418 /* EAPD/BTL enable - 32bit */ 419 #define AC_EAPDBTL_BALANCED (1<<0) 420 #define AC_EAPDBTL_EAPD (1<<1) 421 #define AC_EAPDBTL_LR_SWAP (1<<2) 422 423 /* HDMI ELD data */ 424 #define AC_ELDD_ELD_VALID (1<<31) 425 #define AC_ELDD_ELD_DATA 0xff 426 427 /* HDMI DIP size */ 428 #define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */ 429 #define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */ 430 431 /* HDMI DIP index */ 432 #define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */ 433 #define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */ 434 435 /* HDMI DIP xmit (transmit) control */ 436 #define AC_DIPXMIT_MASK (0x3<<6) 437 #define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */ 438 #define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */ 439 #define AC_DIPXMIT_BEST (0x3<<6) /* best effort */ 440 441 /* HDMI content protection (CP) control */ 442 #define AC_CPCTRL_CES (1<<9) /* current encryption state */ 443 #define AC_CPCTRL_READY (1<<8) /* ready bit */ 444 #define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */ 445 #define AC_CPCTRL_STATE (3<<0) /* current CP request state */ 446 447 /* Converter channel <-> HDMI slot mapping */ 448 #define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */ 449 #define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */ 450 451 /* configuration default - 32bit */ 452 #define AC_DEFCFG_SEQUENCE (0xf<<0) 453 #define AC_DEFCFG_DEF_ASSOC (0xf<<4) 454 #define AC_DEFCFG_ASSOC_SHIFT 4 455 #define AC_DEFCFG_MISC (0xf<<8) 456 #define AC_DEFCFG_MISC_SHIFT 8 457 #define AC_DEFCFG_MISC_NO_PRESENCE (1<<0) 458 #define AC_DEFCFG_COLOR (0xf<<12) 459 #define AC_DEFCFG_COLOR_SHIFT 12 460 #define AC_DEFCFG_CONN_TYPE (0xf<<16) 461 #define AC_DEFCFG_CONN_TYPE_SHIFT 16 462 #define AC_DEFCFG_DEVICE (0xf<<20) 463 #define AC_DEFCFG_DEVICE_SHIFT 20 464 #define AC_DEFCFG_LOCATION (0x3f<<24) 465 #define AC_DEFCFG_LOCATION_SHIFT 24 466 #define AC_DEFCFG_PORT_CONN (0x3<<30) 467 #define AC_DEFCFG_PORT_CONN_SHIFT 30 468 469 /* Display pin's device list entry */ 470 #define AC_DE_PD (1<<0) 471 #define AC_DE_ELDV (1<<1) 472 #define AC_DE_IA (1<<2) 473 474 /* device types (0x0-0xf) */ 475 enum { 476 AC_JACK_LINE_OUT, 477 AC_JACK_SPEAKER, 478 AC_JACK_HP_OUT, 479 AC_JACK_CD, 480 AC_JACK_SPDIF_OUT, 481 AC_JACK_DIG_OTHER_OUT, 482 AC_JACK_MODEM_LINE_SIDE, 483 AC_JACK_MODEM_HAND_SIDE, 484 AC_JACK_LINE_IN, 485 AC_JACK_AUX, 486 AC_JACK_MIC_IN, 487 AC_JACK_TELEPHONY, 488 AC_JACK_SPDIF_IN, 489 AC_JACK_DIG_OTHER_IN, 490 AC_JACK_OTHER = 0xf, 491 }; 492 493 /* jack connection types (0x0-0xf) */ 494 enum { 495 AC_JACK_CONN_UNKNOWN, 496 AC_JACK_CONN_1_8, 497 AC_JACK_CONN_1_4, 498 AC_JACK_CONN_ATAPI, 499 AC_JACK_CONN_RCA, 500 AC_JACK_CONN_OPTICAL, 501 AC_JACK_CONN_OTHER_DIGITAL, 502 AC_JACK_CONN_OTHER_ANALOG, 503 AC_JACK_CONN_DIN, 504 AC_JACK_CONN_XLR, 505 AC_JACK_CONN_RJ11, 506 AC_JACK_CONN_COMB, 507 AC_JACK_CONN_OTHER = 0xf, 508 }; 509 510 /* jack colors (0x0-0xf) */ 511 enum { 512 AC_JACK_COLOR_UNKNOWN, 513 AC_JACK_COLOR_BLACK, 514 AC_JACK_COLOR_GREY, 515 AC_JACK_COLOR_BLUE, 516 AC_JACK_COLOR_GREEN, 517 AC_JACK_COLOR_RED, 518 AC_JACK_COLOR_ORANGE, 519 AC_JACK_COLOR_YELLOW, 520 AC_JACK_COLOR_PURPLE, 521 AC_JACK_COLOR_PINK, 522 AC_JACK_COLOR_WHITE = 0xe, 523 AC_JACK_COLOR_OTHER, 524 }; 525 526 /* Jack location (0x0-0x3f) */ 527 /* common case */ 528 enum { 529 AC_JACK_LOC_NONE, 530 AC_JACK_LOC_REAR, 531 AC_JACK_LOC_FRONT, 532 AC_JACK_LOC_LEFT, 533 AC_JACK_LOC_RIGHT, 534 AC_JACK_LOC_TOP, 535 AC_JACK_LOC_BOTTOM, 536 }; 537 /* bits 4-5 */ 538 enum { 539 AC_JACK_LOC_EXTERNAL = 0x00, 540 AC_JACK_LOC_INTERNAL = 0x10, 541 AC_JACK_LOC_SEPARATE = 0x20, 542 AC_JACK_LOC_OTHER = 0x30, 543 }; 544 enum { 545 /* external on primary chasis */ 546 AC_JACK_LOC_REAR_PANEL = 0x07, 547 AC_JACK_LOC_DRIVE_BAY, 548 /* internal */ 549 AC_JACK_LOC_RISER = 0x17, 550 AC_JACK_LOC_HDMI, 551 AC_JACK_LOC_ATAPI, 552 /* others */ 553 AC_JACK_LOC_MOBILE_IN = 0x37, 554 AC_JACK_LOC_MOBILE_OUT, 555 }; 556 557 /* Port connectivity (0-3) */ 558 enum { 559 AC_JACK_PORT_COMPLEX, 560 AC_JACK_PORT_NONE, 561 AC_JACK_PORT_FIXED, 562 AC_JACK_PORT_BOTH, 563 }; 564 565 /* max. codec address */ 566 #define HDA_MAX_CODEC_ADDRESS 0x0f 567 568 #endif /* __SOUND_HDA_VERBS_H */ 569