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Searched defs:VAL (Results 1 – 25 of 39) sorted by relevance

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/linux/arch/loongarch/kernel/
H A Dhw_breakpoint.c36 #define READ_WB_REG_CASE(OFF, N, REG, T, VAL) \ argument
41 #define WRITE_WB_REG_CASE(OFF, N, REG, T, VAL) \ argument
46 #define GEN_READ_WB_REG_CASES(OFF, REG, T, VAL) \ argument
62 #define GEN_WRITE_WB_REG_CASES(OFF, REG, T, VAL) \ argument
/linux/arch/arm64/kernel/
H A Dhw_breakpoint.c61 #define READ_WB_REG_CASE(OFF, N, REG, VAL) \ argument
66 #define WRITE_WB_REG_CASE(OFF, N, REG, VAL) \ argument
71 #define GEN_READ_WB_REG_CASES(OFF, REG, VAL) \ argument
89 #define GEN_WRITE_WB_REG_CASES(OFF, REG, VAL) \ argument
/linux/include/uapi/linux/
H A Dbtf.h93 #define BTF_INT_ENCODING(VAL) (((VAL) & 0x0f000000) >> 24) argument
94 #define BTF_INT_OFFSET(VAL) (((VAL) & 0x00ff0000) >> 16) argument
95 #define BTF_INT_BITS(VAL) ((VAL) & 0x000000ff) argument
/linux/tools/include/uapi/linux/
H A Dbtf.h93 #define BTF_INT_ENCODING(VAL) (((VAL) & 0x0f000000) >> 24) argument
94 #define BTF_INT_OFFSET(VAL) (((VAL) & 0x00ff0000) >> 16) argument
95 #define BTF_INT_BITS(VAL) ((VAL) & 0x000000ff) argument
/linux/arch/loongarch/include/asm/
H A Dhw_breakpoint.h57 #define LOONGARCH_CSR_WATCH_READ(N, REG, T, VAL) \ argument
65 #define LOONGARCH_CSR_WATCH_WRITE(N, REG, T, VAL) \ argument
/linux/arch/arm/kernel/
H A Dhw_breakpoint.c49 #define READ_WB_REG_CASE(OP2, M, VAL) \ argument
54 #define WRITE_WB_REG_CASE(OP2, M, VAL) \ argument
59 #define GEN_READ_WB_REG_CASES(OP2, VAL) \ argument
77 #define GEN_WRITE_WB_REG_CASES(OP2, VAL) \ argument
/linux/tools/testing/selftests/bpf/
H A Dbpf_experimental.h257 #define __bpf_assert(LHS, op, cons, RHS, VAL) \ argument
264 #define __bpf_assert_op_sign(LHS, op, cons, RHS, VAL, supp_sign) \ argument
273 #define __bpf_assert_op(LHS, op, RHS, VAL, supp_sign) \ argument
/linux/arch/arm64/include/asm/
H A Dhw_breakpoint.h98 #define AARCH64_DBG_READ(N, REG, VAL) do {\ argument
102 #define AARCH64_DBG_WRITE(N, REG, VAL) do {\ argument
/linux/arch/arm/include/asm/
H A Dhw_breakpoint.h110 #define ARM_DBG_READ(N, M, OP2, VAL) do {\ argument
114 #define ARM_DBG_WRITE(N, M, OP2, VAL) do {\ argument
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/
H A Dmsgfn.h12 # define E(RPC, VAL) NV_VGPU_MSG_EVENT_##RPC = VAL, argument
H A Drpcfn.h12 # define X(UNIT, RPC, VAL) NV_VGPU_MSG_FUNCTION_##RPC = VAL, argument
/linux/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_hdr.h641 #define QLC_DEV_SET_REF_CNT(VAL, FN) ((VAL) |= (1 << (FN * 4))) argument
642 #define QLC_DEV_CLR_REF_CNT(VAL, FN) ((VAL) &= ~(1 << (FN * 4))) argument
643 #define QLC_DEV_SET_RST_RDY(VAL, FN) ((VAL) |= (1 << (FN * 4))) argument
644 #define QLC_DEV_SET_QSCNT_RDY(VAL, FN) ((VAL) |= (2 << (FN * 4))) argument
645 #define QLC_DEV_CLR_RST_QSCNT(VAL, FN) ((VAL) &= ~(3 << (FN * 4))) argument
647 #define QLC_DEV_GET_DRV(VAL, FN) (0xf & ((VAL) >> (FN * 4))) argument
648 #define QLC_DEV_SET_DRV(VAL, FN) ((VAL) << (FN * 4)) argument
678 #define ISR_LEGACY_INT_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) argument
/linux/drivers/net/ethernet/freescale/fs_enet/
H A Dmii-fec.c46 #define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff)) argument
/linux/drivers/net/ethernet/qlogic/netxen/
H A Dnetxen_nic_hdr.h950 #define NETXEN_DIMM_MEMTYPE(VAL) ((VAL >> 3) & 0xf) argument
951 #define NETXEN_DIMM_NUMROWS(VAL) ((VAL >> 7) & 0xf) argument
952 #define NETXEN_DIMM_NUMCOLS(VAL) ((VAL >> 11) & 0xf) argument
953 #define NETXEN_DIMM_NUMRANKS(VAL) ((VAL >> 15) & 0x3) argument
954 #define NETXEN_DIMM_DATAWIDTH(VAL) ((VAL >> 18) & 0x3) argument
955 #define NETXEN_DIMM_NUMBANKS(VAL) ((VAL >> 21) & 0xf) argument
956 #define NETXEN_DIMM_TYPE(VAL) ((VAL >> 25) & 0x3f) argument
991 #define ISR_LEGACY_INT_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) argument
/linux/drivers/scsi/
H A Dsun3x_esp.c50 #define dma_write32(VAL, REG) \ argument
H A Dmac_esp.c50 #define esp_write8(VAL, REG) mac_esp_write8(esp, VAL, REG) argument
/linux/include/linux/
H A Ddma-mapping.h771 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) argument
773 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) argument
779 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) \ argument
783 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) \ argument
/linux/drivers/hwmon/
H A Dsmsc47b397.c42 #define VAL 0x2f /* The value to read/write */ macro
/linux/drivers/gpu/drm/panel/
H A Dpanel-novatek-nt39016.c70 #define RV(REG, VAL) { .reg = (REG), .def = (VAL), .delay_us = 2 } argument
/linux/drivers/watchdog/
H A Dit8712f_wdt.c57 #define VAL 0x2f /* The value to read/write */ macro
H A Dit87_wdt.c44 #define VAL 0x2f macro
/linux/tools/testing/selftests/bpf/progs/
H A Darena_atomics.c373 #define STORE_RELEASE_ARENA(SIZEOP, DST, VAL) \ in store_release() argument
/linux/arch/sparc/include/asm/
H A Dtsb.h113 #define TSB_STORE(ADDR, VAL) \ argument
/linux/drivers/gpio/
H A Dgpio-it87.c39 #define VAL 0x2f macro
/linux/drivers/media/platform/rockchip/rkcif/
H A Drkcif-regs.h14 #define RKCIF_FETCH_Y(VAL) ((VAL) & 0x1fff) argument

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