Changes in Makefile

c17ee635fd3a482b2ad2bf5e269755c2eae5f25e - Merge drm/drm-fixes into drm-misc-fixes

Mon, 23 Feb 2026 09:09:45 +0000

Merge drm/drm-fixes into drm-misc-fixes7.0-rc1 was just released, let's merge it to kick the new release cycle.Signed-off-by: Maxime Ripard List of files: /linux/arch/riscv/kernel/vdso_cfi/Makefile

cee73b1e840c154f64ace682cb477c1ae2e29cc4 - Merge tag 'riscv-for-linus-7.0-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Fri, 13 Feb 2026 03:17:44 +0000

Merge tag 'riscv-for-linus-7.0-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linuxPull RISC-V updates from Paul Walmsley: - Add support for control flow integrity for userspace processes. This is based on the standard RISC-V ISA extensions Zicfiss and Zicfilp - Improve ptrace behavior regarding vector registers, and add some selftests - Optimize our strlen() assembly - Enable the ISO-8859-1 code page as built-in, similar to ARM64, for EFI volume mounting - Clean up some code slightly, including defining copy_user_page() as copy_page() rather than memcpy(), aligning us with other architectures; and using max3() to slightly simplify an expression in riscv_iommu_init_check()* tag 'riscv-for-linus-7.0-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (42 commits) riscv: lib: optimize strlen loop efficiency selftests: riscv: vstate_exec_nolibc: Use the regular prctl() function selftests: riscv: verify ptrace accepts valid vector csr values selftests: riscv: verify ptrace rejects invalid vector csr inputs selftests: riscv: verify syscalls discard vector context selftests: riscv: verify initial vector state with ptrace selftests: riscv: test ptrace vector interface riscv: ptrace: validate input vector csr registers riscv: csr: define vtype register elements riscv: vector: init vector context with proper vlenb riscv: ptrace: return ENODATA for inactive vector extension kselftest/riscv: add kselftest for user mode CFI riscv: add documentation for shadow stack riscv: add documentation for landing pad / indirect branch tracking riscv: create a Kconfig fragment for shadow stack and landing pad support arch/riscv: add dual vdso creation logic and select vdso based on hw arch/riscv: compile vdso with landing pad and shadow stack note riscv: enable kernel access to shadow stack memory via the FWFT SBI call riscv: add kernel command line option to opt out of user CFI riscv/hwprobe: add zicfilp / zicfiss enumeration in hwprobe ... List of files: /linux/arch/riscv/kernel/vdso_cfi/Makefile

ccad8c1336b6511e3c7ca5c02f797b1fd2cf67e1 - arch/riscv: add dual vdso creation logic and select vdso based on hw

Mon, 26 Jan 2026 04:09:56 +0000

arch/riscv: add dual vdso creation logic and select vdso based on hwShadow stack instructions are taken from the Zimop ISA extension,which is mandated on RVA23. Any userspace with shadow stackinstructions in it will fault on hardware that doesn't have supportfor Zimop. Thus, a shadow stack-enabled userspace can't be run onhardware that doesn't support Zimop.It's not known how Linux userspace providers will respond to this kindof binary fragmentation. In order to keep kernel portable acrossdifferent hardware, 'arch/riscv/kernel/vdso_cfi' is created which hasMakefile logic to compile 'arch/riscv/kernel/vdso' sources with CFIflags, and 'arch/riscv/kernel/vdso.c' is modified to select theappropriate vdso depending on whether the underlying CPU implementsthe Zimop extension. Since the offset of vdso symbols will change dueto having two different vdso binaries, there is added logic to includea new generated vdso offset header and dynamically select the offset(like for rt_sigreturn).Signed-off-by: Deepak Gupta Acked-by: Charles Mirabile Tested-by: Andreas Korb # QEMU, custom CVA6Tested-by: Valentin Haudiquet Link: https://patch.msgid.link/20251112-v5_user_cfi_series-v23-24-b55691eacf4f@rivosinc.com[pjw@kernel.org: cleaned up patch description]Signed-off-by: Paul Walmsley List of files: /linux/arch/riscv/kernel/vdso_cfi/Makefile