51 #define	SETREG(bas, reg, value)	\  macro
194 	SETREG(bas, UART_DM_CR, UART_DM_RESET_TX);  in msm_init()
195 	SETREG(bas, UART_DM_CR, UART_DM_RESET_RX);  in msm_init()
196 	SETREG(bas, UART_DM_CR, UART_DM_RESET_ERROR_STATUS);  in msm_init()
197 	SETREG(bas, UART_DM_CR, UART_DM_RESET_BREAK_INT);  in msm_init()
198 	SETREG(bas, UART_DM_CR, UART_DM_RESET_STALE_INT);  in msm_init()
237 		SETREG(bas, UART_DM_CR, UART_DM_CLEAR_TX_READY);  in msm_putc()
247 	SETREG(bas, UART_DM_TF(0), (c & 0xff));  in msm_putc()
375 	SETREG(bas, UART_DM_IMR, u->ier);  in msm_bus_transmit()
406 	SETREG(bas, UART_DM_CR, UART_DM_RESET_STALE_INT);  in msm_bus_receive()
407 	SETREG(bas, UART_DM_CR, UART_DM_STALE_EVENT_ENABLE);  in msm_bus_receive()
409 	SETREG(bas, UART_DM_IMR, u->ier);  in msm_bus_receive()
468 		SETREG(bas, UART_DM_IMR, u->ier);  in msm_bus_ipend()
476 		SETREG(bas, UART_DM_CR, UART_DM_STALE_EVENT_DISABLE);  in msm_bus_ipend()
477 		SETREG(bas, UART_DM_CR, UART_DM_RESET_STALE_INT);  in msm_bus_ipend()
485 		SETREG(bas, UART_DM_CR, UART_DM_CLEAR_TX_READY);  in msm_bus_ipend()
489 		SETREG(bas, UART_DM_IMR, u->ier);  in msm_bus_ipend()
499 		SETREG(bas, UART_DM_IMR, u->ier);  in msm_bus_ipend()
541 	SETREG(bas, UART_DM_CR, UART_DM_RESET_STALE_INT);  in msm_bus_grab()
542 	SETREG(bas, UART_DM_IMR, 0);  in msm_bus_grab()
557 	SETREG(bas, UART_DM_IMR, u->ier);  in msm_bus_ungrab()