1807 		bus_write_1(bar->b_res, REG_SPR, REG_ACR);  in puc_config_advantech()
1808 		bus_write_1(bar->b_res, REG_ICR, acr);  in puc_config_advantech()
1920 		bus_write_1(bar->b_res, REG_LCR, LCR_DLAB);  in puc_config_quatech()
1921 		bus_write_1(bar->b_res, REG_SPR, 0);  in puc_config_quatech()
1922 		v0 = bus_read_1(bar->b_res, REG_SPR);  in puc_config_quatech()
1923 		bus_write_1(bar->b_res, REG_SPR, 0x80 + -cfg->clock);  in puc_config_quatech()
1924 		v1 = bus_read_1(bar->b_res, REG_SPR);  in puc_config_quatech()
1925 		bus_write_1(bar->b_res, REG_LCR, 0);  in puc_config_quatech()
2012 		bus_write_1(bar->b_res, 0x250, 0x89);  in puc_config_syba()
2013 		bus_write_1(bar->b_res, 0x3f0, 0x87);  in puc_config_syba()
2014 		bus_write_1(bar->b_res, 0x3f0, 0x87);  in puc_config_syba()
2018 			bus_write_1(bar->b_res, efir, 0x09);  in puc_config_syba()
2019 			v = bus_read_1(bar->b_res, efir + 1);  in puc_config_syba()
2022 			bus_write_1(bar->b_res, efir, 0x16);  in puc_config_syba()
2023 			v = bus_read_1(bar->b_res, efir + 1);  in puc_config_syba()
2024 			bus_write_1(bar->b_res, efir, 0x16);  in puc_config_syba()
2025 			bus_write_1(bar->b_res, efir + 1, v | 0x04);  in puc_config_syba()
2026 			bus_write_1(bar->b_res, efir, 0x16);  in puc_config_syba()
2027 			bus_write_1(bar->b_res, efir + 1, v & ~0x04);  in puc_config_syba()
2029 			bus_write_1(bar->b_res, efir, 0x23);  in puc_config_syba()
2030 			bus_write_1(bar->b_res, efir + 1, (ofs + 0x78) >> 2);  in puc_config_syba()
2031 			bus_write_1(bar->b_res, efir, 0x24);  in puc_config_syba()
2032 			bus_write_1(bar->b_res, efir + 1, (ofs + 0xf8) >> 2);  in puc_config_syba()
2033 			bus_write_1(bar->b_res, efir, 0x25);  in puc_config_syba()
2034 			bus_write_1(bar->b_res, efir + 1, (ofs + 0xe8) >> 2);  in puc_config_syba()
2035 			bus_write_1(bar->b_res, efir, 0x17);  in puc_config_syba()
2036 			bus_write_1(bar->b_res, efir + 1, 0x03);  in puc_config_syba()
2037 			bus_write_1(bar->b_res, efir, 0x28);  in puc_config_syba()
2038 			bus_write_1(bar->b_res, efir + 1, 0x43);  in puc_config_syba()
2041 		bus_write_1(bar->b_res, 0x250, 0xaa);  in puc_config_syba()
2042 		bus_write_1(bar->b_res, 0x3f0, 0xaa);  in puc_config_syba()
2219 			value = bus_read_1(bar->b_res, 0x1000 + (idx << 9) +  in puc_config_oxford_pcie()
2221 			bus_write_1(bar->b_res, 0x1000 + (idx << 9) + 0x92,  in puc_config_oxford_pcie()
2254 		value = bus_read_1(bar->b_res, 0x04);  in puc_config_oxford_pcie()
2333 		bus_write_1(bar->b_res, /* OPT_IMRREG0 */ 0xc, 0xff);  in puc_config_systembase()